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Xor and Xnor Gates: Basics and Applications: Objectives

This lab document discusses digital logic gates including XOR, XNOR, and their applications in half adders and full adders. The objectives are to learn how to build XOR gates from basic gates, build half adders and full adders using XOR gates, and build parallel adders, subtracters, incrementers and decrementers using full adders. The document provides background on XOR and XNOR gates and their truth tables. It then lists 8 tasks which involve drawing circuits in EWB to implement XOR, XNOR, half adders, full adders, and 4-bit parallel adders and subtracters using full adders.

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Salam Shaikh
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0% found this document useful (0 votes)
19 views

Xor and Xnor Gates: Basics and Applications: Objectives

This lab document discusses digital logic gates including XOR, XNOR, and their applications in half adders and full adders. The objectives are to learn how to build XOR gates from basic gates, build half adders and full adders using XOR gates, and build parallel adders, subtracters, incrementers and decrementers using full adders. The document provides background on XOR and XNOR gates and their truth tables. It then lists 8 tasks which involve drawing circuits in EWB to implement XOR, XNOR, half adders, full adders, and 4-bit parallel adders and subtracters using full adders.

Uploaded by

Salam Shaikh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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LAB#10

Lab# 10
XOR AND XNOR GATES: BASICS AND APPLICATIONS
OBJECTIVES
a) To learn how to build XOR gates from basic gates
b) To learn how to build a Half Adder and a Full Adder using XOR gates.
c) To learn how to build a parallel adder, subtracter, incrementer and decrementer using full
adders.

BACKGROUND
The XOR gate (sometimes EOR gate, or EXOR gate) is a digital logic gate that implements an
exclusive or; that is, a true output (1) results if one, and only one, of the inputs to the gate is true
(1). If both inputs are false (0) and both are true (1), a false output (0) results. Next is the circuit
representation of the XOR gate and its truth table.

A B F1
0 0 0
0 1 1
1 0 1
1 1 0

Next is one way to build an XOR gate using NAND gates only

The XOR logic gate can be used as a one-bit adder (or a Half-Adder; HA)that adds any two
bits together to output one bit (the sum) and another bit that represents the carry out. As shown
below
LAB#10

The XOR logic gate can be used as a one-bit full adder that adds any three bits together to output
one bit (the sum) and another bit that represents the carry out. As shown below

Inputs Output
A B Cin Cout S
0 0 0 0 0
1 0 0 0 1
0 1 0 0 1
1 1 0 1 0
0 0 1 0 1
1 0 1 1 0
0 1 1 1 0
1 1 1 1

LAB TASKS
Task 1: XOR built from basic gates
Draw using EWB the following circuits then fill their truth tables:
LAB#10

A B F1
0 0  0
0 1  1
1 0  0
1 1  1
What do you notice?
Each one of the above circuits can be replaced with one single logic gate that gives the same
truth table, that’s the Exclusive OR Gate or XOR.

A B F No. of 1's
0 0 0 Even
0 1 1 Odd
1 0 1 Odd
1 1 0 Even

Task 2: XNOR Gate


Draw using EWB the following circuit then fill its truth table:
LAB#10

A B F
0 0 1
0 1 0
1 0 0
1 1 1

The above circuit can be replaced with one single logic gate that gives the same truth table, that’s
the Exclusive NOR Gate or XNOR.

A B F1 No. of 1's
0 0 1 Odd
0 1 0 Even
1 0 0 Even
1 1 1 Odd

Task 3: 3-input XOR Gate


Draw using EWB a three-input XOR gate. Check the circuit using a Logic converter.

A B C A B C
0 0 0 0
0 0 1 1
0 1 0 1
Task 4: Half adder 0 1 1 0 circuit
The following diagram represents the Half
Adder ( HA is a Logic 1 0 0 1 Circuit that performs 1-
1 0 1 0
1 1 0 0
1 1 1 1
LAB#10

bit binary addition). Given that P and Q are two 1-bit binary numbers, S is the 1-bit Sum of P
and Q, and C is the CARRY bit.

(a) Find out the Boolean functions S and C, and write them in the corresponding blanks.
(b) Draw using EWB the HA circuit then find its truth table by using the logic converter.

THE BOOLEAN FUNCTION OF SUM (S) = P’Q+PQ’

THE BOOLEAN FUNCTION OF CARRY(C) = PQ

P Q S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
LAB#10

Task 5: Implementing HA circuit using EWB


Draw using EWB the HA circuit shown in the figure below then find its truth table by using the
logic converter, compare the truth table obtained with the one in Task5, what do you notice?

P Q S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Task 6: Implementing FA circuit using EWB
Draw using EWB a full adder circuit; find out its truth table and Boolean functions.
LAB#10

BOOLEAN FUNCTION:
For Sum:
€=A’B’C’in+A’BCin’+AB’C’in+ABCin
FOR Carry Out:
Cout= A’BCin+AB’Cin+AB+ABCin
Cout= A’BCin+AB’Cin+ABCin

Task 7: Implementing a 4-bit parallel adder using 4 FA’s


Draw using EWB a 4-bit parallel adder circuit (the circuit below shows (6+3=9)) Note: you can
find the decoded 7-segment under the “indicators” toolbar.
LAB#10

Task 8: Implementing a 4-bit parallel subtracter using 4 FA’s


Draw using EWB a 4-bit parallel adder circuit (the circuit below shows (b-6=5))
LAB#10

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