Decoupling Caps Radiating
Decoupling Caps Radiating
Mark I. Montrose
Montrose Compliance Services, Inc.
[email protected]
Abstract–This paper analyzes effects that decoupling calculated from loop inductance (ESL) along with lumped
capacitor(s) may have on the development of radiated capacitance from discrete components. The need to minimize
emissions should improper implementation on a printed lead inductance is emphasized in the z-axis yet minimal
circuit board (PCB) occur. This applied EMC paper is based research has been presented on what happens when there is
on real-world experience and contains an easy solution to help excessive inductance on only one leg of a decoupling
engineers achieve compliance quickly and at low cost, without capacitor (i.e., power or ground-0V) [3, 4].
having to redesign the PCB. This paper presents what happens in a real-world PCB
Improper implementation of decoupling capacitor(s) should a poor layout topology be implemented. Not every
includes: routing traces on the outer layers or using boards
PCB layout designer, and in fact many digital design
with or without power and return planes; excessive
engineers, do not understand EMC and PCB layout
inductance in the decoupling loop area; lack of charge storage
to replenish the power and return planes; and self-resonant requirement and create a product using a routed trace between
frequency of the capacitor outside the harmonic spectrum of component and decoupling capacitor(s) because it is easy to
periodic signals. implement versus placing vias to a plane for every pin of the
We analyze the magnitude of radiated electromagnetic component and both legs of a capacitor.
interference (EMI) based on physical placement of decoupling Fast transient inrush surges causes a bounce condition to
capacitors from digital components and whether distance exist on both the voltage and 0V planes at switching
spacing from a switching element, connected by routed traces frequencies. In addition to plane bounce, if insufficient
on both the top and bottom of a PCB, makes a significant capacitance is present to minimize PDN noise, the magnitude
difference in the development and propagation of radiated of this bounce creates common-mode currents internal to the
emissions. The focus is on what occurs on a PCB, regardless of silicon of digital components. The impedance of the internal
whether the board is single-sided, double-sided or multilayer. bond wires to the package pins is extremely high upon which
common-mode current is also developed. Common-mode
Keywords-decoupling capacitors, trace inductance, power current now has several antenna structures to radiate from; the
distribution, common-mode radiation silicon or lead bond wires or routed trace(s) to a decoupling
capacitor. If there is insufficient energy charge in the PDN, a
I. INTRODUCTION potential plane bounce in power distribution may cause
common-mode current to be developed [3, 4, 5, 6].
Behavioral models chosen for simulation are usually Computational analysis may not include all parametric values,
(theoretically) perfect. Perfect models along with may be overly simplified, or not be well defined.
computational analysis may not represent an actual PCB
layout due to parasitics and other electromagnetic effects that II. TEST ENVIRONMENT AND SETUP
cannot be easily determined or anticipated. A voltage potential
difference due to inductance of the interconnect trace from a A simplified schematic and the PCB is shown in Figs. 1
decoupling capacitor to the power distribution network (PDN) and 2 to help in describing the test setup. A 74FCT244 is
can causes common-mode EMI to be developed and chosen based upon extreme operating parameters for which
propagated from digital components. this device is designed to be operated under. This component
Decoupling capacitors are required to minimize voltage has a large output voltage drive level (+5V CMOS), fast edge
potential differences and plane bounce along with RF transition rate and up to 960 mA data book inrush current
switching energy injected into the PDN from digital consumption under maximum capacitive load. A clock signal
components. Once switching energy is injected into a PDN, at different frequencies is applied to all eight input gates
this energy will be distributed throughout the power/return simultaneously, stressing the component to maximum
network within a certain radius of operation and can cause operating/thermal parameters. Each output driver has a
functional disruption of circuits should the magnitude of the maximum resistive/capacitive load (47pF/47). When all
plane bounce exceed operational margins. The magnitude of eight drivers switch simultaneously, the inrush surge current
radiated energy, related to the physical placement of a was 380 mA. The resistor/capacitor pair was connected
decoupling capacitor with routed traces is investigated herein. directly to each output, using a single via to minimize routed
Prior research on the effectiveness of decoupling trace inductance. This routed distance was 1.6 mm (0.062
capacitors is extensive and covers namely the effects of lead inches or 62 mils).
inductance and RF switching noise present within a PDN, but Provisions for six decoupling capacitors with different
not radiated emissions from a routed trace between component trace lengths were provided to analyze the magnitude of
and capacitor. Examples include [1, 2]. It is a well-known fact common-mode current developed internal to the component’s
that a PDN must have low impedance at switching frequencies package and to determine whether the decoupling capacitor
to minimize plane bounce. Plane impedance is easily
location would increase radiated EMI. One configuration had III FREQUENCY DOMAIN ANALYSIS
a capacitor (C16) located immediately adjacent to the input
power pin, or best possible location. Five capacitors (C11- The reason 3.9nF capacitors were originally chosen is due
C15) were located at a distance of 6.4, 7.6, 8.9, 10.2 and 11.4 to how a typical junior design engineer may [incorrectly]
cm (2.5, 3.0, 3.5, 4.0 and 4.5 inches) away. A non-typical select a decoupling value without taking into consideration
capacitor value (3.9 nF) was chosen to analyze what may loop inductance. The self-resonant frequency of a capacitor at
occur if there is insufficient decoupling capacitance instead of 80 MHz, with typical lead inductance (ESL) of 1nH is 3.9nH,
a theoretically perfect 100 nF device. Eq. (1). This capacitor selection value proved to be interesting,
Power trace as discussed later. If we used the correct value of ESL, the
Battery input 74FCT244
self-resonant frequency along with other details provided in
Signal
input Table 1 now makes sense. Trace inductance of a microstrip
transmission line on this PCB stack is 7-nH/cm (18-nH/inch).
To other
capacitors 1 (1)
located at f
various 2 ESL C
distances
away from
component. Radiated emission, E (V/m) from the loop area between
capacitor and component can be easily determined by Eq. (2)
Ground trace [7]. Current draw is 380 mA under maximum load conditions.
The variables in (2) involve f = frequency in MHz, A=loop
area (m), Idm = current (mA), and r = distance between PCB
Two topologies investigated. and antenna (meters). Three meters is used to represent FCC
Class B limits.
Fig. 1. Simplified schematic of the test PCB
1
E 263 10 16 ( f A Idm) (2)
r
Equation (3) calculates the wavelength of a propagating
signal and is related to total loop perimeter from capacitor
placement, with f = frequency (MHz) and = wavelength
(meters). This is the frequency in which the loop area becomes
an efficient antenna. Consequently, any loop size from
decoupling capacitor placement being very small, cannot
become an efficient radiating differential-mode or loop
antenna. Test data and plots confirmed this.
300
f (3)
The physical location of a decoupling capacitor, if routed
with a trace to a component, allows a loop to exist. This loop
does have an effect on radiated emissions, but not based on the
Fig. 2. PCB layout actual physical size of the loop.
Amplitude levels from all decoupling locations were
Three different decoupling capacitance values were nearly identical when measured in a TEM cell, indicating size
investigated separately and then in groups of five: 1nF, 3.9nF of the loop did not have significant effect on radiated EMI.
and 100 nF. Zero ohm resistors were used to extend the length Radiated emission from the PCB with different
of the decoupling loop. These resistors have a minimal amount decoupling capacitor values is provided in Fig. 3. Regardless
of equivalent series resistance (ESR) and equivalent series of decoupling loop size, radiated emissions were exactly
inductance (ESL), and thus did not affect measurement results. identical which indicates that the size of a decoupling loop
Ferrite beads prevented switching noise corruption to/from the makes no difference in EMI, since EMI is being radiated with
DC power source (battery). significant magnitude from somewhere else and not from the
An 80 MHz clock signal (maximum operating frequency loop or its physical size.
of the 74FCT244) was provided using a SMA connector. The One reason why a decoupling loop may cause radiated
reason to not provide on-board clock generation was to allow EMI is explained by [6], which had a piece of wire attached to
measurement of actual emissions from the 74FCT244 by a plane driven by common-mode currents present within the
itself, along with the effects from various decoupling loop PDN. Ref. [6] did not investigate traces routed microstrip, the
areas; not from a radiating frequency generation source. Due focus of this paper. When a transmission line (trace) is
to an extensive amount of data (40 plots), typical results can energized with common-mode current created as a result of
only be presented. The key item to observe is both cause and insufficient decoupling or interplane capacitance, common-
effects based on a many test plots and data. mode currents developed internal to the component now have
an antenna to propagate EMI from.
Table 1. Parametric Details of the Test PCB
Capacitor Loop perimeter due to Total loop Self-resonant frequency Calculated emission Calculated radiated
ID capacitor placement inductance 1 of the loop path3 levels @ 10 MHz4 frequency (loop area)5
C11 2.5 inches (6.4 cm) 46 nH 11.5 MHz 108.8 V/m 4.8 GHz
C12 3.0 inches (7.6 cm) 55 nH 10.8 MHz 153.4 V/m 3.9 GHz
C13 3.5 inches (8.9 cm) 64 nH 10.0 MHz 210.3 V/m 3.4 GHz
C14 4.0 inches (10.2 cm) 73 nH 9.4 MHz 276.3 V/m 2.9 GHz
C15 4.5 inches (11.4 cm) 82 nH 8.9 MHz 345.1 V/m 2.6 GHz
C16 0.01 inches (0.25 mm) 3.18 nH 2 45.2 MHz 0.17 V/m 1,200 GHz
1. Includes package lead-length inductance (1-nH) and trace inductance from the total loop area (18 nH/inch).
2. Inductance value contains lead-length inductance (1-nH) and one via (2-nH).
3. Value of capacitor used for calculating self-resonant frequency, Eq. (1): 3900 pf (3.9 nF) and total loop inductance, L.
4. Distance used is 3 meters, calculated from Eq. (2).
5. Loop area determined from loop perimeter for use with Eq. (3).
Common-mode current
Source
Decoupling capacitor
Decoupling (dielectric emulates free space)
loop
Ground Power
Power Ground
Dipole structure Source Ground plane
III. CONCLUSION