Department of Electrical and Computer Engineering

2022 Spring: ECE380-002 Digital Logic (CRN: 10145)

Course Synopsis:
Online course description: ECE 380 Digital Logic teaches number systems, Boolean algebra, logic
functions and gates, design of combinational logic systems, flip-flops, design of synchronous
sequential systems, and iterative networks. Includes laboratory experiments. Four credit hours.

Textbook:
Recommended: Fundamentals of Digital Logic with VHDL Design, 3rd Edition, Brown and
Vranesic.
ISBN-10: 0077221435 and ISBN-13: 978-0077221430.

More reading: Digital Fundamentals, 11th Edition, by Floyd. ISBN-10: 0132737965 and ISBN-13:
978-0132737968

Prerequisite(s): CS 100 or CS 110 or RRS 101. Prerequisite topics: Programming language.

Instructor:
Dr. Aijun Song
Lecture time and location: South Engineering Research Ctr (SERC)-1059, TR 12:30-13:45 pm
E-mail: [email protected]; Phone: 205-348-6510
Office Hours: By appointments
(Zoom ID: 860-728-6024, passcode: ece380)
https://uasystem.zoom.us/j/8607286024?pwd=M29FSVNOckE4OXRxM3MwOWVKT2JnQT09
Password: ece380

Lab Teaching Assistant: Connor Webb

Email: [email protected]

Lab section:
ECE 380 - 003: M, 3:30 pm - 5:20 pm
ECE 380 - 320: M, 5:30 pm - 7:20 pm
ECE 380 - 322: T, 06:30 pm - 08:20 pm

Course Objectives:
The objective of ECE380 Digital Logic is to establish understandings of a wide range of topics:
Digital logics and functions, Boolean algebra, number representation, digital
implementation technology, programmable logic devices (PLDs), digital design
methodologies, logic analysis and synthesis tools such as K-map, hardware description
language (HDL), arithmetic circuits, combinational building blocks, combinational circuit
design, sequential building blocks, and synchronous sequential circuits with a focus on finite
state machines (FSM).

The students will apply the knowledge and design methods to laboratory practices. This is done
through the use of 1) computer-aided design (CAD) software, mainly Quartus Prime from Altera, 2)
VHDL, and 3) Altera DE1 boards, in the laboratory.

The course goal is to establish abilities 1) to manually synthesize and optimize relatively simple
digital circuits and 2) to design and implement small to medium scales of logic circuits, both
combinational and synchronous sequential, through the use of commercial HDL software.

Student Learning Outcomes:

• Students get familiar with the fundamental concepts of digital design and iterative design
processes as well as various implementation technologies (standard IC, FPGA, ASIC, etc.).
• Students apply Boolean algebra in analysis and synthesis of digital circuits.
• Students synthesize digital circuits using two principal strategies: sum-of-products and
product-of-sums.
• Students construct simple gates using NMOS and CMOS transistors.
• Students optimize the logic functions using Karnaugh maps.
• Students use the 2’s complement representation to represent signed integers.
• Students construct two types of adders, ripple-carry adders, and carry-lookahead adders.
• Students use adders to perform functions of subtraction and multiplication.
• Students use different types of combinational circuits, multiplexers, and decoders, to
implement logic functions.
• Students use code converts to support LED interfaces.
• Students learn sequential design principals.
• Students learn various storage units, latches, and flip-flops.
• Students use flip-flops to construct various counters and counter-like circuits.
• Students use two types of models, Moore and Mealy, to construct small-scale sequential circuits.
• Students practices various design items using computer-aided design software and VHDL.
• Students analyze and simulate digital design using computer-aided design software.
• Students implement the logic design using the FPGA development and education board.

Exams and Assignments:

Two sessions of lectures per week are the main teaching venue, augmented by homework and
examinations. Synoptic lecture notes will be provided on the course website,
https://ualearn.blackboard.com/. Students are required to perform the lab sessions and complete lab
assignments. The use of Quartus Prime and a breadboard kit will be required for laboratory projects.
Students are required to follow the introductory materials to learn the usage of the software on their
own and to tackle digital logic designs. Examinations include multiple quizzes, three exams, and one
final exam. The final exam will be comprehensive.

Grading Policy:
9% Engagement activities (Games, practices, VHDL video watching, or attendance checks)
21% Labs (seven assignments)
5% Homework (about five assignments)
15% Three quizzes (15 minutes each)
30% Three 90-min Exams
20% Final exam, 120 minutes
Class participation will be checked by engagement activities. Students will be asked to do these
engagement activities during randomly selected days. Full submission of all engagement activities is
equivalent to 9% of the total grade.

Bonus assignments will be announced throughout the semesters for students to earn extra points.

Note: This course (ECE380) instruction methods:

• Lectures will be conducted via in-person.
• Tests (quizzes, exams, and final exam) will be conducted in-person in the classroom.
• Labs will be conducted in the physical lab (SERC-2001).
• Course materials (lecture notes, homework assignments, exam review materials, VHDL
video/reading) are distributed online.
• If you feel that you cannot meet the in-person requirements, you are advised to drop the
course. No online tests will be offered this semester based on these University policies.

Please also note that COVID accommodations from the ODS will not excuse students from in-person
labs or in-classroom tests.

All lab assignments should be prepared and submitted by a team of two students.
Homework assignments are submitted by individual students (NOT by teams).

The lab assignments and homework have specified deadlines at the BlackBoard submission links
(often also announced through BlackBoard). Late homework and lab reports, within a week from their
deadlines, will be accepted at reduced scores. Ten points per day will be forfeited for tardiness in
submissions. Lab reports with missing demos will be considered as incomplete, and thus a zero will
be given. Submission of lab assignments and homework after one week will not be accepted.
Topics and schedule:

Topic # Topics Exam* Labs

#1 Chap 1 – Introduction
#2 Chap 2 – Gates + VHDL (I) Lab1: Quartus (VHDL)
#3 Chap 3 – NMOS and CMOS + -Quiz- Lab2: Intro Breadboarding (BB)
VHDL (II)
#4 Chap 4 – K-Map (I)
#5 Chap 4 – K-Map (II) Exam#1 Lab3: Simple logics (VHDL+BB)
#6 Chap 5 – Signed #, Adders (I)
#7 Chap 5 – Adder (II) + VHDL -Quiz- Lab4: Adders (VHDL+BB)
#8 Chap 6 – Combinational (I)
#9 Chap 6 – Combinational (II), Exam#2
Lab5: Multiplexers (VHDL+BB)
Combinational in VHDL
#10 Chap 7 –Flip-flops
#11 Chap 7- Counters -Quiz- Lab6: Breadboarding with a timer
(BB)
#12 Chap 7 – Register, Counters and Exam#3
VHDL design
#13 Chap 7 – FSM (I) Lab 7: FSM (VHDL+BB)
#14 Chap 8 – FSM (II) -Quiz-
#15 Reading week: Lectures/final
Review (last lecture)
#16 Final exam

Important dates:
January 17 Martin Luther King, Jr. Day (UA closed)
January 19 Last Day to Add a Course or Drop a Course Without a Grade of "W"
March 11 - March 18 Spring Holidays (UA closed)
March 30 Last Day to Drop a Course with a Grade of "W"
April 08 Honors Day - Classes Dismissed (Friday)
April 29 Classes End and Last Day to Withdraw from the Spring Term
May 04 Final exam, 1:30 - 3:30 p.m., SERC-1059

* The weeks of the exams may vary as the course advances forward. The exact exam dates will
be announced in a week preceding. The quiz date will be announced in the preceding lecture.
Course Policies:
0) Course materials and course schedule
Course materials (lectures, labs/homework, in-class practices, etc.) will be distributed online.
Schedules for homework assignments, labs, quizzes, exams, and the final exam will be distributed in
the syllabus, during the lectures, or through the announcement.

It is the responsibility of the students to acquire the course materials and schedules.

1) Attendance policy:
The course lectures will be conducted via in-person. Tests (quizzes, exams, and final exam) will be
conducted in-person in the classroom. Labs will be conducted in the physical lab (SERC-2001).

Please also note that COVID accommodations from the office of Disability Services (ODS) WILL
NOT excuse students from in-person labs or in-person tests. Students are responsible for obtaining
all class and lab materials themselves.

About nine engagement activities are used to ensure course engagement. Late submissions will
not be accepted. These Engagement activities are required, NOT OPTIONAL.

Missed examinations (quizzes, exams, and the final exam) will result in a zero in the scores.

2) Disruptive behavior:
Disruptive or obstructive behavior in the classroom of any kind is not permitted. This may include, but
not limited to, loud talking, threats, or aggressive verbal and physical activities during the class/Zoom
sessions.

3) Usage of phones or handheld electronics or wearables during the exams:

ANY usage of phones or handheld electronics or wearables is prohibited during the exams, including
merely taking out these devices from pockets or turning on the electronics screen.

It is mandatory that the phones or handheld electronics or wearables are turned off and stored in school
bags if they are carried into the classroom during the three exams and the final exam. DO NOT put
your phone or watch in your lap or on your chair. Proctors may report academic misconduct when a
student fails to turn off and store away these devices.

No calculators of any type are allowed in the exams or quizzes.

4) Makeup policy:
No makeups will be provided for missed examinations or homework assignments.

Special occasions, defined in the next paragraph, will be considered to alleviate the loss of scores
or time. In these special occasions, students may 1) either receive a weighted score, based on the
accumulated average of the tests for the missed quizzes or exams (the final exam has a separate method
to calculate the weighted score); 2) or receive a one-week extension for the missed deadline for
homework or lab reports.

The special occasions refer to medical conditions or University-related absence. The student should
send valid advanced notifications and supporting documents to the instructor, by email or notes, before
the examinations or homework/lab report deadlines. The accepted documents should explicitly cover
the dates of the missed exam or homework. Students should obtain permission from the instructor
before the test or homework due day. Otherwise, the student will receive a zero for the missed
occurrence.

When one special occasion is used for examinations of the same category (one exam or one quiz), the
excused examination will get an average of the two earned scores in that category. When two special
occasions are used for two examinations of the same category (two exams or two quizzes), the two
excused examinations will get 75% of the sole score in that category.

Examples of the acceptable medical documents should read as follows, “The patient was seen on ___
(the visit date) in our office and may return to work/school on ___ (the return date).” The missed
deadline or exam/quiz date should be covered between the visit date and return date.

Each student is only allowed to have a maximum of two special occasions throughout the entire
semester if there are no approved documents from the Office of Disability Services (ODS).

Additional requirements are needed to be excused from the final exam, considering the 20% weight of
the final exam in the course grade. See the requirements below.

5) Final Exam
A student might be excused from the final exam only when the following requirements are met:
• Necessary documents that specify that the student cannot conduct the final exam (the final
exam date should be covered) for a medical reason or University-related travel.
• Written permission of absence, in the form of an email from the instructor, has to be obtained
before the final exam starts.
• At least five labs should be completed with pass scores (>60 pts)

When excused, an oral exam will be conducted between the instructor and the student. The
student will get a calculated score for the final, based on the scores of the three exams and an oral
makeup exam through zoom. The algorithm is

Excused_final_score=(exam#1_score/100+ exam#2_score/100+exam#3_score/100)/3*50
+score_of_oral_make_up_exam.

Note that in the algorithm:

• The oral makeup exam is worthy of 50 pts. The length of the makeup exam is 30 minutes.
• It is expected that the oral makeup exam is more difficult than the written version. The student
may choose not to take the oral makeup exam and receive a zero for the oral makeup.
• The maximum of Excused_final_score is equivalent to 100 pts of a full regular final exam score.
6) Academic dishonesty:
Academic dishonesty is not tolerated, without any exceptions. Any student who is suspected of
academic dishonesty will be turned into the proper university personnel, according to the University’s
and College’s Code of Academic Conduct.

7) Disability statement:
It is the policy of The University of Alabama to make reasonable accommodations for qualified
individuals with disabilities. Please contact the Office of Disability Services at 348-4285 to initiate
disability accommodations.

8) Laptop statement:
It is the policy of The University Alabama College of Engineering to fully expect our students to have
and maintain laptop computers that meet the standards published on the College’s website at
http://eng.ua.edu/undergraduate/laptop/.

9) Repeated violations of rules (late submissions, absences from lectures, labs, exams, disruptive
behaviors, improper use of phones, etc.):
Repeated violations will result in strict enforcement to ensure efficacy in teaching and fairness to all
students. For example, the third late homework or laboratory submissions will not be accepted in a
semester.

10) Laboratory practices and demonstrations.

Lab make-ups are only allowed for special occasions, which refer to medical conditions or University-
related absence as defined above.

The student should send advanced notifications and valid documents to the instructor, by email or
written notes, before the lab sessions. The accepted documents should explicitly cover the dates of the
lab practice. Without permission from the instructor, the student will receive a zero for the missed
lab practice, even if the lab report is submitted.

Absence of lab demonstrations will result in a zero for the lab score, even when the lab report is
submitted. Instructions for lab demonstration will be provided for each lab assignment.

11) Laboratory practices.

The ECE380 labs have three components (listed below).
1) Circuit design using a breadboarding kit. Each of you is required to purchase a
breadboard kit: "Introduction to Digital Electronics Complete Kit."
Two ways to purchase:
1-a) (Recommended) University Supply Store, on-campus or online,
https://www.universitysupplystore.com/
1-b) gadgetory.com, $37.95 (about $10 shipping fee with an extended delivery time because
the vendor is on the West Coast).
https://gadgetory.com/index.php?route=product/product&path=66&product_id=94
 If you already own a breadboard and jump wires, you can purchase the component kit at a
lower price ($24.95):
https://gadgetory.com/index.php?route=product/product&path=66&product_id=95

Note: You need to email the vendor that you purchase for the ECE380 course at the University
of Alabama to receive the correct model.

NOTE: At one 9-volt battery is needed to power the breadboarding kit. You can buy it
from local stores like Walmart, Target. You can also get it from amazon:
https://www.amazon.com/Energizer-Alkaline-General-Purpose-
Battery/dp/B00003IE4E/ref=sr_1_4?dchild=1&keywords=9+volt+battery+2+count&qid=159
8013465&s=electronics&sr=1-4

2) VHDL programming and computer simulations via Quartus Prime. We highly encourage
each of you to install Quartus Prime software on personal laptops.
You can also access the departmental lab, SERC2001, to access Quartus Prime software.

3) Verification with the DE1 board. You need to access SERC2001 to use the DE1 board.

Other important information.

• We will have about seven labs.
• Except for Lab 1, all the labs need to use the breadboarding kit.
• You need to have the breadboarding kit in the first two weeks (priori to Lab 2).
• Each student needs to demonstrate with his/her own breadboarding kit to pass the labs.
• Each student needs to complete at least five labs to pass the ECE380 course.

Students are required to complete at least five labs. The completion of a lab requires a
successful lab demo and a passing score of 60 pts for the report. Missing three or more labs will
result in an F in this course.

12) Engagement requirements.

To get a passing grade, each student needs to complete at least five of seven laboratory practices.
Failure to comply the lab requirements will result in an “F”.

13) Changes to this syllabus:

The items stated in this syllabus are subject to changes without further notices.

COVID-19 Statements
All University faculty, staff, and students are expected to maintain a commitment to the health and
safety of our campus community. Due to the current COVID-19 pandemic, specific health and safety
standards are in place to minimize exposure and community spread on campus. In the interest of your
health and safety and that of all UA students, faculty and staff, the University reserves the right to
change the mode of instruction or schedule of instruction at any time, based upon prevailing public
health and other guidance. While the method of delivery may change, educational instruction and
opportunities will continue. As such, the University will not provide a refund of tuition, in whole or
in-part, based on any such changes. Detailed information on changes in format or schedule can be
found at studentaccounts.ua.edu and financialaid.ua.edu.

UA students, faculty and staff are required to comply with University Spring 2022 Operations
(https://healthinfo.ua.edu/news/university-spring-2022-operations/) guidance regarding face
coverings and other measures.

Getting vaccinated is the best way to Protect Our Herd. COVID-19 vaccines are being administered
by the University Medical Center, the Student Health Center and various businesses and healthcare
providers.

If you test positive for COVID-19 or become exposed to COVID-19, please contact the UA COVID-
19 Support Program for guidance on the need for quarantining. If you provide documentation of
your need to quarantine and when you may end your quarantine, you will be allowed to view
recorded lectures and make-up any missed in-class assignments during your quarantine period.
Without documentation of your quarantine period, it will be up to you to get any missed notes from
a classmate, and any missed in-class assignments may not be made-up. Please provide
documentation within one day of missed classes.