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Design of Analog CMOS Integrated Circuits: (1st Edition)

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0% found this document useful (0 votes)
53 views

Design of Analog CMOS Integrated Circuits: (1st Edition)

Uploaded by

Himaja Dasari
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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7/1/22, 5:49 PM Solved: Chapter 12 Problem 10P Solution | Design Of Analog CMOS Integrated Circuits 1st Edition | Chegg.

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Step 1 of 5

(a)
My Textbook Solutions
Refer to Figure 12.60 in the textbook.

Capacitor along with and are act as a resistor. So, the resultant output voltage
expression is,

…… (1)
Design of Loose Leaf Semi
Analog... for Business... or Ph
Here,
1st Edition 14th Edition 3rd Ed
is the input voltage, and is the time constant. View all solutions

Write the expression of time constant.

Here,

and are the capacitors, and is the clock frequency.

Substitute for and 2 V for in equation (1).

…… (2)

Comment

Step 2 of 5

Draw the output voltage waveform using equation (2) as shown in Figure 1.

Thus, output voltage waveform versus time for many clock cycles is drawn and shown in Figure
1.

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7/1/22, 5:49 PM Solved: Chapter 12 Problem 10P Solution | Design Of Analog CMOS Integrated Circuits 1st Edition | Chegg.com

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Step 3 of 5

(b)

Consider that all charge from channel is injected onto . The capacitor is turn off,
when the voltage across the capacitor is reached to .

Consider the expression of error incurred by the capacitor .

…… (3)

Here,

is the input voltage, W is the width and L is the length, is the threshold voltage, is
the oxide capacitance, is the gate to source voltage, and is the capacitance.

Maximum error is obtained when the value of is maximum.

Channel absorbs charge when the channel is turn on and it injects the absorbed
charge onto the capacitors and , when it turn off.

So, the maximum output error of the circuit is,

Thus, the maximum error in due to charge injection is .

Comment

Step 4 of 5

(c)

Draw the circuit diagram as shown in Figure 2.

Comment

Step 5 of 5

When is turn off, the voltage stored in the capacitor is,

Here,

is the capacitance, k is the Boltzmann constant, and T is the temperature.

When is turn on, the stored voltage in the capacitor is distributed between two
capacitors and .

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7/1/22, 5:49 PM Solved: Chapter 12 Problem 10P Solution | Design Of Analog CMOS Integrated Circuits 1st Edition | Chegg.com

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Find he expression of total noise after is turnoff.

Take square root on both sides of the expression.

Thus, the sampled noise at the output after turns off is .

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