Advanced Analog Technology, Inc.

April 2009

AAT11671
Product information presented is current as of publication date. Details are subject to change without notice.

INTEGRATED TFT LCD POWER SOLUTION

FEATURES GENERAL DESCRIPTION

Built In 2A (Max.), 0.2Ω Switching NMOS The AAT11671 provides a step-up PWM controller,

Negative LDO Driver Down to –14V/+20mA negative high voltage LDO drivers, low dropout linear

VCOM Operational Amplifier regulator, VCOM operational amplifier and one high

Up to 350mA LDO voltage switch (up to 28V) for TFT LCD display. RST pin

Reset Signal Output for TCOM will issue a reset signal to TCOM when VDD voltage is too
low. The PWM controller consists of an on-chip voltage

28V High Voltage Switch for VGH
reference, oscillator, error amplifier, current sense circuit,

Adjustable Soft-Start Function
comparator, under-voltage lockout protection and

1.2MHz Fixed Switching Frequency
soft-start control circuit. The thermal and power fault

Fault and Thermal Protection
protection prevents excessive power damaging internal

Low Dissipation Current :
circuit. The negative high voltage LDO drivers generate
Typical 2.3mA In Operation VOUT2 voltage (VGL) setting by external resistor divider.

VQFN24-4*4 Package Available For the flicker compensation, VGH will be connected to
VOUT3 when CTL is high and connected to ADJ when
TYPICAL APPLICATION CTL goes low. The AAT11671 contains one operational
amplifier capable of supplying 200mA to VCOM.
With the minimal external components, the AAT11671
offers a simple and economical solution for TFT LCD
power.

PIN CONFIGURATION
GND1
VDD1

INE
VI+

VO

EN

24 23 22 21 20 19

CTL 1 18 SW
VOUT3 2 17 VDD
VGH 3 16 EO
AAT11671
ADJ 4 15 SS

VREF 5 14 VLV

IN2 6 13 OUT4

7 8 9 10 11 12
IN4
RST
OUT2

DLY

GND
INR

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AAT11671
ORDERING INFORMATION
DEVICE PART TEMP. MARKING
PACKAGE PACKING MARKING
TYPE NUMBER RANGE DESCRIPTION
1. Part Name
Q7: AAT11671 2. Lot No.
AAT11671 T: Tape
AAT11671 VQFN24- –40
C to +85
C XXXXX (6~9 Digits)
- Q7-T and Reel
4*4 XXXX 3. Date Code
(4 Digits)
Note: All AAT products are lead free and halogen free.

ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL VALUE UNIT

VDD, CTL, VLV to GND VDD 7 V

VDD1, SW to GND VH1 14 V

VOUT3 to GND VH2 28 V

OUT2 to GND VH3 –14 V

Input Voltage 1 (IN1, IN2, IN4 , INR, DLY, EN, SS) VI1 VDD +0.3 V

Input Voltage 2 (VI+) VI2 VH1 +0.3 V

Output Voltage1 (EO, RST, OUT4, VREF ) VO1 VDD +0.3 V

Output Voltage 2 (VO ) VO2 VH1 +0.3 V

Output Voltage 3 (ADJ, VGH ) VO3 VH2 +0.3 V

Operating Free-Air Temperature Range TC –40 to +85 °C

Storage Temperature Range TSTORAGE –65 to +150 °C

Power Dissipation Pd 1,300 mW

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AAT11671
ELECTRICAL CHARACTERISTICS
(VIN = 3.3V, VDD1 = 10V, unless otherwise specified.)

Operating Power
PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
VDD Input Voltage Range VDD 2.3 - 5.5 V
VDD1 Input Voltage Range VDD1 6 - 14 V
Rising 2.11 2.21 2.31
VDD Under Voltage Lockout VUVLO V
Falling 2.01 2.11 2.21
VIN1 = 1.5V, Not Switching - 0.4 0.8 mA
VDD Operating Current IVDD
VIN1 = 1.2V, Switching - 2.3 5.0 mA
VDD1 Operating Current IVDD1 VVI+ = 4V - 1.2 3.0 mA
VLV Operating Current IVLV VVLV = 5V, IOUT4 = 0mA - 0.2 0.4 mA
Thermal Shutdown TSHDN - 160 - °C

Reference Voltage
PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Reference Voltage VREF IVREF = 100µA 1.224 1.240 1.256 V
IVREF = 100µA,
Line Regulation - 2 5 %/V
VDD = 2.6V~5.5V
Load Regulation IVREF = 0~100µA - 1 5 %/mA

Oscillator
PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Oscillation Frequency fOSC 1.0 1.2 1.4 MHz

Maximum Duty Cycle DMAX 86 90 94 %

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AAT11671
ELECTRICAL CHARACTERISTICS
(VIN = 3.3V, VDD1 = 10V, unless otherwise specified.)

Soft Start & Fault Detect

PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Channel 1 Soft Start Current ISS VSS = 1V –2 –4 –6 µA
During Fault Protect Trigger
tFP 150 164 180 ms
Time
Channel 1 to Channel 2 Delay tD12 30 34 38 ms

Channel 2 to Channel 3 Delay tD23 23 27 31 ms

IN1 Fault Protection Voltage VF1 1.00 1.05 1.10 V

IN2 Fault Protection Voltage VF2 0.20 0.25 0.30 V

EN Control Inputs Characteristics

PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Input Low Voltage VIL - - 0.4 V

Input High Voltage VIH 1.4 - - V

Error Amplifier (Channel 1)

PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Feedback Voltage VIN1 1.224 1.240 1.256 V
Input Bias Current IB1 VIN1 = 1V to 1.5V –40 0 +40 nA
Level to Produce
Feedback-Voltage Line
VEO =1.24V - 0.05 0.15 %/V
Regulation
2.3V < VDD < 5.5V
Transconductance Gm ∆I = 5µA - 85 - µS
Voltage Gain Av - 1,500 - V/V

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AAT11671
ELECTRICAL CHARACTERISTICS
(VIN = 3.3V, VDD1 = 10V, unless otherwise specified.)

N-MOS Switch
PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Current Limit ILIM - 2 - A

On-Resistance RON ISW = 1.0A - 0.2 - Ω

Leakage Current ISWOFF VSW = 12V - 0.01 20.00 µA

Negative LDO Driver (Channel 2)

PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
IN2 Threshold Voltage VIN2 IOUT2 = –100µA –15 0 +15 mV

IN2 Input Bias Current IB2 VIN2 = –0.25V to +0.25V –40 0 +40 nA

OUT2 Source Current IOUT2 VIN2 = 0.5V, OUT2 = –10V 4 20 40 mA

Low Voltage LDO

PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT

Input Voltage Range VVLV 2.5 - 5.5 V

IN4 Threshold Voltage VIN4 IOUT4 = 100mA 1.224 1.240 1.256 V

IN4 Input Bias Current IB4 VIN4 = 0V to 1.5V –40 0 +40 nA

Dropout Voltage VDROP IOUT4 = 250mA - 350 500 mV

LDO Output Current IOUT4 350 - - mA

LDO Output Current Limit ILIM4 - 500 - mA

Measure VIN4,
Line Regulation - - 5 %/V
VVLV = 2.5 ~ 5V
Measure VIN4,
Load Regulation - - 0.1 %/mA
IOUT4 = 20mA ~ 300mA

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AAT11671
ELECTRICAL CHARACTERISTICS
(VIN = 3.3V, VDD1 = 10V, unless otherwise specified.)

High Voltage Switch Controller

PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
CTL Input Low Voltage VIL - - 0.5 V
CTL Input High Voltage VIH 2 - - V

CTL Input Bias Current IB4 CTL = 0 to VDD –40 0 +40 nA

Propagation Delay CTL to
TPPLH VOUT3 = 25V - 170 - ns
VGH (Form Low to High)
Propagation Delay CTL to
TPPHL VOUT3 = 25V - 110 - ns
VGH (Form High to Low)
VOUT3 to VGH Switch R-On RONSC DLY = 1.5V, CTL = VDD - 30 60 Ω

ADJ to VGH Switch R-On RONDC DLY = 1.5V, CTL = GND - 50 100 Ω

Reset Output
PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Operating Voltage VOP 1.6 - - V

RST Output Voltage VRST IRST = 1.2mA - - 0.2 V

INR Threshold Voltage VINR - 1.1 - V

DLY Source Current IDLY VDLY = 1V –5 –10 –15 µA
DLY Threshold Voltage VDLY 1.20 1.24 1.28 V

VCOM Buffer
PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT
Input Offset Voltage VOS VVI+ = 4V - 2 12 mV
Input Bias Current IB5 VVI+ = 4V –40 0 +40 nA

VOH IVO = –50mA, VVI+ = 4V - 4.53 4.76

Output Swing V
VOL IVO = 50mA, VVI+ = 4V 3.24 3.47 -

Short Circuit Current ISHORT Measure IVO - ±200 - mA

VVI+ = 2V to 8V,
Slew Rate SR VVI+ = 8V to 2V, - 12 - µs
20% to 80%
Settling Time tS VVI+ = 3.5V to 4.5V, 90% - 5 - µs

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AAT11671
TYPICAL OPERATING CHARACTERISTICS
(VIN = 3.3V, VOUT1 = 8.5 V, VOUT2 = -6 V, VOUT3 = 22 V, TC= +25°C, unless otherwise noted.)

Boost Converter Boost Converter

Efficiency vs. Output Current Frequency vs. Input Voltage
100 1.40

90
1.35
80
1.30
70
1.25
60
9.
50 1.20
34
40 1.15
30
1.10
20
1.05
10
VIN=3.3V, VOUT1=8.5V
0 1.00
0 0.05 0.10 0.15 0.20 0.25 0.30 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.5
Output Current (A) Intput Voltage (V)

Boost Converter Boost Converter

Output Voltage vs. Output Current Efficiency vs. Output Current
100
8.60
95
8.58
90
8.56
85
8.54
80
8.52
9.
8.50 75
34
8.48 70

8.46 65

8.44 60
VOUT1=7.5V
55 VOUT1=8.5V
8.42
VOUT1=9.5V
50
8.40 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20
0 0.05 0.10 0.15 0.20 0.25 0.30
Output Current (A) Output Current (A)

VOUT4
Output Voltage vs. Output Current
2.55
2.54
2.53
2.52
2.51
9.
2.50
34
2.49
2.48
2.47
2.46
2.45
0 0.05 0.10 0.15 0.20 0.25 0.30 0.35
Output Current (A)

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AAT11671
TYPICAL OPERATING CHARACTERISTICS
(VIN = 3.3V, VOUT1 = 8.5 V, VOUT2 = -6 V, VOUT3 = 22 V, TC= +25°C, unless otherwise noted.)
Power On Sequence
Boost Converter Transient Response CDLY=0.1µF, CSS=33nF
IOUT1=10mA to 200mA IOUT1=200mA, IOUT2=10mA,IOUT3 =5mA

VOUT1
5V/div
IOUT1
100mA/div VOUT2
5V/div

VOUT1 VOUT3
(AC-COUPLED) 20V/div
100mV/div
VGH
20V/div

1ms/div 10ms/diV

Boost Converter Soft-Start Boost Converter Soft-Start

IOUT1=200mA,CSS=33nF
IOUT1=0mA,CSS=33nF

VIN
VIN
2V/div
2V/div

VOUT1 VOUT1
5V/div 5V/div

IIN IIN
500mA/div 500mA/div

2ms/div 2ms/div

Boost Converter Stability Boost Converter Stability

IOUT1=20mA IOUT1=200mA

VLX
5V/div
VLX
5V/div
VOUT1
(AC-COUPLED)
VOUT1 50mV/div
(AC-COUPLED)
50mV/div
I(INDUCTOR)
I(INDUCTOR) 500mA/div
500mA/div

500ns/div 500ns/div

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AAT11671
TYPICAL OPERATING CHARACTERISTICS
(VIN = 3.3V, VOUT1 = 8.5 V, VOUT2 = -6 V, VOUT3 = 22 V, TC= +25°C, unless otherwise noted.)

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AAT11671
PIN DESCRIPTION
PIN NO.
NAME I/O DESCRIPTION
QFN-24

1 CTL I High Voltage Switch Control Pin

2 VOUT3 - Gate High Voltage Input (Channel 3 Output Voltage)

3 VGH O Switching Gate High Voltage for TFT

4 ADJ O Gate High Voltage Fall Time Setting Pin

5 VREF O Internal Reference Voltage Output

6 IN2 I Negative Voltage LDO Feedback Pin

7 OUT2 O Negative Voltage LDO Output

8 DLY I Reset Signal Delay Control

9 RST O Reset Signal Output

10 INR I Reset Signal Detection Input

11 GND - Ground

12 IN4 I Low Voltage LDO Feedback Pin

13 OUT4 O Low Voltage LDO Output Pin

14 VLV - Low Voltage Power Pin

15 SS I Main PWM Soft Start Control Pin

16 EO O Main PWM Error Amplifier Output

17 VDD - Power Supply Input

18 SW - Main PWM Switching Pin

19 EN I Main PWM Enable and OCP Control Pin

20 IN1 I Main PWM Feedback Pin

21 GND1 - SW MOS Ground

22 VDD1 - High Voltage Power Supply Input

23 VO O Operational Amplifier Output

24 VI+ I Operational Amplifier Positive Input

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AAT11671
FUNCTION BLOCK DIAGRAM
AAT11671

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AAT11671
TYPICAL APPLICATION CIRCUIT
AAT11671
L
10µH
VIN
3.3V R1
C2
10Ω
10µF
C1
0.1µF
VOUT1
17 D
R7
VDD DFLS220L
18.6kΩ
SW 18
VOUT1
24 VI+
R8 8.57V/200mA
C3 R2
10kΩ 10µF x 4 97.6kΩ
VCOM
23 VO IN1 20
3V VOUT1
C13 R9 R3
1µF 10Ω VDD1 22 16.5kΩ
C4
0.1µF
VIN 14 VLV
VOUT4 VOUT1
13 OUT4 C5
2.5V 0.1µF
C14 R10 U1
2.2µF 56kΩ BAT54S
R12
12 IN4 SW
10kΩ R11 C7
C6
51kΩ AAT11671 0.1µF
U2 0.1µF
BAT54S
RST 9 RST
VOUT4 VOUT3
VOUT3 2
R13 23.7V/10mA
62kΩ C8
10 INR 2.2µF
R14 C9
U3 0.1µF
75kΩ BAT54S
SW
CTL 1 CTL Q1
MMBT4401
EN 19 EN
C10 R4
0.1µF 6.8kΩ
VGH 3 VGH
OUT2 7
8 DLY R5
C15 R15 1.2kΩ 49.9kΩ VOUT2
100nF IN2 6
4 ADJ –6.2V/+10mA
R16 R6
10kΩ C11
56kΩ 1µF
VREF 5
16 EO SS GND GND1
C16 C12
1nF 15 11 21 0.22µF
C17
22nF

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AAT11671
POWER ON AND POWER OFF TIMING CHART
AAT11671

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AAT11671
Table 1. Inductor Data List
DESIGN PROCEDURE C6-K1.8L rL DC CURRENT RATING
Boost Converter Design
3.9µH 41mΩ 2.5A
Inductor Selection
The minimum inductor value is selected to make sure 6.8µH 68mΩ 2.2A
that the system operates in continuous conduction 10µH 81mΩ 1.8A
mode (CCM) for high efficiency and to prevent EMI. The
MITSUMI Product-Max Height: 1.9mm
equation of inductor used a parameter ĸ, which is the
ratio of the inductor peak to peak ripple current to the Example: In the typical application circuit (Figure 1) the
input DC current. The best trade-off between voltage output load current is 200mA with 8.6V output voltage
ripple of transient output current and permanent output and input voltage of 3.3V. Choose a ĸ of 0.3 and
current has a κ between 0.2 and 0.4. efficiency of 90%.

∆ILpeak-peak 0.9 * 8.6

ηVO V L≥ 0.6163(0.3837)2 ≈ 10µH
L≥ D(1 − D)2 , D = 1 − IN , κ = 0.3 * 0.2 * 1.2 6
κIO fS VO IIN

IO
ŋ: Boost converter efficiency IIN = = 0.579A
ĸ: The ratio of the inductor peak to peak ripple current to η(1 − D)
the input DC current
VIND
VIN: Input voltage IL(peak) = IIN + = 0.664A
2Lfs
VO: Output voltage
IO: Output load current
PDCR = 0.0272W or 1.58% power loss
fS: Switching frequency
D: Duty cycle
Rectifier Diode Selection
∆ILpeak-peak: Inductor peak to peak ripple current
The Schottky diode is recommended to apply in
IIN: Input DC current
switching converter. To achieve the best efficiency,
choose a Schottky diode with less recovery capacitor
The AAT11671 SW current limit (ILIM) and inductor’s
(CT) for fast recovery time and low forward voltage (VF).
saturation current rating (ILSAT) should exceed IL(peak),
For boost converter, the reverse voltage rating (VR)
and the inductor's DC current rating should exceed IIN.
should be higher than the maximum output voltage, and
For the best efficiency, choose an inductor with less DC
the current rating should exceed the maximum inductor
resistance (rL).
current.
ILIM and ILSAT > IL(peak)
PDIODE = PDSW + PDCOM
ILDC > IIN
PDSW = (1–D) VFQRfS
VIND
IL(peak) = IIN + , QR = VRCT
2LfS
2 PDCOM = VFIO (1–D)
IO  I 
IIN = , PDCR ≈  O  rL PDIODE: Total power loss of diode for boost converter
η(1 − D)  η(1 − D) 
PDSW : Switching loss of diode for boost converter
ILDC: DC current rating of inductor PDCOM: Conduction loss of diode for boost converter
PDCR: Power loss of inductor series resistance

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AAT11671
Table 2. Schottky Data List Setting the Output Voltage
SMA VF VR CT The output voltage of boost converter is set by the
B220A 0.24V 14V 150pF resistor divider from the output (VOUT1) to GND with the
center tap connected to the IN1. Where VIN1, the boost
B240A 0.24V 28V 150pF
converter feedback regulation voltage is 1.24V. Choose
DIODES Product-MAX Height: 2.3mm R2 (Figure 1) between 5.1kΩ and 51kΩ and calculate R1
to satisfy the following equation.
Input Capacitor Selection
V 
The input capacitors have two important functions in R1 = R 2  OUT1 − 1
V
 IN1 
PWM controller. First, an input capacitor provides the
power for soft start procedure and supply the current for
the gate-driving circuit. A 10µA ceramic capacitor is
sufficient for most of the applications. Second, an input
bypass capacitor reduces the current peaks, the input
voltage drop, and noise injection into the IC. A low ESR
ceramics capacitor 0.1µF is used in typical circuit. The
bypass capacitor is required as close as possible from
VDD (Pin17) and GND (Pin11). To ensure the low noise
supply at VDD, VDD is decoupled from input capacitor
Figure 1. Feedback Circuit
using an RC low pass filter.

Loop Compensation Design

Output Capacitor Selection The loop compensation is consisted by the external
The output capacitor maintains the DC output voltage. A
resistor RC, capacitor CC and capacitor CP. Choose RC
Low ESR (rC) ceramic capacitor is recommended for the
to set the high frequency integrator gain for fast
smaller output ripple and power loss. There are two
transient response. Choose CC to set the integrator zero
parameters which can affect the output voltage ripple: 1.
to maintain loop stability. To improve the transient
the voltage drops when the inductor current flows
response, either the RC value can be increased or the
through the ESR of output capacitor; 2. charging and
CC value can be reduced. However, resistor value that is
discharging of the output capacitor also affect the output
too high or capacitor value that is too low will reduce
voltage ripple.
loop stability. The better compensation value for VIN =
3.3V is recommended by RC = 56k, CC = 1nF, CP = NC.
VRIPPLE = VRIPPLE (COUT) + VRIPPLE (ESR)

IOD
Soft-Start Selection
VRIPPLE (COUT) ≈ The AAT11671 has an adjustable soft-start to prevent
fS COUT
high inrush current during start up. The soft-start
VRIPPLE (ESR) ≈ IL(peak)rC function is implemented by the external capacitor with a
4µA constant current. The typical soft-start capacitance
range is from 22nF to 220nF. A 100nF capacitor is
usually sufficient for most of the applications.

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AAT11671
Negative LDO Driver Flying Capacitors
Output Voltage Selection Increasing the flying capacitor (Figure 2, C9) values can
The output voltage of negative LDO driver is set by a lower output voltage ripples. A 0.1µF ceramic capacitor
resistive divider from the output (VOUT2) to VREF with works well in negative LDO driver.
the center tap connected to the IN2, where IN2, the
negative LDO driver feedback regulation voltage is 0V. LDO Driver Diode
Choose R6 (Figure 2) between 5.1kΩ and 51kΩ and To achieve high efficiency, a Schottky diode should be
calculate R5 with the following equation: used. BAT54S (Figure 2, U3) has fast recovery time and
low forward voltage for the best efficiency.
 −V 
R5 = R6  OUT2 
 VREF  Setting the LDO Voltage
The LDO voltage is set by the resistor divider from the
VOUT4 to GND with the center tap connected to the IN4.
Where IN4, the LDO feedback regulation voltage is
1.24V. Choose R2 (Figure 3) between 5.1kΩ and 51kΩ
and calculate R1 to satisfy the following equation.

V 
R13 = R14  OUT4 − 1
 IN4 

Figure 2. The Negative LDO Driver

Calculation of Negative LDO Driver

Base-Emitter Resistor
For the AAT11671, the minimum drive current for
negative LDO driver is 4mA, thus the minimum
base-emitter resistance can be calculated by the
following equation:
Figure 3. LDO Circuit
R4(min) ≥ VBE(max) / (I_OUT2(min) – (IVGL / hfe(min) )) Reset Voltage design
The AAT11671 has an integrated reset voltage detector
Choose resistor R4 to be 6.8kΩ is usually sufficient for
with an open drain output. When VINR value is under the
most of the applications.
INR threshold voltage 1.1V, the pin RST would be pulled
Table 3. Pass Transistor Specifications low by inside MOS. The VDetector can be calculated as
MMBT4401 (NPN) below：
VBE(max) R13
0.65V VDetector = 1.1V × (1 + )
R14
hfe(min) 130
VDetector
DIODES Product, Case: SOT23 R13 = ( − 1) × R14
1.1V
R14 is recommended to be between 5.1kΩ and 30kΩ.
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AAT11671
LAYOUT CONSIDERATION
The system’s performances including switching noise,
transient response, and PWM feedback loop stability
are greatly affected by the PC board layout and
grounding. There are some general guidelines for
layout:

Inductor
Always try to use a low EMI inductor with a ferrite core.

Filter Capacitors
Place low ESR ceramics filter capacitors (between
Figure 4. The Application Circuit of Reset Function 0.1µF and 0.22µF) close to VDD and VREF pins. This
will eliminate as much trace inductance effects as
The delay time (TD) is set by capacitor C14. The delay possible and give the internal IC rail a cleaner voltage
time (TD) can be calculated as below: supply. The ground connection of the VDD and VREF
by pass capacitor should be connected to the analog
C14 * 1.24V
TD = ground pin (GND) with a wide trace.
10µA
Output Capacitors
Minimize the length and maximize the width of traces to
get the best transient response and reduce the ripple
noise. We choose 10µF ceramics capacitor to reduce
the ripple voltage, and use 0.1µF ceramics capacitor to
reduce the ripple noise.

Feedback
If external compensation components are needed for
stability, they should also be placed close to the IC.
Take care to avoid the feedback voltage-divider
resistors’ trace near the SW. Minimize feedback track
lengths to avoid the digital signal noise of TFT control
board.

Ground Plane
Figure 5. The Timing Chart of Reset Function The grounds of the IC, input capacitors, and output
capacitors should be connected close to a ground plane.
VCOM Buffer
It would be a good design rule to have a ground plane
The VCOM buffer is usually used to drive VCOM for
on the PCB. This will reduce noise and ground loop
TFT-LCD. The buffer is not designed to drive high
errors as well as absorb more of the EMI radiated by the
capacitive loads, so it is recommended to connect a low
inductor. For boards with more than two layers, a
pass filter with 10Ω resistor and 1µF capacitor. This
ground plane can be used to separate the power plane
would provide stable operation when driving high
and the signal plane for improved performance.
capacitive load.

– 台灣類比科技股份有限公司 –
– Advanced Analog Technology, Inc. –
Version 0.01
Page 17 of 18
 Advanced Analog Technology, Inc. April 2009

AAT11671
PACKAGE DIMENSION
VQFN-24 4*4

Dimensions In Millimeters
Symbol
MIN TYP MAX
A 0.75 0.90 1.00
A1 0 0.02 0.05
b 0.18 0.23 0.30
C 0.19 0.20 0.25
D 3.90 4.00 4.10
D2 2.70 2.80 2.90
E 3.90 4.00 4.10
E2 2.70 2.80 2.90
e ----- 0.50 -----
L 0.30 0.40 0.50
y 0 ----- 0.076

– 台灣類比科技股份有限公司 –
– Advanced Analog Technology, Inc. –
Version 0.01
Page 18 of 18