0% found this document useful (0 votes)
46 views5 pages

Assignment 3: First Semester Session 1441/1442 AH

This document appears to be an assignment sheet for a computer architecture course. It includes instructions for the assignment such as the course details, deadline, and grading rubric. It also lists 5 questions related to computer architecture topics such as addressing modes, branching instructions, and the importance of effective addresses. Students are asked to provide examples, diagrams, and explanations for each question. The assignment is due on November 18th, 2020 and will be handwritten.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
46 views5 pages

Assignment 3: First Semester Session 1441/1442 AH

This document appears to be an assignment sheet for a computer architecture course. It includes instructions for the assignment such as the course details, deadline, and grading rubric. It also lists 5 questions related to computer architecture topics such as addressing modes, branching instructions, and the importance of effective addresses. Students are asked to provide examples, diagrams, and explanations for each question. The assignment is due on November 18th, 2020 and will be handwritten.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 5

Assignment 3

First Semester
Session 1441/1442 AH

Student Name :

Student ID :

Student Signature :

Department : Department of Computer Science Marks


Course Code : COCS 311
Course Name : Computer Architecture
Deadline : Wednesday, November 18, 2020
Number of Exam Pages : 2
6
Marks
Outcome 1 /5
5 Marks
NB! Only Hand Written assignment will be evaluated.
Outcome 2 /1
1 Marks

Total Marks
(In Figure) / 6 Marks

Total Marks
(In Words)

This study source was downloaded by 100000845003804 from CourseHero.com


1 on
of 08-19-2022
5 06:27:55 GMT -05:00

https://www.coursehero.com/file/140688888/Assignmnet-3pdf/
Outcome 1 &2 [6]
Q1. [1.2] [2]
a. Illustrate with an example the following addressing mode
I. Immediate II. Direct III. Indirect IV. Register V. Register Indirect VI. Displacement
b. Sketch a neat diagram to represent its functionality.

Q2. Illustrate branching, conditional jumping and unconditional jumping of the Control Instruction.
Write an example for each one. [1.2] [1]

Q3. Write the mnemonics to multiply the two numbers. First assign the value 25H and 32H into
registers. Then write mnemonics to find the multiplication. [1.2] [1]

Q4. Write the difference between direct and register indirect addressing. [1.1] [1]

Q5. Evaluate the importance of Effective address. [2.3] [1]

Best of Luck

This study source was downloaded by 100000845003804 from CourseHero.com


2 on
of 08-19-2022
5 06:27:55 GMT -05:00

https://www.coursehero.com/file/140688888/Assignmnet-3pdf/
Q1.
Mode Algorithm Principal Advantage Principal Disadvantage
Immediate Operand = A No memory reference Limited operand magnitude
Direct EA = A Simple Limited address space
Indirect EA = (A) Large address space Multiple memory references
Register EA = R No memory reference Limited address space
Register indirect EA = (R) Large address space Extra memory reference
Displacement EA = A + (R) Flexibility Complexity

Immediate: ADD BYTE_VALUE, 65; An immediate operand 65 is added

Direct: ADD BYTE_VALUE, DL; Adds the register in the memory location

Indirect: MOV EBX, [MY_TABLE]; Effective Address of MY_TABLE in EBX

Register: MOV DX, TAX_RATE; Register in first operand

This study source was downloaded by 100000845003804 from CourseHero.com


3 on
of 08-19-2022
5 06:27:55 GMT -05:00

https://www.coursehero.com/file/140688888/Assignmnet-3pdf/
Register indirect: LDR R2, [R0]; Load R2 with the word pointed by R0

Displacement: MOVL 12(R5), R3(movl is a mov with operand size 32,)

Q2.

Branching instructions refer to the act of switching execution to a different instruction sequence as a result of
executing a branch instruction.
The three types of branching instructions are:
• Jump (unconditional and conditional)
• Call (unconditional and conditional)
• Return (unconditional and conditional)

Unconditional Jump Instructions: Transfers the program sequence to the described memory address

OPCODE OPERAND EXPLANATION EXAMPLE


JMP address Jumps to the address JMP 2050

This study source was downloaded by 100000845003804 from CourseHero.com


4 on
of 08-19-2022
5 06:27:55 GMT -05:00

https://www.coursehero.com/file/140688888/Assignmnet-3pdf/
Conditional Jump Instructions: Transfers the program sequence to the described memory address only if the
condition in satisfied.

OPCODE OPERAND EXPLANATION EXAMPLE


JC address Jumps to the address if carry flag is 1 JC 2050
JNC address Jumps to the address if carry flag is 0 JNC 2050
JZ address Jumps to the address if zero flag is 1 JZ 2050
JNZ address Jumps to the address if zero flag is 0 JNZ 2050

Q3.

MVI C,25H Load value 25 in register C


MVI E,32H Load value 32 in register E
MVI D 00 Assigns 00 to 0
LXI H 0000 Assigns 00 to H and 00 to L
DAD D Adds HL and DE and assigns the result to HL
DCR C Decrements C by 1
JNZ 200A Jumps program counter to 200A if Zero flag = 0
SHLD 3050 Stores value of H at memory location 3051 and L at 3050
HLT Stops executing the program

Q4.

DIRECT ADDRESSING MODE INDIRECT ADDRESSING MODE


Address field contains the effective address of Address field contains reference of effective address
operand
Requires only one memory reference Requires two memory references
Fast addressing Slower than direct addressing mode
No further classification Further classified into two categories
No further calculation is required to perform the Require further calculation to find the effective
operation address

Q5.

It is the physical designation of a function of the physical address and memory management unit (MMU) that
the programmer does not see. In a virtual memory device, the virtual address or registry is the active address.
The active address in a machine without virtual memory will be either a memory master address or a register,
so the effective address is an offset for the header instruction.

This study source was downloaded by 100000845003804 from CourseHero.com


5 on
of 08-19-2022
5 06:27:55 GMT -05:00

https://www.coursehero.com/file/140688888/Assignmnet-3pdf/
Powered by TCPDF (www.tcpdf.org)

You might also like