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This document contains an assignment for a digital logic and design course. It includes 14 questions covering logic simplification using Boolean algebra and Karnaugh maps. Students are asked to simplify expressions, develop truth tables, design logic circuits, minimize expressions using K-maps, and more. The assignment is due on March 2nd and issued by the Department of Computer Engineering at King Faisal University in Saudi Arabia.

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0% found this document useful (0 votes)
127 views

Assignment 2 Updated

This document contains an assignment for a digital logic and design course. It includes 14 questions covering logic simplification using Boolean algebra and Karnaugh maps. Students are asked to simplify expressions, develop truth tables, design logic circuits, minimize expressions using K-maps, and more. The assignment is due on March 2nd and issued by the Department of Computer Engineering at King Faisal University in Saudi Arabia.

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© © All Rights Reserved
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CE 213: DIGITAL LOGIC AND DESIGN

Assignment -2
Logic Simplifications

Issue Date: Saturday, 26 February 2022

Submission Deadline: Wednesday, 02 March 2022

Dept. of Computer Engineering


King Faisal University
Al Ahsa 31982, Saudi Arabia.

February 26, 2022 Dr. Al-Amin Bhuiyan [email protected] Page 1 of 2


CE 213: DIGITAL LOGIC AND DESIGN

1. Multiple Choice Questions


A. The output of the following k-map can be written as: F. The output (x) of the following truth table can be written
in m-term expression as:
i. x y
i. x   m (2, 5)
ii. x z
ii. x   m (2, 6)
iii. x y iii. x   m (3, 5)
iv. x   m (3, 6)
iv

B. What will be the expression of the output (Y) for the G. The following SOP expression can be written in _______
following truth table? m-term expression.

i. A B  A B i. F   m (2, 5)
ii. F   m (2, 6)
ii. A B  A B iii. F   m (3, 5)
iii. A B  A B
iv. F   m (3, 6)

iv
C. The output of the following K-map can be expressed as: H. The minimum expression for the K map in the following
figure will be ___________.
i. A B  C D
i. A C  A B  D
ii. A B C D ii. A B  A B  B D
iii. A C iii. A B  A D  B D
iv A B D  A C  A B
iv B D

1. D. For the minterm designation Y = ∑ m (1, 3, 5, 7) the I. For the truth table of the following figure, the output Y can
complete expression is ____ . be expressed as:

i. Y=A + B + C
ii. Y=Ā +BC
iii. Y= Ā
iv. Y= B

E. The output of the following K-map can be expressed as: J. For the K map in the given figure the simplified Boolean
expression is ____ .
i. A B  C D i. A C  B C  A C D
2.
ii. A B C D ii. A C  B C  A C D
iii. A B  B C  A C D
iii. A C
iv A C  B  C D
iv B D

February 26, 2022 Dr. Al-Amin Bhuiyan [email protected] Page 2 of 2


CE 213: DIGITAL LOGIC AND DESIGN

Assignment -2
Logic Simplification and K-Map

Issue Date: Saturday, 26 February 2022

Submission Deadline: Wednesday, 02 March 2022

Dept. of Computer Engineering


King Faisal University
Al Ahsa 31982, Saudi Arabia.

February 26, 2021 Dr. Al-Amin Bhuiyan [email protected] Page 1 of 4


CE 213: DIGITAL LOGIC AND DESIGN
1. Simplify the following expressions using Boolean algebra.

2. Simplify the following circuit using Boolean algebra.

3. Develop a truth table for each of the SOP expressions:


a. 𝐴̅𝐵 + 𝐴𝐵𝐶̅ + 𝐴̅𝐶̅ + 𝐴𝐵̅𝐶
b. 𝑋̅ + 𝑌𝑍̅ + 𝑊𝑍 + 𝑋𝑌̅𝑍
4. Design the logic circuit corresponding to the truth table shown in Table 1.
Table 1

A B C X
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

5. Design a logic circuit whose output is HIGH only when a majority of inputs A, B, and C are
LOW.

February 26, 2021 Dr. Al-Amin Bhuiyan [email protected] Page 2 of 4


CE 213: DIGITAL LOGIC AND DESIGN
6. Develop a logic circuit with four input variables (A, B, C, and D) that will only produce a 1
output when exactly three input variables are 1s.

7. A four-bit binary number is represented as A3A2A1A0 where A3, A2, A1 and A0 represent
the individual bits and A0 is equal to the LSB. Design a logic circuit that will produce a HIGH
output whenever the binary number is greater than 0010 and less than 1000.

8. Determine the minimum expression for each K map for the following figure.

9. Determine the minimum expression for each K map for the following figures.

10. Simplify the expressions below using K map.

February 26, 2021 Dr. Al-Amin Bhuiyan [email protected] Page 3 of 4


CE 213: DIGITAL LOGIC AND DESIGN

11. Determine the minimum expression for each K map in the following figures.

12. Use the K map method to implement the simplest SOP expression for the logic function
specified in the following Table.

C’D’ C’D CD CD’


A’B’ 0 1 0 1
A’B 0 0 1 1
AB X X X X
AB’ 1 0 X X

13. Simplify the expressions below using K map.


a. 𝑦 = (𝐶̅̅̅̅̅̅̅̅
+ 𝐷) + 𝐴̅𝐶𝐷 ̅ + 𝐴𝐵̅ 𝐶̅ + 𝐴̅𝐵̅ 𝐶𝐷 + 𝐴𝐶𝐷
̅
b. 𝑥 = 𝐴𝐵(𝐶 ̅̅̅̅
̅ 𝐷) + 𝐴̅𝐵𝐷 + 𝐵̅ 𝐶̅ 𝐷
̅
c. 𝑧 = [𝐴𝐵̅ (𝐶 + 𝐵𝐷) + 𝐴̅𝐵̅ ]𝐶

14. Use a Karnaugh map to minimize the following standard SOP expression:

AB C  A BC  A B C  A B C  AB C

February 26, 2021 Dr. Al-Amin Bhuiyan [email protected] Page 4 of 4

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