AMERICAN UNIVERSITY OF SCIENCE & TECHNOLOGY

FACULTY OF ENGINEERING
DEPARTMENT OF COMPUTER AND COMMUNICATIONS ENGINEERING

DIGITAL SYSTEMS LAB

CCE 220L
Report # 4

LOGIC GATES

Prepared by
Michel Abou Haidar

Presented to
Mr. Anthony Alhadchiti

November 25, 2021

Achrafieh Campus
ABSTRACT
The goal of this experiment was to understand the theory behind the adders and
subtractors, use truth tables and K-maps to deduce the experiment’s Boolean algebra
expression and simplify it to get the shortest circuit with less components.

The goal of this experiment

was to get familiar with the
proto-board, understand how
to
connect ICs, understand the
logic behind each gate and to
learn how to make a very
simple
circuit.
The goal of this experiment
was to get familiar with the
proto-board, understand how
to

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connect ICs, understand the
logic behind each gate and to
learn how to make a very
simple
circuit.

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 List of Figures

Figure 1. Test board........................................................................................................1

Figures 2. AND Logic gate..............................................................................................2
Figure 3. NOT Logic gate...............................................................................................2
Figure 4. OR Loic gate....................................................................................................2
Figures 5. Schematic representation of the adder and subtractors............................5
Figures 6. Circuit on the test-board...............................................................................7

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 LIST OF TABLES

Table 1. AND gate truth table……………………….…………………………………2

Table 2. NOT gate truth table………………………………………….….……………2

Table 3. OR gate truth table…………………………………………….….……………3

Tables 4.Truth tables…………….………………………………………………………7

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 Table of Contents

I. OBJECTIVES..........................................................................................................1
II. BACKGROUND THEORY................................................................................1
III. REQUIRED COMPONENTS.............................................................................4
IV. SCHEMATIC REPRESENTATION.................................................................5
V. PROCEDURE.......................................................................................................7
VI. CONCLUSION...................................................................................................11
REFERENCES..............................................................................................................12

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 I. Objectives

1. To use the Boolean expression in simplifying and building any logic circuit.
2. To discover the behavior and demonstrate the operation of a logic gate.
3. To use the Boolean algebra to help designing a real life useful system.

II. Background Theory

1. A Test board is used to build and test circuits in an easy way, to conduct
a test on circuits before having the final project.
We are using a test board to demonstrate the experiment’s operation by
building a circuit in which we will insert the correspondent IC.

Figure 1. Test board

2. The AND function states that the output will become true if only both of
the inputs are true This function is shown in the truth table below.

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 Figure 2. AND gate

Table 1. AND gate truth table

A B C
0 0 0
0 1 0
1 0 0
1 1 1

3. The NOT function states that the output is the opposite of the input. This
function is shown in the truth table below.

Figure 3. NOT gate

Table 2. NOT gate truth table

A out
0 1
1 0

4. The OR function states that the output will become true if only one of the
inputs or both are true. This function is shown in the truth table below.

Figure 4. OR gate

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 Table 3. OR gate truth table
A B C
0 0 0
0 1 1
1 0 1
1 1 1

5. The resistor is an electronic device, used in this experiment to divide the

voltage which can protect the LED light (broken on higher voltage).

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III. Required Components
1. Resistors: 330Ω (2)
2. Voltage Source
3. Test Board
4. Connecting wires
5. Green LED lights (2)
6. Quad 2-input IC 7408 (AND)
7. Hex inverter IC 7404 (NOT)
8. Quad 2-input IC 7432 (OR)
9. Switches (3)

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IV. Schematic Representation

Figure 5a. Schematic representation of the half adder.

Figure 5b. Schematic representation of the full adder.

Figure 5c. Schematic representation of half subtractor.

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Figure 5d. Schematic representation of the full subtractor.

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V. Procedure

 To design a half adder we need a combinational circuit that receives two inputs and
produces two outputs verifying the SUM and the CARRY of the addition of two
bits.
This design could be made with a simple truth table of two inputs.
0+0=0 0+1=1 1+1=10 (addition operations)

Table 4a. Truth table

A B SUM= CARRY=C From the truth table we have:

S S= A B+ A B= A ⊕ B
0 0 0 0 C= A B
0 1 1 0 The Sum and Carry are in simplified form.
1 0 1 0 The schematic representation of the circuit is in
1 1 0 1 figure.

Figure 6a. Schematic representation of the half adder.

 To design a full adder we need a combinational circuit that receives three inputs and
produces the same two outputs the SUM and the CARRY the addition of the three
bits.
This design could be made with a simple truth table or a K-map.

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 Table 4b. Truth table
A B C SUM=S CARRY=C From the truth table we have:

0 0 0 0 0 S= A B C+ A B C+ A B C+ ABC
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
S=C ( A B+ AB ) +C (A B+ A B)
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

S=C ( A ⊕ B )+C ( A ⊕ B)
S= A ⊕ B ⊕ C
C= A B C + A B C + AB C+ ABC
C= A BC + A B C + AB C+ ABC + ABC + ABC

C= AB ( C +C ) + A C ( B+ B ) + BC ( A+ A)
C= A B + A C+ BC

Table 4c. K-maps of S and C

S C

BC
00 01 11 10
A

0 0 1 0 1
1 1 0 1 0
BC
A

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 0 0 0 1 0
1 0 1 1 1

Figure 6b. Schematic representation of the full adder.

 To design a half substractor we need a combinational circuit that receives two inputs
and produces two outputs verifying the BORROW and the DIFFERENCE of the
substraction of the two bits.

Table 4c. Truth table

A B DIFFERENCE=D BORROW=B From the truth table we have:

0 0 0 0 D= A B+ A B= A ⊕ B
0 1 1 1 B= A B
1 0 1 0 The Borrow and Difference are in
1 1 0 0 simplified form.

 To design a full subtractor we need a combinational circuit that receives three inputs
and produces the same two outputs the BORROW and the DIFFERENCE the
substraction of the three bits.
This design could be made with a simple truth table or a K-map.

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 Table 4d. Truth table

A B C DIFFERENCE=D BORROW=B From the truth table we have:

0 0 0 0 0 D= A B C+ A B C+ A B C+ ABC
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

D=C ( A B+ AB ) +C ( A B+ A B)
D=C ( A ⊕B ) +C ( A ⊕ B)
D= A ⊕ B ⊕ C
B= A B C+ A B C+ A BC + ABC
B= A B C+ A B C+ A BC + ABC + ABC + ABC

B= A B ( C+C ) + A C ( B+ B )+ BC ( A + A )
B= A B+ A C+ BC

Table 3. K-maps of S and C

S C

BC
00 01 11 10
A

0 0 1 0 1
1 1 0 1 0
BC
A

0 0 1 1 1
1 0 0 1 0

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 Figure 6c. Schematic representation of the full subtractor.
1) Prepare the test-board, connection wires, resistors, ICs, LEDs and switches.
2) Implement the circuits shown in the schematic representations above.
3) Verify the truth tables by trying different switches positions.

VI. Conclusion

We conclude that using the Boolean algebra, the truth tables and the K-maps helps
us in minimizing the chip count and gives us a faster circuit, adding to that using
less power, and generating less heat. We succeed in designing adders and
subtractors in the most efficient way and the best result we can have.

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 REFERENCES

TEXT

[1] Mr. Abillama. Circuit Analysis Lab Workbook,

REFERENCES

[2] Mr. Marwan Halabi, Lab Workbook & Notes.

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