Microprocessor Viva
Microprocessor Viva
1. What are the various registers in 8085? - Accumulator register, Temporary register, Instruction
register, Stack Pointer, Program Counter are the various registers in 8085 .
2. In 8085 name the 16 bit registers? - Stack pointer and Program counter all have 16 bits.
3. What are the various flags used in 8085? - Sign flag, Zero flag, Auxillary flag, Parity flag, Carry
flag.
4. What is Stack Pointer? - Stack pointer is a special purpose 16-bit register in the Microprocessor,
which holds the address of the top of the stack.
5. What is Program counter? - Program counter holds the address of either the first byte of the next
instruction to be fetched for execution or the address of the next byte of a multi byte instruction, which
has not been completely fetched. In both the cases it gets incremented automatically one by one as the
instruction bytes get fetched. Also Program register keeps the address of the next instruction.
6. Which Stack is used in 8085? - LIFO (Last In First Out) stack is used in 8085.In this type of Stack
the last stored information can be retrieved first.
7. What happens when HLT instruction is executed in processor? - The Micro Processor enters into
Halt-State and the buses are tri-stated.
8. What is meant by a bus? - A bus is a group of conducting lines that carriers data, address, & control
signals.
9. What is Tri-state logic? - Three Logic Levels are used and they are High, Low, High impedance state.
The high and low are normal logic levels & high impedance state is electrical open circuit conditions. Tri-
state logic has a third line called enable line.
10. Give an example of one address microprocessor? - 8085 is a one address microprocessor.
11. In what way interrupts are classified in 8085? - In 8085 the interrupts are classified as Hardware
and Software interrupts.
12. What are Hardware interrupts? - TRAP, RST7.5, RST6.5, RST5.5, INTR.
13. What are Software interrupts? - RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.
14. Which interrupt has the highest priority? - TRAP has the highest priority.
15. Name 5 different addressing modes? - Immediate, Direct, Register, Register indirect, Implied
addressing modes.
16. How many interrupts are there in 8085? - There are 12 interrupts in 8085.
17. What is clock frequency for 8085? - 3 MHz is the maximum clock frequency for 8085.
18. What is the RST for the TRAP? - RST 4.5 is called as TRAP.
19. In 8085 which is called as High order / Low order Register? - Flag is called as Low order
register & Accumulator is called as High order Register.
20. What are input & output devices? - Keyboards, Floppy disk are the examples of input devices.
Printer, LED / LCD display, CRT Monitor are the examples of output devices.
21. Can an RC circuit be used as clock source for 8085? - Yes, it can be used, if an accurate clock
frequency is not required. Also, the component cost is low compared to LC or Crystal.
22. Why crystal is a preferred clock source? - Because of high stability, large Q (Quality Factor) & the
frequency that doesn’t drift with aging. Crystal is used as a clock source most of the times.
23. Which interrupt is not level-sensitive in 8085? - RST 7.5 is a raising edge-triggering interrupt.
24. What does Quality factor mean? - The Quality factor is also defined, as Q. So it is a number, which
reflects the lossness of a circuit. Higher the Q, the lower are the losses.
25. What are level-triggering interrupt? - RST 6.5 & RST 5.5 are level-triggering interrupts.
1.What is a Microprocessor?
Microprocessor is a CPU fabricated on a single chip, program-controlled device, which fetches the
instructions from memory, decodes and executes the instructions.
3. What is Bandwidth ?
Clock speed is measured in the MHz and it determines that how many instructions a processor can
processed. The speed of the microprocessor is measured in the MHz or GHz.
Features:
· In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even
addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on
the upper half of the data bus (bits 8-15).
· The 8086 can read a 16-bit word at an even address in one operation and at an odd address
in two operations. The 8088 needs two operations in either case.
· The least significant byte of a word on an 8086 family microprocessor is at the lower
address.
• A memory address on the 8086 consists of two numbers, usually written in hexadecimal and
separated by a colon, representing the segment and the offset. This combination of segment and
offset is referred to as a logical address
• This example copies a word sized value into the register AX.
• Combined, the three parameters in brackets determine what is called the effective address,
which is simply the offset referenced by the instruction
In 8086 Carry flag, Parity flag, Auxiliary carry flag, Zero flag, Overflow flag, Trace flag, Interrupt flag,
Direction flag, and Sign flag.
Because of high stability, large Q (Quality Factor) & the frequency that doesn’t drift with aging.
Crystal is used as a clock source most of the times.
Three Logic Levels are used and they are High, Low, High impedance state. The high and low are
normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a
third line called enable line.
The Micro Processor enters into Halt-State and the buses are tri-stated.
The processor made of PMOS / NMOS / HMOS / HCMOS technology is called 1st / 2nd / 3rd / 4th
generation processor, and it is made up of 4 / 8 / 16 / 32 bits.
High-end: Intel - Pentium (II, III, 4), AMD - Athlon. Low-end: Intel - Celeron, AMD - Duron. 64-bit:
Intel - Itanium 2, AMD - Opteron.
Address bus: This is used to carry the Address to the memory to fetch either Instruction or Data.
Data bus : This is used to carry the Data from the memory.
Control bus : This is used to carry the Control signals like RD/WR, Select etc.
An interrupt that can be turned off by the programmer is known as Maskable interrupt.
An interrupt which can be never be turned off (ie. disabled) is known as Non-Maskable interrupt
Bus Interface Unit and Execution unit, are the two different functional units in 8086.
Execution Unit receives program instruction codes and data from BIU, executes these instructions
and store the result in general registers.
24.Which Stack is used in 8086? k is used in 8086?
FIFO (First In First Out) stack is used in 8086.In this type of Stack the first stored information is
retrieved first.
In 8086 Carry flag, Parity flag, Auxiliary carry flag, Zero flag, Overflow flag, Trace flag, Interrupt flag,
Direction flag, and Sign flag.
RIM is Read Interrupt Mask. Used to check whether the interrupt is Masked or not.
<1> Immediate:-The Immediate data is a part of instruction, and appears in the form of successive
bytes.
<2> Direct:-A 16-bit memory address(offset) is directly specified in the instruction as a part of it.
<3> Register:-Data is stored in a register and it is referred using the particular register (except IP).
<4> Register Indirect:-The address of the memory location which contains data or operand is
determined in an indirect way.
<6> Register Relative:-The data is available at an eefective address formed by adding an 8-bit or 16-
bit displacement with the content of any one of the registers BX,BP,SI and DI in the default (either
DS or ES) segment.
<7> Based Indexed:-The effective address of the data is formed,in this addressing mode,by adding
content of a base register to the content of an index register.
<8> Relative Based Indexed:- The effective address is formed by adding an 8 or 16-bit displacement
with the sum of contents of any one of the base registers and any one of the index registers,in the
default segment.
<9> Intrasegment Direct Mode:-In this mode,the address to which the control is to bve transferred
lies in the segment in which the control transfer instruction lies and appears directly in the
instruction as an immediate displacement value.
<10> Intrasegment Indirect Mode:-In this mode,the displacement to which the control is to be
transferred,is in the same segment in whgich the control transfer instruction lies,but it is passed to
the instruction indirectly.
<11> Intersegment Direct:-In this mode,the address to which the control is to be transferred is in a
different segment.
<12> Intersegment Indirect:-In this mode,the address to which the control is to be transferred lies in
a different segment and it is passed to the instruction indirectly sequentially.
A:- The Registers AX,BX,CX,DX are the general Purpose 16-bit registers.AX register as 16-bit
accumulator.BX register is used as an offset Storage.CX register is used as default or implied
counter.Dx register is used as an implicit operand or destination in case of a few instructions.
A:-There are 4 Segment Registers Code Segment(CS),Data Segment(DS),Extra Segment(ES) & Stack
Segment(SS) registers.CS is used for addressing memory locationin code.DS is used to points the
data.ES refers to a segment which is essentially in another data segment.SS is used fopr addressing
stack segment of memory.
A:-Divided into 2 parts:-Condition code or status flags and machine control flags.
Z-Zero Flag:-Is to set if the result of the computation or comparision performed by the previous
instruction is zero.
C-Carry Flag:-Is set when there is carry out of MSB in case of addition or a borrow in case of
subtraction.
T-Trap Flag:-Is set,the processor enters the single step execution mode.
AC-Auxiliary Carry Flag:-Is set if there is a carry from the lowest nibble during addition or borrow for
the lowest nibble.
O-Overflow Flag:-Is setif the result of a signed operation is large enough to be accommodated in a
destination register.
A:-The complete architecture of 8086 can be divided into 2types :-Bus Interface Unit(BIU) &
Execution Unit.
The BIU contains the circuit for physical address calculations and a precoding instruction byte queue
& it makes the bus signals available for external interfacing of the devices.
The EU contains the register set of 8086 except segment registers and IP.It has a 16-bit ALU,able to
perform arithmetic and Logic operations.
A:- Mov, Push, Pop, Xchg, In, Out, Xlat, Lea, Lds/Les, Lahf, Sahf, Pushf, Popf
A:- The complete architecture of 8086 can be divided into 2types :-Bus Interface Unit(BIU) &
Execution Unit.
The BIU contains the circuit for physical address calculations and a precoding instruction byte queue
& it makes the bus signals available for external interfacing of the devices.
The EU contains the register set of 8086 except segment registers and IP.It has a 16-bit ALU,able to
perform arithmetic and Logic operations.
37.What is an Interrupts
Def:- An interrupt operation suspends execution of a program so that the system can take special
action.The interrupt routine executes and normally returns control to the interrupted procedure,
which then resumes execution.BIOS handles Int 00H-1FH, whereas DOS handles INT 20H-3FH.
A:-The part of the instruction that specifies the operation to be performed is called the Operation
code or Op code.
39.What is an Operand?
A CALL instruction leaves information on the stack so that the original program execution sequence
can be resumed.
43.What is an Instruction?
A:-An instruction is a binary pattern enetered through an input device to command the
microprocessor to perform that specific function.
A:- Microcontroller is a device that includes microprocessor:memory and I/O signal lines on a single
chip,fabricated using VLSI technology.
45.What is Assembler?
A:-The assembler translates the assembly language program text which is given as input to the
assembler to their binary equivalents known as object code.
The time required to translate the assembly code to object code is called access time.The assembler
checks for syntax errors&displays them before giving the object code.
46.Define Variable?
A:-A Variable is an identifier that is associated with the first byte of data item.
47.Explain Dup?
A:-The DUP directive can be used to initialize several location & to assign values to these locations.
48.Define Pipelining?
A:-In 8086,to speedup the execution program,the instructions fetching and execution of instructions
are overlapped each other.this is known as Pipelining.
A:-HLDA is the acknowledgment signal for HOLD. It indicates whether the HOLD signal is received or
not.
HOLD and HLDA are used as the control signals for DMA operations.
A:-LEA(Load Effective Address) is used for initializing a register with an offset address.
A common use for LEA is to intialize an offset in BX, DI or SI for indexing an address in memory.
An equivalent operation to LEA is MOV with the OFFSET operator, which generates slightly shorter
machine code.
A:-Shift and Rotate commands are used to convert a number to another form where some bits are
shifted or rotated.
A rotate instruction is a closed loop instruction.That is,the data moved out at one end is put back in
at the other end.
The shift instruction loses the data that is moved out of the last bit locations.
Basic difference between shift and rotate is shift command makes "fall of " bits at the end of the
register.
Where rotate command makes "wrap around" at the end of the register.
A:- .MODEL directive:-This simplified segment directive creates default segments and the required
ASSUME and GROUP statements.
Small:-Code in one segment (<=64K), data in one segment (<=64K). It generates 16-bit offset
addresses.
Compact:-Code in one segment (<=64K), any number of data segments. It generates 32-bit adresses,
which require more time for execution.
Huge:-Code and data both in any number of segments, arrays may be >64K.
Flat:-Defines one area upto 4 gigabytes for both code and data.It is unsegmented.The program uses
32-bit adressing and runs under Windows in protected mode.
A:-REP=Repeat.
MOVS=Move Byte/Word
CMPS=Compare Byte/Word
SCAS=Scan Byte/Word
A:-READY is used by the microprocessor to check whether a peripheral is ready to accept or transfer
data.
If READY is high then the periphery is ready for data transfer. If not the microprocessor waits until
READY goes high.
If this flag bit is 0 , the string is processed beginning from the lowest to the highest
address,i.e.,.Autoincrement mode.
The basic units or blocks of a microprocessor are ALU, an array of registers and control unit.
The Software is a set of instructions or commands needed for performing a specific task by a
programmable device or a computing machine.
The Hardware refers to the components or devices used to form computing machine in which the
software can be run and tested. Without software the Hardware is an idle machine.
60.What is assembly language?
The language in which the mnemonics (short -hand form of instructions) are used to write a program
is called assembly language. The manufacturers of microprocessor give the mnemonics.
The software developed using 1's and 0's are called machine language,programs. The software
developed using mnemonics are called assembly language programs.
62. What is the drawback in machine language and assembly language, programs?
The machine language and assembly language programs are machine dependent. The programs
developed using these languages for a particular machine cannot be directly run on another machine
A digit of the binary number or code is called bit. Also, the bit is the fundamental storage unit of
computer memory.
The 8-bit (8-digit) binary number or code is called byte and 16-bit binary number or code is called
word. (Some microprocessor manufactures refer the basic data size operated by the processor as
word).
Bus is a group of conducting lines that carries data, address and control signals.
The microprocessor has to fetch (read) the data from memory or input device for processing and
after processing, it has to store (write) the data to memory or output device. Hence the data bus is
bi-directional.
The address is an identification number used by the microprocessor to identify or access a memory
location or I / O device. It is an output signal from the processor. Hence the address bus is
unidirectional.
The microprocessor is the master in the system, which controls all the activity of the system. It issues
address and control signals and fetches the instruction and data from memory. Then it executes the
instruction to take appropriate action.
The 8086 can operate in two modes and they are minimum (or uniprocessor) mode and maximum (
or multiprocessor) mode.
The signal M/IO is used to differentiate memory address and 1/0 address When the processor is
accessing memory locations MI 10 is asserted high and when it is accessing 1/0 mapped devices it is
asserted low.
The interrupts of 8085 are INTR and NMI. The INTR is general
17. How clock signal is generated in 8086? What is the maximum internal clock frequency of 8086?
The 8086 does not have on-chip clock generation circuit. Hence the clock generator chip, 8284 is
connected to the CLK pin of8086. The clock signal supplied by 8284 is divided by three for internal
use. The maximum internal clock frequency of 8086 is 5MHz.
18. Write the special functions carried by the general purpose registers of 8086.
The special functions carried by the registers of 8086 are the following.
1. AX 16-bit Accumulator
2. AL 8-bit Accumulator
3. BX Base Register
4. CX Count Register
5. DX .Data Register
The bus interface unit and execution unit are the two functional units available in 8086
architecture.\
The segment registers of 8086 are Code segment, Data segment, Stack segment and Extra segment
registers.
Machine cycle is defined as the time required to complete one operation of accessing memory, I/O,
or acknowledging an external request. This cycle may consist of three to six T-states.
T-State is defined as one subdivision of the operation performed in one clock period. These
subdivisions are internal states synchronized with the system clock, and each T-State is precisely
equal to one clock period.
24. List the components of microprocessor (single board microcomputer) based system
The microprocessor based system consist of microprocessor as CPU, semiconductor memories like
EPROM and RAM, input device, output device and interfacing devices.
Generally I/O devices are slow devices. Therefore the speed of I/O devices does not match with the
speed of microprocessor. And so an interface is provided between system bus and I/O devices.
26. What is the difference between CPU bus and system bus?
The CPU bus has multiplexed lines but the system bus has separate lines for each signal. (The
multiplexed CPU lines are demultiplexed by the CPU interface circuit to form system bus).
The memory mapping is the process of interfacing memories to microprocessor and allocating
addresses to each memory locations.
If the 1/0 device initiate the data transfer through interrupt then the 1/0 is called interrupt driven
1/0.
29. Why EPROM is mapped at the beginning of memory space in 8085 system?
In 8085 microprocessor, after a reset, the program counter will have OOOOH address. If the monitor
program is stored from this address then after a reset, it will be executed automatically. The monitor
program is a permanent program and stored in EPROM memory. If EPROM memory is mapped at
the beginning of memory space, i.e., at OOOOH, then the monitor program will be executed
automatically after a reset.
31.What is DMA?
The direct data transfer between I/O device and memory is called DMA.
The I/O devices are generally slow devices and their timing characteristics do not match with
processor timings. Hence the I/O devices are connected to system bus through the ports.
33.What is a port?
The port is a buffered I/O, which is used to hold the data transmitted from the microprocessor to I/O
device or vice-versa.
34.Give some examples of port devices used in 8085 microprocessor based system?
The various INTEL I/O port devices used in 8085 microprocessor based system are 8212, 8155, 8156,
8255, 8355 and 8755.
The INTEL 8255 is a I/O port device consisting of 3 numbers of 8 –bit parallel I/O ports. The ports can
be programmed to function either as a input port or as a output port in different operating modes. It
requires 4 internal addresses and has one logic LOW chip select pin.
When I/O devices are memory mapped, some of the addresses are allotted to I/O devices and so the
full address space cannot be used for addressing memory (i.e., physical memory address space will
be reduced). Hence memory mapping is useful only for small systems, where the memory
requirement is less.
When the I/O device needs a DMA transfer, it will send a DMA request signal to DMA controller. The
DMA controller in turn sends a HOLD request to the processor. When the processor receives a HOLD
request, it will drive its tri-stated pins to high impedance state at the end of current instruction
execution and send an acknowledge signal to DMA controller. Now the DMA controller will perform
DMA transfer.
The processor cycle or machine cycle is the basic operation performed by the processor. To execute
an instruction, the processor will run one or more machine cycles in a particular order.
39. What is Instruction cycle?
The sequence of operations that a processor has to carry out while executing the instruction is called
Instruction cycle. Each instruction cycle of a processor indium consists of a number of machine
cycles.
fetch and execute cycles. The fetch cycle is executed to fetch the opcode from memory. The execute
cycle is executed to decode the
In Block transfer mode, the DMA controller will transfer a block of data and relieve the bus for
processor. After sometime another block of data is transferred by DMA and so on.
In Demand transfer mode the DMA controller will complete the entire .data transfer at a stretch and
then relieve the bus to processor.
The timing diagram provides information regarding the status of various signals, when a machine
cycle is executed. The knowledge of timing diagram is essential for system designer to select
matched peripheral devices like memories, latches, ports, etc., to form a microprocessor system.
43. How many machine cycles constitute one instruction cycle in 8085?
Each instruction of the 8085 processor consists of one to five machine cycles.
Opcode (Operation code) is the part of an instruction / directive that identifies a specific operation.
Operand is a part of an instruction / directive that represents a value on which the instruction acts.
The opcode fetch cycle is a machine cycle executed to fetch the opcode of an instruction stored in
memory. Every instruction starts with opcode fetch machine cycle.
46. What operation is performed during first T -state of every machine cycle in 8085 ?
In 8085, during the first T -state of every machine cycle the low byte address is latched into an
external latch using ALE signal.
48. How the 8085 processor differentiates a memory access (read/write) and 1/0 access
(read/write)?
The 8085 processor asserts 10 I M low for memory read/write operation and 10 I M is asserted high
for 1/0 read/write operation.
In the second T -state of the last machine cycle of every instruction, the 8085 processor checks
whether an interrupt request is made or not.
The interrupt acknowledge cycle is a machine cycle executed by 8085 processor to get the address of
the interrupt service routine in-order to service the interrupt device.
Whenever the processor or system is resetted , all the interrupts except TRAP are disabled. fu order
to enable the interrupts, El instruction has to be executed after a reset.
The Software interrupts are program instructions. These instructions are inserted at desired
locations in a program. While running a program, if software interrupt instruction is encountered
then the processor executes an interrupt service routine.
If an interrupt is initiated in a processor by an appropriate signal at the interrupt pin, then the
interrupt is called Hardware interrupt.
READY is an input signal to the processor, used by the memory or I/O devices to get extra time for
data transfer or to introduce wait states in the bus cycles.
Hold and hold acknowledge signals are used for the Direct Memory Access (DMA) type of data
transfer. The DMA controller place a high on HOLD pin in order to take control of the system bus.
The HOLD request is acknowledged by the 8085 by driving all its tristated pins to high impedance
state and asserting HLDA signal high.
76.What is Polling?
Polling is a scheme or an algorithm to identify the devices interrupting the processor. Polling is
employed when multiple devices interrupt the processor through one interrupt pin of the processor.
The polling can be classified into software and hardware polling. In software polling the entire
polling process is govern by a prograrn.1n hardware polling, the hardware takes care of checking the
status of interrupting devices and allowing one by one to the processor.
The interrupt controller is employed to expand the interrupt inputs. It can handle the interrupt
request from various devices and allow one by one to the processor.
79. List some of the features of INTEL 8259 (Programmable Interrupt Controller)
If the functions performed by a peripheral device can be altered or changed by a program instruction
then the peripheral device is called programmable device. Usually the programmable devices will
have control registers. The device can be programmed by sending control word in the prescribed
format to the control register.
For synchronous data transfer scheme, the processor does not check the readiness of the device
after a command have been issued for read/write operation. fu this scheme the processor will
request the device to get ready and then read/W1.ite to the device immediately after the request. In
some synchronous schemes a small delay is allowed after the request.
In asynchronous data transfer scheme, first the processor sends a request to the device for
read/write operation. Then the processor keeps on polling the status of the device. Once the device
is ready, the processor execute a data transfer instruction to complete the process.
The 8212 can be hardwired to work either as a latch or tri-state buffer. If mode (MD) pin is tied HIGH
then it will work as a latch and so it can be used as output port. If mode (MD) pin is tied LOW then it
When the port receives the data, it will inform the output device to collect the data. Once the output
device accepts the data, the port will inform the processor that it is empty. Now the processor can
load another data to port and the above process is repeated.
The internal devices of 8255 are port-A, port-B and port-C. The ports can be programmed for either
input or output function in different operating modes.
The baud rate is the rate at which the serial data are transmitted. Baud rate is defined as l /(The time
for a bit cell). In some systems one bit cell has one data bit, then the baud rate and bits/sec are
same.
The INTEL 825lA is used for converting parallel data to serial or vice versa. The data transmission or
reception can be either asynchronously or synchronously. The 8251A can be used to interface
MODEM and establish serial communication through MODEM over telephone lines.
Interrupt is a signal send by an external device to the processor so as to request the processor to
perform a particular task or work.
90. What are the control words of 8251A and what are its functions ?
The control words of 8251A are Mode word and Command word.
The mode word informs 8251 about the baud rate, character length, parity and stop bits. The
command word can be send to enable the data transmission and reception.
91. What are the information that can be obtained from the status word of 8251 ?
The status word can be read by the CPU to check the readiness of the transmitter or receiver and to
check the character synchronization in synchronous reception. It also provides information regarding
various errors in the data received. The various error conditions that can be checked from the status
word are parity error, overrun error and framing error.
The task involved in keyboard interfacing are sensing a key actuation, Debouncing the key and
Generating key codes (Decoding the key). These task are performed software if the keyboard is
interfaced through ports and they are performed by hardware if the keyboard is interfaced through
8279.
The return lines, RLo to RL7 of 8279 are used to form the columns of keyboard matrix. In decoded
scan the scan lines SLo to SL3 of 8279 are used to form the rows of keyboard matrix. In encoded scan
mode, the output lines of external decoder are used as rows of keyboard matrix.
The process of sending a zero to each row of a keyboard matrix and reading the columns for key
actuation is called scanning. The scan time is the time taken by the processor to scan all the rows
one by one starting from first row and coming back to the first row again.
In display devices, the process of sending display codes to 7 -segment LEDs to display the LEDs one
by one is called scanning ( or multiplexed display). The scan time is the time taken to display all the
7-segment LEDs one by one, starting from first LED and coming back to the first LED again.
The internal devices of a DAC are R/2R resistive network, an internal latch and current to voltage
converting amplifier.
The time taken by the DAC to convert a given digital data to corresponding analog signal is called
conversion time.
The different types of ADC are successive approximation ADC, counter type ADC flash type ADC,
integrator converters and voltage- to-frequency converters.
The timing and control unit synchronizes all the microprocessor operations with clock and generates
control signals necessary for communication between the microprocessor and peripherals.