ECE390 Computer Engineering II: Lecture Outline
ECE390 Computer Engineering II: Lecture Outline
Lecture 9
Dr. Zbigniew Kalbarczyk University of Illinois at Urbana- Champaign Interpreted by Professor Michael Loui Also at University of Illinois at Urbana-Champaign
Lecture outline
Interrupt vectors Software interrupts Hardware interrupts 8259 Programmable Interrupt Controller Writing your own handlers Installing handlers
Z. Kalbarczyk
ECE390
Interrupts
Triggers that cause the CPU to perform various tasks on demand Three kinds:
Software interrupts - provide a mechanism whereby the programmer can use the int instruction to access code that already exists (is resident) in machine memory Hardware interrupts - triggered by hardware events external to the microprocessor, e.g., request for service by external devices such as disk drives Exceptions - hardware origin within the microprocessor itself, e.g., an attempt to divide by zero
Z. Kalbarczyk
ECE390
Interrupt Vectors
The first 1024 bytes of memory (addresses 00000 003FF) always contain the interrupt vector table. Each of the 256 vectors requires four bytestwo for segment, two for offset
Z. Kalbarczyk
ECE390
Software interrupts
Essentially just function calls using a different instruction to do the calling Software interrupts give you access to built-in code from BIOS, operating system, or peripheral devices Use the INT instruction to call these procedures For example INT 10h access video services, e.g., plot a pixel, type a character on the screen. See Lab Manual.
Z. Kalbarczyk
ECE390
Z. Kalbarczyk
ECE390
Things to notice
The interrupt vector table is just a big permanently located jump table The values of the jump table are pointers to code provided by BIOS, hardware, OS, or eventually ECE390 students Interrupt service routines preserve the flags the state of the computer should be completely unaltered by an ISR
Z. Kalbarczyk
ECE390
Hardware interrupts
Alert the processor of some hardware situation that needs service
A key has been pressed A timer has expired A network packet has arrived
Similar to INT instruction: push flags, CS, IP; far jump to interrupt service routine Additional level of complexity with the interrupt call not coming from your program code Can happen at any time during the execution of your program (when IF = 1)
Z. Kalbarczyk
ECE390
80x86 processor
Some device
Device generates request signal Device supplies interrupt vector number on data bus Processor completes the execution of current instruction and (when IF = 1) executes ISR corresponding to the interrupt vector number on the data bus ISR upon completion acknowledges the interrupt by asserting the INTA signal
Z. Kalbarczyk ECE390
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ECE390
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8259 PIC
80x86
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For example, if the PIC is programmed with a base interrupt vector of 8, then 0 corresponds to interrupt vector 8 at address 0000:4*8 = 00020h
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Base vector is 08h 0 1 2 3 4 5 6 7 IRQ0 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7
Slave 8259
INTR
80x86
Master 8259
INTR
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Interrupt priority
Lower interrupt vectors have higher priority Lower priority cant interrupt higher priority
ISR for the keyboard INT 9h is running Computer gets request from device attached to IRQ8 (INT 78h) INT 9h procedure must finish before IRQ8 device can be serviced ISR for the keyboard INT 9h is running Computer gets request from Timer 0 IRQ0 (INT 8h) Code for INT 9h gets interrupted, ISR for timer runs immediately, INT 9h finishes afterwards
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Servicing an interrupt
Complete current instruction Preserve current context
PUSHF Store flags to stack Clear Trap Flag (TF) & Interrupt Flag (IF) Store return address to stack PUSH CS, PUSH IP
Execute Interrupt Service Routine usually the handler immediately reenables the interrupt system (to allow higher priority interrupts to occur) (STI instruction sets IF to 1) process the interrupt
Identify Source
Read 8259 PIC status register Determine which device (N) triggered interrupt
Indicate End-Of-Interrupt (EOI) to 8259 PIC mov out al, 20h 20h, al
;transfers the contents of AL to I/O port 20h Return (IRET) POP IP (Far Return) POP CS POPF (Restore Flags)
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Restrictions on ISRs
Currently running program should have no idea that it was interrupted. ISRs should be as short as possible because lower priority interrupts are blocked from executing until the higher priority ISR completes
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ISRs can be interrupted (if STI has reset IF to 1) ISRs must be in memory
Option 1: Redefine interrupt only while your program is running the default ISR will be restored when the executing program terminates Option 2: Use DOS Terminate-and-Stay-Resident (TSR) command to load and leave program code permanently in memory
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Installing ISRs
Let N be the interrupt to service Read current function pointer in vector table
Use DOS function 35h Set AL = N Call DOS Function AH = 35h, INT 21h Returns: ES:BX = Address stored at vector N
Save ES, BX in Old_Vector doubleword Set new function pointer in vector table
Use DOS function 25h Set DS:DX = New Routine Set AL = N DOS Function AH = 25h, INT 21h
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Installing ISR
MyIntVector Save Registers Service Hardware Reset PIC Restore Registers IRET
MyIntVector PUSHF CALL CS:Old_Vector Save Registers MyCode Restore Registers IRET
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Polled I/O is inherently inefficient Wastes CPU cycles until event occurs Analogy: Checking your watch every 30 seconds until your popcorn is done, or standing at the door until someone comes by Solution is to provide interrupt driven I/O Perform regular work until an event occurs Process event when it happens, then resume normal activities Analogy: Alarm clock, doorbell, telephone ring
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call pxy mov ax, [scount] call call pxy mov ah,1 int jz 16h .showc ;Check for key press ;Quit on any key pxy ;Interrupt Count (1/18 sec) mov ax,[count] ;Second Count
RESW DW 0 DW 0 DW 0 DB 8
2 ;Interrupt counter (1/18 sec) ;Second counter ;Minute counter ; Temp counter
;---- Uninstall Interrupt Routine----call UnInst ;Minute Count call mpxit ;Restore original INT8
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;Column 6 (DI=12/2)
;Column 12 (DI=24/2)
Call int
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mov ax,4c00h
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word [oldv+0], bx word [oldv+2], es al, 8 ;INT = 8 ah, 25h ;Set Vector Subfunction dx, myint 21h bx ax dx es ;DS:DX point to function ;DOS Service
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; Next minute
;Reset the PIC ;End-of-Interrupt signal ;Restore all Registers ;Return from Interrupt
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