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Lab Report 4 DLD

This document describes an experiment on Boolean expression simplification and implementation. The experiment involves simplifying Boolean expressions using K-maps, drawing the corresponding logic diagrams, constructing the circuits using logic gates on a digital trainer, and verifying the circuits by comparing their truth tables to the original and simplified expressions. Tasks include simplifying expressions, writing logic for circuits, implementing simplified circuits, and evaluating their functionality.

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Umair Waqas
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© © All Rights Reserved
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Download as DOCX, PDF, TXT or read online on Scribd
38 views

Lab Report 4 DLD

This document describes an experiment on Boolean expression simplification and implementation. The experiment involves simplifying Boolean expressions using K-maps, drawing the corresponding logic diagrams, constructing the circuits using logic gates on a digital trainer, and verifying the circuits by comparing their truth tables to the original and simplified expressions. Tasks include simplifying expressions, writing logic for circuits, implementing simplified circuits, and evaluating their functionality.

Uploaded by

Umair Waqas
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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AIR UNIVERSITY

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

EXPERIMENT NO 4

Lab Title:
Student Name: Junaid Waqas Reg. No: 210781
Objective:

LAB ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory


Attributes (5) (4) (3) (2) (1)
Ability to
Conduct
Experiment
Ability to assimilate the
results
Effective use of lab
equipment and follows
the lab safety rules

Total Marks: Obtained Marks:

LAB REPORT ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory


Attributes
(5) (4) (3) (2) (1)

Data presentation

Experimental results

Conclusion

Total Marks: Obtained Marks:

Date: Signature:
EXPERIMENT 04

Boolean Expression Simplification and Implementation

Objectives:
 To understand the utilization of Boolean algebra in logic circuits.
 To write logic equation of a logic circuit from the logic diagram.
 Simplification of Boolean Expression using K-Map.

Equipment required:
 TTL IC-7408
 TTL IC-7432
 TTL IC-7404
 TTL IC-7400
 TTL IC-7402
 TTL IC-7486
 Digital Electronics Trainer

Task 1:
Simplify the given expression and follow the given steps to verify the circuit.
F = (X’Y’+Z)’ + Z + XY + WZ
Steps:
1. Obtain the truth table for the expression given above.
2. Simplify the Expression using Boolean algebra.
3. Draw the logic diagram for the simplified expression.
4. Implement the circuit on trainer using the required logic gates and verify your circuit by applying
all the possible input combinations to the circuit.
Simplified Expression:
Logic Diagram:

Truth Table:

Inputs Output
W X Y Z F
0 0 0 0 0

0 0 0 1 1

0 0 1 0 1

0 0 1 1 1

0 1 0 0 1

0 1 0 1 1

0 1 1 0 1

0 1 1 1 1

1 0 0 0 0

1 0 0 1 1

1 0 1 0 1

1 0 1 1 1

1 1 0 0 1

1 1 0 1 1

1 1 1 0 1

1 1 1 1 1
Simulation Results

Non-simplified circuit:
Simplified circuit:
Task 2:
Steps:
1. Write the Logic expression for the circuit.
2. Simplify the expression using Boolean algebra.
3. Obtain the truth table for the simplified expression.
4. Draw a new logic diagram for the simplified expression.
5. Implement the circuit on trainer using the required logic gates.
6. Verify your circuit by applying all the possible input combinations to the circuit.

Logic Expression:

F = B + B.C + A.B + A.C + A.B.C

Simplified Expression:

Logic Diagram for the Simplified Expression:


Truth Table:

INPUT INPUT INPUT OUTPUT

X Y Z F

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1
Simulation Results
Non-simplified circuit:
Simplified circuit:
Task 3:
Expression:

F = A’C + A’B + AB’C + BC


Steps:
1. Express the above-mentioned expression in the form of sum of midterms.
2. Draw the K-Map for the function.
3. Find its simplified expression from K-map in SOP form.
4. Draw the logic diagram for the simplified expression.
5. Obtain a truth table for the simplified expression.
6. Implement the logic circuit on trainer using the required logic gates.
7. Verify your logic circuit by applying all the possible input combinations to the circuit.

Canonical Form:

F = ∑m (1,2,3,5,7)
Simplified Expression:
Truth Table:

Inputs Output
A B C F
0 0 0 0

0 0 1 1

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 0

1 1 1 1

Logic Diagram:
Simulation Results
Non-simplified circuit:
Simplified circuit:
Conclusion:
In this lab, we have to patch the given expression on hardware and also on software
(PROTEUS). After this we have to simplify the given circuit using K-Map and then patch this
circuit on hardware and as well as software (PROTEUS). After this we have to verify the Truth
Tables of both the expressions (Simplified and non-Simplified).

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