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Brkarc 3465

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BRKARC-3465

Catalyst 6800 Series

Switch Architectures

Mahesh Nagireddy
Technical Marketing Engineer
CCIE R&S
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 3
BRKARC-3465

Catalyst 6800 Series

Switch Architectures

Mahesh Nagireddy
Technical Marketing Engineer
CCIE R&S
Cisco Spark
Questions?
Use Cisco Spark to communicate
with the speaker after the session

How
1. Find this session in the Cisco Live Mobile App
2. Click “Join the Discussion”
3. Install Spark or go directly to the space
4. Enter messages/questions in the space

cs.co/ciscolivebot#BRKARC-3465

© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
Session Objectives
What we will cover…
• Catalyst 6807-XL
• Catalyst 6880-X
• Catalyst 6840-X
• Chassis Architectures
• Supervisor Engines
• Ethernet LAN Modules
• Basic Packet Walks
We will NOT cover…
• C6K Service Modules
• Virtual Switching System
• Instant Access
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 6
Agenda

 Background
 History of C6K
 Evolution of Catalyst 6800
 The 4 Basic Elements
 C6807-XL
 C6880-X
 C6840-X
 Packet Walks
Cisco Catalyst 6500/6800 Series
A history of Innovation & Investment Protection
Years of C6800-SUP6T
Innovation MSFC6
VS-S2T-10G PFC4-E
MSFC5 6T Fabric
WS-SUP720/ VS-S720-10G
PFC4
WS-SUP32 MSFC3
2T Fabric
MSFC3/MSFC2A PFC3C
WS-SUP2 PFC3A/B 720G Fabric
MSFC2 720G Fabric
2016
WS-SUP1/1A PFC2 or 32G Bus
2015
MSFC1/2
256G SFM 2013
PFC1
or 32G Bus 2011
32G Bus
2007
2005
2003
2001
1999

Catalyst 6500 Catalyst 6500-E Catalyst 6807XL Catalyst 6840X

40G (Sup720) or 40G (Sup720) or 220G (SUP2T) or 80G Per Slot
3.5G (Sup32) Per Slot 80G (Sup2T) Per Slot 440G(SUP6T) Per Slot
© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
Catalyst 6800 Series
Evolution of the Catalyst 6500-E
Catalyst 6840-X Catalyst 6880-X Catalyst 6807-XL

• 4 Fixed Form Factor Models • Semi Modular 5-Slot Chassis • Fully Modular 7-Slot Chassis
• Only 2 RU height (smaller than 6503-E) • Only 4.5 RU height (smaller than 6504-E) • Only 10 RU height (smaller than 6506-E)
• 16 or 32 x 1/10GE Base Models • 80 to 220Gbps per Half Slot capable • 80 to 440Gbps per Slot capable
• 24 or 40 x 1/10GE + 2 x 40GE Models • 16 to 80 x 1/10GE Port Density • Supports all Sup2T enabled Modules

ME-6524 C6503-E C6504-E C6506-E C6509-E C6513-E

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 9
Catalyst 6800 Series
The 4 Basic Elements

Software Control-Plane Hardware Control-Plane

The System CPU and DRAM, Intelligent Switching ASICs

where IOS runs (MSFC) (PFC/DFC), programmed by IOS

Catalyst 6800
Series
The Back-Plane (Fabric), Data-Plane ASICs for Ports,
where Packets are transferred receives and transmits Packets

Hardware Data-Plane Forwarding ASICs

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 10
Catalyst 6800 Series
4000+ Catalyst 6500 Features
MPLS, VPLS & EVN Next-Gen Solutions Security & QoS
15 Year MPLS Maturity  Instant Access Controller  MacSec & NDAC  DHCP Snooping 
L2 VPN  L3 Campus LISP 
SGT & SGACL  Dynamic ARP Inspection 
L3 VPN  Software Defined Access 
L2/L3 VPN over mGRE  SDN - OpenFlow/APIC  Ingress/Egress ACL  SPAN with ACL 
MPLS TE  Smart Install Director 
Time-Based ACL  Identity 2.0 
VPLS/A-VPLS/H-VPLS 
Label Switch Multicast  VSS & HA ACL Statistics  ACLQoS Classification 
MACsec over EoMPLS  
10 Year VSS Maturity  
MPLS at Access with I-Sat  MACsec over VSL 
Catalyst 6800 Port Security Marking (DSCP/COS)

 
VRF-Lite 

1G/10G/40G VSL  Series IPv6 FH Security Microflow Policing
EVN SSO / NSF & NSR  ACL Atomic Commit/Dry Run  Advanced CoPP 
VRF-Aware Multicast  BGP PIC & IP FRR 
VRF-Aware NetFlow  BFD on SVI & MEC  IPv6 uRPF  IPv6 VLAN ACL 

Management &
IPV4 Unicast IPV4 Multicast Large Tables & Scalability Rich Media
Services
OSPFv2/v3  IGMPv3 & MLDv2 Snooping in HW  IPv4 Routing Capability 256K-2M Flexible NetFlow  WCCPv3 
OSPFv3 VRF-Lite  PIM-SM “Dual-RPF” in HW 
VRF-Aware Unicast  PIM-DM, PIM-Bidir  Multicast Routes (IPv4) 64K 
Egress NetfFow  PBR IPv4/IPv6
IP Tunnel HA  L3 PIM Snooping 
Number of Adjacencies 1M
BFD SVI-GRE  PIM Register in HW  Sampled NetFlow  NAT/PAT 
BGP PIC  mVPN, MSR, mcast BFD  MAC Addresses 128K
NDE (Full & Sampled)  GRE/mGRE 
IPV6 Features ECMP (v4 and v6) 16
Video Monitoring  ERSPAN 
Security & QoS ACL 64K-256K
IPv6 in IPv4 Tunnels,
IPv6 - IPv4 HW Parity   Mediatrace  GOLD 
VRF-Aware IPv6 Tunnels
Flexible Netflow 128K-1M
OSPFv3 VRF PE-CE  BGPv6, IS-ISv6 
Metadata QoS  Cisco ISE 
MPLS Label Push/Pop in 1pass 5/3
MLD, MLD Snooping  6VPE and 6PE 
Aggregate Policers 8K Multicast Service Reflect (MSR)  Cisco Prime 
IPv6 Mcast HA  PIM Sparse Mode (PIM-SM) 

IPv6 SLA, TCL, LLDP  IPv6 QoS, PACL, RACL  Number of VPNs 16K Multicast VPN (MVPN)  Mini Protocol Analyzer 
© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
C6807-XL
Chassis & Power
Catalyst 6807-XL For Your
Information

Modular Chassis Overview

Up to 440G/Slot capable
7 Slots
10 RU
Catalyst 6000 DNA
Next-Generation Investment Protection
ASIC Ready Compatible with Sup2T,
6700, 6800, 6900 and
Latest Service Moules
Low-Power & Noise
High-Efficiency Fans
Backwards compatible
backplane connectors

Up to 4 (N+1)
3000 Watt PSU 4 x 220VAC
Redundancy Power Inputs

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 13
Catalyst 6807-XL For Your
Information

Mechanical View

Fan Tray Slot 1: Line Card

Slot 2: Line Card
Extra Fabric Slot 3: Supervisor*
Connectors
Slot 4: Supervisor**
Slot 5: Line Card
Slot 6: Line Card
Slot 7: Line Card

Power Power
Supplies Inputs
*SUP Only
**SUP/Service Module
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 14
Catalyst 6807-XL
Environmental Overview Height
17.5 in (10RU)

High Efficiency
4500 RPM
Redundant Fans

Depth
18.10 in
Platinum Efficient
3000W
Power Supplies

Width
17.36 in

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 15
Catalyst 6807-XL Air Flow:
Side to Side
Fan Redundancy & Air Flow
New
Locking
Mechanism
Fan-Tray LEDs

Individual Fans
(3 columns of 3) Fan-Tray Handle

Front-Service
Fan-Tray
Fan-Tray Highlights:
• Has 9 variable-speed High-Efficiency Fans (850 CFM)
LED Color Status Description
• Supports 4 speeds between 3000 & 4500 RPM per Fan FAN Solid Fan-Tray OK
• Capable of cooling Slots operating up to 800W per Slot FAN Solid Fan-Tray Fault
• Can still operate with up to 3 individual Fan failures ID Solid Identifies Fan-Tray

• Supports Fan-Tray “OIR” for minimum of 120 seconds

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 16
Catalyst 6807-XL C6800-XL-3KW-AC
PSU Redundancy & Inputs

Dual Variable
Speed Fans
AC
Power Supply ONLY
Status LEDs
Power Switch
PSU 4 AC Input 3
PSU Lock
PSU 3 AC Input 4
& Ejector
PSU 1 AC Input 2
PSU 2 AC Input 1
Power Supply Highlights:
LED Color Status Description
• Max output is 3000W @ 220V (or 1300W @ 110V)
IN Solid Input OK
• Up to 92% Power Efficiency @ 50-100% of load
IN Blinking Under-Current
• Power Hold-up Time is ~20 msec @ 100% load OUT Solid Output OK
• Dual “Front to Back” Variable-Speed Cooling Fans OUT Blinking Over-Current
• Supports Combined or Redundant (N+1) mode Fault Solid Malfunction

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 17
Power Supply Redundancy For Your
Information
Catalyst 6807-XL
Catalyst 6807-XL Can Utilize Four Power Supplies in Either Redundant or Combined Mode

N+1 Redundant Mode Combined Mode

PSU3 PSU4 PSU3 PSU4

90% 0% 90% 90%

100% 90% 90% 90%

PSU1 PSU2 PSU1 PSU2

• Adds +1 to Total # of Redundant PSU • Same operational behavior as 6500-E

• First PSU operates @ 100% of capacity • Each PSU provides ~90% of capacity
• Each Additional PSU @ 90% (100+90*N), • The total system power is ~360% of the
with the +1 Redundant @ 0% capacity of a single PSU
• With 1+1, 2+1 & 3+1 redundancy: if one • Pseudo-redundant behavior, but this is
PSU fails, then the +1 PSU will take over not equivalent to 1:1 or N+1 redundancy.
• This mode is Recommended (Default) • This mode is NOT Recommended

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 18
C6807-XL
Supervisor Architectures
Supervisor Engine 2T
Bridging the Catalyst 6500 & 6800

2Tbps QUICK FACTS

Switch Fabric PFC4 (XL)
Forwarding Engine  Integrated 2Tbps Switch Fabric
 Policy Feature Card 4
supports L2 / L3+ hardware acceleration
 Multilayer Switch Feature Card 5
single CPU for both L2 & L3
 2 x 10GE & 3 x 1GE Uplink Ports

2 x 10G (X2) and 3 x  Connectivity Management Processor

1G (SFP) Uplinks
MSFC5 1G (RJ45) Mgmt Port
 Hardware support for L2, IPv4, IPv6,
Control Plane Multicast, MPLS / VPLS, GRE, NAT,
Processor VSS & Instant Access

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 20
Supervisor 2T
Block Diagram
Shared Bus Connector
Local-Bus
Fabric Connector

PFC4 (XL)
2Tbps 20G Fabric Bus
ASIC 1 Layer 3 Engine
Fabric ASIC Replication
ASIC Layer 2 Engine MAC
28 x 40G Channels 20G Fabric
ASIC 0
Fabric
Bootdisk MSFC5 Replication ASIC
DRAM 1GE FDX

Connectivity Control Plane Port ASIC 0 Port ASIC 1

MGMT CPU 1.5GHz
Processor CTS ASIC CTS ASIC

Compact Serial MGMT USB SFP 1 SFP 2 SFP 3

Front Panel X2 1 X2 2
Flash Port Port Port

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 21
NEW
Supervisor Engine 6T Scalability &
Taking Catalyst 6800 to the Next Level Performance

SUP2T SUP6T
6Tbps
Switch Fabric PFC4-E (XL) 6807-XL Bandwidth 220G /Slot 440G /Slot

Forwarding Engine
6500-E Bandwidth 80G /Slot 80G /Slot

1.5Ghz 2.5Ghz
RP CPU MPC8572 X86 Dual Core

2 - 4GB 4 GB
Memory DDR2 667Mhz DDR3 1333Mhz

2 x 10G (X2) & 2 x 40G (QSFP) &

Uplinks 3 x 1G (SFP) 8 x 1/10G (SFP+)

VSS, VSS, IA, MACSEC,

Advanced
MACSEC, SGT, LISP, CAMPUS
Uplink Features
MSFC6 SGT FABRIC
2 x 40G (QSFP) and 8 x 10G RJ45
Control Plane Mgmt Port RJ45 / SFP Mgmt0
(SFP+) Uplinks CMP
Processor
2 x 1G (RJ45 / SFP) Mgmt Power
* No CFC or Service Module Support Consumption 436W/451W 341W/353W
(Non XL/XL)

Feature Parity with Sup2T from Day 1: 4000+ Features

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 22
Supervisor 6T
Block Diagram FIRE = Fabric Interface & Replication Engine

6Tbps Fabric ASIC

Chassis EOBC 28 x 110G Channels
Mgmt (I2C) Switch
PCIe

2 x 20G 2 x 20G
Bootdisk
eUSB
Inband
PFC4E Inband
(XL)
D
D
DD
DD R Control-Plane
R3
DD
R33 CPU 2.5 GHz FIRE D D FIRE
R3 D D

ASIC 0 R
3
R
3 ASIC 1
4GB
2GB 2GB

RTC
1GE Inband
40G 40G

Keystore Port / CTS Port / CTS

PHY XPT
I/O
ASIC 0 ASIC 1
NVRAM FPGA PHY 40G 40G
PHY PHY
Baseboard
MSFC6 USB
Console
USB
Drive
RJ45
& SFP
RJ45
Console
SFP
01-04
QSFP
09 Front Panel SFP
05-08
QSFP
10

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 23
MSFC = Multilayer Switch Feature Card

The “Software” Control Plane for the System, where IOS runs…
MSFC – Control-Plane Processor
The combined Control-Plane Processor combines all L2 & L3+ system functions

MSFC Complex Runs Layer 2 & System functions:

• System operations like Boot, EOBC,
Chassis & Power Management, etc.
EOBC • L2 features like VTP, DTP, STP, CDP,
Control-Plane IGMP, EtherChannel, etc.

Bootdisk
Processor Run Layer 3 & User Interface functions:
• System management via Console,
SP RP Telnet/SSH, SNMP, TCL, etc.
DRAM Functions Functions • L3 features like HSRP, OSPF, BGP,
MPLS, PIM, etc.

Inband Intf 1Gbps Full-Duplex “Inband” CPU interface

Communicates with HW via EOBC interface

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 25
Multilayer Switch Feature Card
Sup2T - MSFC5 Recap

• MSFC5 Control-Plane
• Combines functionalities of
the Switch Processor (SP) and
the Router Processor (RP)
• 1.5GHz Dual Core PPC CPU
• 2 - 4GB DDR2 DRAM
• Internal Bootdisk & External Disk0
Compact Flash File System
• Built-in Connectivity Management
Processor (CMP) RJ45 Port
• Serial Console via RJ45 or USB

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 26
NEW
Multilayer Switch Feature Card
Sup6T - MSFC6 Introduction

• MSFC6 Control-Plane
• Integrated onto Baseboard
• Same behavior as MSFC5
• Higher Performance & Scale
• 2.5GHz Dual Core IBC CPU
• 4GB DDR3 DRAM
• Internal Bootdisk & External Disk0
USB File System
• Built-in Out-of-band Management
RJ45 / SFP Port
• Serial Console via RJ45 or USB

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 27
For Your
MSFC3 vs. MSFC5 vs. MSFC6 Information

Feature MSFC3 (Sup720-10G) MSFC5 (Sup2T) MSFC6 (Sup6T)

SP CPU – PPC 600Mhz RP CPU – PPC
CPU Speed RP CPU – IBC 2.5Ghz
RP CPU – PPC 600Mhz 1.5Ghz
SP – 512MB (1GB upgrade) 2GB default
DRAM 4GB default
RP – 512MB (1GB upgrade) (4GB upgrade)
NVRAM 2MB 4MB 4MB
OBFL Flash No 4MB 4MB
SP – 1GB (CF)
Bootdisk 1GB (CF) 2GB USB
RP – 64MB (flash)
Disk0: Up to 1GB CF Up to 8GB CF Up to 8GB USB
100Mbps HDX
EOBC 100Mbps HDX Bus 1Gbps FDX Switch
Bus
Dedicated
No Yes - CMP Yes – Mgmt0
Management Port

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 28
PFC = Policy Feature Card

The “Hardware” Control Plane, based on information learned by MSFC…

Policy Feature Card 4 Also applies to DFC4
Sup2T - PFC4 Recap

 Increased Hardware Performance

 60Mpps L2 / L3+ Forwarding
 New IFE / OFE Lookup Process
 Increased Hardware Scalability
 256K or 1M FIB TCAM Entries
 128K MAC Address CAM Entries
 64K or 256K Security & QoS ACL Entries
 512K or 1M Flexible NetFlow (FNF) Entries
 16K Virtual Routing & Forwarding (VRF) Instances
 New & Enhanced Feature Capabilities
 SGT & MACSEC for Cisco Trustsec (CTS)
EARL8
 IPv4 & IPv6 RPF check for up to 16 Paths
 Improved 8-bit EtherChannel Load-Balancing

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 30
NEW
Policy Feature Card 4 Also applies to DFC4
Sup6T - PFC4-E Introduction

 PFC4-E merges L2 & L3+ ASICs

 60Mpps L2 / L3+ Forwarding
 256K, 1M or 2M FIB TCAM Entries
 128K MAC Address CAM Entries
 Enhanced Performance & Equal Scale
 Improved Intra-ASIC RW Bandwidth
 Integrates external SRAMs
 Uses 4 sets of 32K x 96bit eDRAM
 Full ECC with additional 8 bits on RW
 Reduces pin count & block size
 Uses 3 RLDRAM3 chips @ 600 MHz
 Support for 2M FIB entries* (4 TCAMs)

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 31
Policy Feature Card 4
Block Diagram
Contains CEF IPV4, IPV6 Contains location of
prefixes & MPLS entries flow in Netflow Table
FIB TCAM Netflow TCAM
Contains several key
Contains Layer 2 rewrite
Netflow Table packet fields for flow
information & pointers
Adjacency Table
Collection of NF
Collection of ADJ Netflow Statistics
statistics for each
Adjacency Statistics
Layer 3+ statistics for each
active flow
active flow
Forwarding LIF Map Table Contains Logical
Interface Mapping info
Exception Table Engine
Contains table of RPF Map Table Table of Src-Port info
“Exception” cases for Multicast & uRPF
& action to take
Classification ACL Classification ACL
Table #1 Table #2
Contains the Ingress Contains the Egress
ACL entries (128K) Contains the actual LIF ACL entries (128K)
Database entries
128K CAM contains
MAC address table
CAM Table LIF Table
Layer 2
ACE Counters
Forwarding Engine
LIF Statistics

Collection of ACL “hit” Contains per-LIF

statistics & other info Usage statistics

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 32
*also applies to each DFC4

Policy Feature Card 4

EARL8 IFE / OFE Processing
The L3 Forwarding Engine ASIC has 2 processing pipelines @ 60Mpps:
1. Input Forwarding Engine (IFE)
2. Output Forwarding Engine (OFE)
STEP 1 - As each Header enters the L3 ASIC, the “IFE” pipeline performs an L3 Lookup and Ingress Security, QoS & NetFlow processing

STEP 2 - The Header is merged with IFE result and passed to the “OFE” pipeline, which does Egress Security, QoS & NetFlow
processing

Headers 1: Ingress 2: Ingress 3: DST L3 4: Ingress

From L2 Engine ACL NetFlow Lookup QoS

IFE Process
OFE Process
Headers 8: Rewrite 7: Egress 6. Egress 5: Egress
To L2 Engine Result QoS NetFlow ACL

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 33
For Your
Information

PFC3 vs. PFC4

Feature PFC3B/BXL PFC3C/CXL PFC4/XL
IPv4 Forwarding Up to 30Mpps Up to 48Mpps Up to 60Mpps
IPv6 Forwarding Up to 15Mpps Up to 24Mpps Up to 30Mpps
FIB TCAM (IPv4) 256K / 1M 256K / 1M 256K / 1M
FIB TCAM (IPv6) 128K / 500K 128K / 500K 128K / 500K
Adjacency Table 1M 1M 1M

Up to 1M (XL)
Netflow Table Up to 256K (XL) Up to 256K (XL)
(Ingress 512K : Egress 512K)

MAC Table 64K (32K) 96K (80K) 128K

Egress Netflow No No Yes
Flexible Netflow No No Yes
MPLSoGRE No No Yes
IPv6 uRPF No No Yes

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 34
For Your
Information

PFC3 vs. PFC4

Feature PFC3B/BXL PFC3C/CXL PFC4/XL
ACL Labels 4K 4K 16K
Security ACEs Up to 32K Up to 32K Up to 192K (XL Default)
QoS ACEs Up to 32K Up to 32K Up to 64K (XL Default)
Port ACLs 2K 2K 8K
Aggregate Policers 1023 1023 16K

Shared Microflow Policers 63 63 512

Egress Microflow Policing No No Yes

Distributed Policers No No Yes

Packet or Byte Based Policing No No Yes

RPF Interfaces 2 2 16
Native VPLS No No Yes
VSS No Yes Yes

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 35
Switch Fabric = Hardware Data Plane

A dedicated set of Crossbar Channels that interconnect all Slots…

2T Switch Fabric
Recap

• Integrated 2Tbps Switch Fabric

• 28 Channels for C6513-E & C6807-XL
• Dual Queues per Fabric Channel
• Redundant Channel to Standby Fabric
for sub-second convergence, during SSO

• Provides Backplane Interconnects

• 1 to 4 Fabric Channels supplied to each Slot
• Each Fabric Channel can independently
operate @ 20Gbps or 40Gbps
• Mixing old and new modules (e.g. 20G & 40G)
does not affect the speeds of other modules

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 37
Catalyst 6807-XL Supports For Your
Information
How Sup2T operates up to 220G
per slot

Supervisor2T:
• Using the same XBAR Fabric ASIC
• Supports 1 to 4 channels (per Slot)
• Increased per Channel bandwidth 28 x 55G Channels

• New Clock Frequencies (7.5Ghz = 55G)

• New Line Encodings (24/26b or 64/66b)
• Applicable only to new C6800 Cards

• NO changes to the MSFC5 or PFC4

• Local Channel for Uplinks @ 20Gbps

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 38
NEW
6T Switch Fabric
Introduction

• Integrated 6Tbps Switch Fabric

• Same design & behavior as 2T Fabric
• 28 Channels for C6513-E & C6807-XL
• Up to 4 Channels operating upto 110Gbps
per Slot*

• Provides Backplane Interconnects

• 1 to 4 Fabric Channels supplied to each Slot
• Each Fabric Channel can independently
operate @ 20Gbps, 40Gbps or 110Gbps*
• Mixing old and new modules (e.g. 40G & 110G)
does not affect the speeds of other modules

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 39
Crossbar Switch Fabric
A Closer Look

The Catalyst 6500 & 6800 series eliminated the earlier Bus-based
limits by creating a new “Crossbar” Switch Fabric for its backplane.
A Crossbar Architecture is essentially 2*N busses (where N is the number
of ASICs connected to the Switch Fabric) connected by N*N cross-points.

0
1
2
3
4
5
6
7
0 1 2 3 4 5 6 7
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 40
Crossbar Switch Fabric For Your
Information
More Details

This allows multiple LC’s to transmit and receive data simultaneously

A scheduler is responsible for selecting which LCs can transmit, and which
LCs receive data, during any given fabric cycle.
This can be viewed as (1 or more) dedicated Fabric channels to each LC

0 Per Channel bandwidth is defined by 2 factors:

1
2 • Clock Speed (in Hz) defines the maximum BPS
3
4 • Line Encoding (e.g. 8/10b) defines usable bits
5
6
7 Per Slot bandwidth is defined by # of Channels:
0 1 2 3 4 5 6 7 • X bps * Y channels = Z bandwidth

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 41
Crossbar Switch Fabric
Logical Architecture

20G
20G
Supervisor 20G
6800 Series
20G

40G
20G
Service Module Switch 6900 Series
Fabric 40G

40G
20G
40G
New 10G Series
6700 Series
(C6800)
20G 40G
40G

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 42
Switch Fabric Redundancy For Your
Information
High Availability

• When using a redundant Supervisor, 2 fabric channels are connected "back to back" *
• Standby Supervisor uplink connection to Active Supervisor
• Active Supervisor bus connection to Standby Supervisor
• The Standby Supervisor is connected in DFC Mode, with its bus connection disabled
• The redundant Standby Supervisor enables it’s fabric channels to dCEF2T or newer modules for ~50ms failover...

Line Card Active

Slot 1
Fabric
* “Back-to-Back”
Fabric Channels, for
sub-second (~50ms)
SSO switchover

Line Card
Standby
Slot 13 Fabric

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 43
720G vs 2T vs. 6T Fabric For Your
Information

Feature Sup720 Sup2T Sup6T

18
Number of Channels 28 28
(20 on S720-10G)

Aggregate Bandwidth 720 Gbps 2 Tbps 6 Tbps

Channel Speeds (bps) 8G - 20G 20G - 40G 20G - 40G - 110G
Fabric Redundancy Yes Yes Yes
No
SSO Fabric Hot Synch Yes Yes
(Yes on S720-10G)

Redundant Channels No Yes Yes

8Q Hi Priority 8Q Hi Priority
Fabric Priority (QoS) 8Q Priority
8Q Lo Priority 8Q Lo Priority
Clear Block Support Yes Yes Yes
Switching Modes Bus, Truncated,
Truncated, Compact Compact Only
(DBUS Header Size) Compact

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 44
Catalyst 6807-XL
Fabric Channel Distribution

1 1
2 2
3 Slot 1 3 Current Fabric Channels
4 4
Sup (HA) Fabric Channels
1 1
2 2
3 Slot 2 3 Extra Fabric Channels
4 4
(for future use)
1 1
2 2
3 Slot 3 3
4 4

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 45
C6807-XL
Module Architectures
Catalyst 6500-E & 6807-XL Line Cards

6700 & 6800 Series 6900 Series

with CFC or DFC4 with DFC4

C6800 1G Series
with DFC4-E

C6800 10G Series

with DFC4-E New C6800 40G*
with DFC4-E

* No Support on 6500-E Chassis BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
For Your
Information

CFC = Centralized Forwarding Card

CFC connects to DBUS/RBUS, so the PFC can perform Forwarding Lookup

For Your
Information
Centralized Forwarding Card (CFC)
The Centralized Forwarding Card (CFC) provides BUS connectivity
for centralized (via Supervisor PFC) forwarding lookups ONLY…

The CFC comes on

legacy 6700 modules
to provide connection
to the DBUS & RBUS

All L2 / L3 Forwarding
“decisions” are made by
the PFC and “results” are
returned on the RBUS

Actual DATA Switching

is via the Switch Fabric...

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 49
6700 Series (with CFC) For Your
Information

WS-X6704-10G, WS-X6748-SFP/GETX FIRE = Fabric Interface & Replication Engine

Supervisor Switch Fabric The 6700 modules

connect to the BUS
using a Centralized
20G 20G Forwarding Card (CFC)

They connect to the

Switch Fabric via Dual
CFC FIRE ASIC FIRE ASIC 20G Fabric channels

NOTE: The DBUS is

PORT PORT PORT PORT NOT used. Its ONLY
Linecard ASIC ASIC ASIC ASIC for control traffic

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 50
DFC = Distributed Forwarding Card

DFC enables Local (Distributed) Forwarding Lookup on each Module

Distributed Forwarding Card 4
The DFC4 is an option for 6700 Series, and pre-installed on 6800,6900 & C6800 Series
Each DFC4 stores a “Local Copy” of PFC4 forwarding info, as well as NetFlow, Security & QoS ACL’s

The DFC4 supports local Two models of the DFC4

forwarding rates up to 60Mpps are supported:

The DFC4 includes same IFE / OFE • DFC4-A (XL) for 1G

capabilities & increased table sizes • DFC4-E (XL) for 10G+
© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
6700 & 6800 Series (with DFC) For Your
Information

WS-X6748-SFP/TX or WS-X6848-SFP/TX FIRE = Fabric Interface & Replication Engine

Supervisor Switch Fabric The 6700 Series

supports a Distributed
20G 20G Forwarding Card (DFC)

The 6800 Series has

preinstalled Distributed
FIRE ASIC FIRE ASIC Forwarding Card 4
DFC
They connect to the
Switch Fabric via
PORT PORT PORT PORT
Dual 20G Channels
Linecard ASIC ASIC ASIC ASIC

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 53
For Your

WS-X6704-10G Information

6700 Series Line Cards

• 4 ports 10G Xenpak • 16MB Packet Buffers per port

• Supports CFC or DFC4-A • Supports Strict Priority queue on TX
• Up to 60Mpps with DFC installed • Supports 2 receive queues per port
• 2 x 20G Channels to Switch Fabric • Supports 8 transmit queues per port
• Connection to the Shared Bus • Supports Weighted Round Robin

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 54
For Your

WS-X6748-GETX & 6848-TX Information

6700 and 6800 Series Line Cards

• 48 ports 10/100/1000M RJ45 • 1.2MB Packet Buffers per port

• Supports CFC or DFC4-A • Supports Strict Priority queue on TX
• Up to 60Mpps with DFC installed • Supports 2 receive queues per port
• 2 x 20G Channels to Switch Fabric • Supports 4 transmit queues per port
• Connection to the Shared Bus • Supports Weighted Round Robin

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 55
For Your

WS-X6748-SFP & 6848-SFP Information

6700 and 6800 Series Line Cards

• 48 ports 1G SFP • 1.2MB Packet Buffers per port

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 56
For Your

WS-X6716-10G & 6816-10G Information

6700 and 6800 Series Line Cards

• 16 ports 10GE (X2) in MUX mode • 256MB Packet Buffers per-port

• 4 Programmable “port-groups” in 2 modes • Supports Strict Priority Queue on TX
• Requires integrated DFC4-E • Supports 2 receive queues per port
• Up to 60Mpps with DFC installed • Supports 8 transmit queues per port
• 2 x 20G Channels to the Switch Fabric • Supports Weighted Round Robin &
• VSL support on 4 ports in Transparent mode Shaped Round Robin

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 57
For Your

WS-X6716-10T & 6816-10T Information

6700 and 6800 Series Line Cards

• 16 ports 10GE (RJ45) in MUX mode • 256MB Packet Buffers per-port

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 58
6700/6800 Series Cards For Your
Information

WS-X6716-10G/T or 6816-10G/T

Supervisor Switch Fabric

EOBC 20G 20G

Fabric BACKPLANE INTF Fabric

Interface Interface The 6716 & 6816 use
FPGA FPGA
preinstalled Distributed
FIRE FIRE
ASIC
Forwarding Card 3 or
ASIC
can upgrade to DFC4
PORT PORT DFC3/4 PORT PORT
ASIC ASIC ASIC ASIC
They connect to the
MUX MUX MUX MUX Switch Fabric via
Dual 20G Channels
MUX MUX MUX MUX MUX MUX MUX MUX

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 59
For Your

WS-X6908-10G Information

6900 Series Line Cards

• 8 ports 10GE (X2 based) • 256MB Packet Buffers per port

• Pre-Installed with DFC4-E • Supports Strict Priority Queue on TX
• Up to 60Mpps with DFC installed • Supports 2 receive queues per port
• 2 x 40G Channels to Switch Fabric • Supports 8 transmit queues per port
• Supports Cisco TrustSec (CTS) • Supports Deficit Weighted Round Robin
• MacSec encryption on all ports & Shaped Round Robin
• Supports VSL on all ports

X2-10G-SR/LR CVR-SFP10G
(OneX)

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 60
6900 Series Cards For Your
Information

WS-X6908-10G FIRE = Fabric Interface & Replication Engine

Supervisor Switch Fabric

40G
The 6900 Series use
EOBC 40G
preinstalled Distributed
FABRIC INTERFACE Forwarding Card 4

They connect to the

DFC4 Switch Fabric via
FPGA FPGA
Dual 40G Channels
FIRE FIRE FIRE FIRE
ASIC ASIC ASIC ASIC They come with a
Cisco Trust Security
PORT PORT PORT PORT PORT PORT PORT PORT (CTS) ASIC built in
ASIC ASIC ASIC ASIC ASIC ASIC ASIC ASIC

CTS CTS CTS CTS CTS CTS CTS CTS

ASIC ASIC ASIC ASIC ASIC ASIC ASIC ASIC

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 61
For Your

WS-X6904-40G Information

6900 Series Line Cards

• 4 ports 40GE (CFP) • 10MB Packet Buffers per 10G port

• 16 ports 10GE (FourX & SFP+) • 40MB Packet Buffers per 40G port
• Pre-Installed with DFC4-E • Supports Dual Strict Priority Queue on TX
• Up to 60Mpps with DFC installed • Supports 2 receive queues per port
• 2 x 40G Connections to Switch Fabric • Supports 8 transmit queues per port
• Supports Cisco TrustSec (CTS) • Supports Deficit Weighted Round Robin
• MacSec encryption on all ports & Shaped Round Robin
• Supports VSL & IA on all ports

CFP-40G-LR4 CFP-40G-SR4 CVR-4SFP10G

(FourX)

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 62
6900 Series Cards For Your
Information

WS-X6904-10G FIRE = Fabric Interface & Replication Engine

Supervisor Switch Fabric

EOBC
40G 40G
20G 20G
Fabric ASIC

Fabric Interface Fabric Interface 20G 20G Fabric Interface Fabric Interface
ASIC ASIC ASIC ASIC

Replication Replication Inband Inband Replication Replication

FPGA FPGA
Engine Engine Engine Engine

RX MUX TX MUX DFC4 RX MUX TX MUX

Port ASIC Port ASIC
FPGA FPGA FPGA FPGA

PHY / CTS ASIC PHY / CTS ASIC

40 G CFP - Port 1 40 G CFP - Port 2 40 G CFP - Port 3 40 G CFP - Port 4

CFP
S S S S S S S S Daughter Card S S S S S S S S
F F F F F F F F F F F F F F F F
P P P P P P P P P P P P P P P P
5 6 7 8 9 1 1 1 1 1 1 1 1 1 1 2
0 1 2 3 4 5 6 7 8 9 0

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 63
For Your
Catalyst 6500-E & 6807-XL Information

High Performance Integrated L4-L7 Service Modules

Integrate Wired & Accelerate & Balance
Wireless Management Application Performance
BYOD SLB
Next Generation Next Generation
Wireless Controller: WISM2 Load Balancer: ACE-30
Performance 20 Gbps 16 Gbps Performance
Access Points 500 - 1000 6 Gbps Compression
Wireless Clients 15,000 per WISM2 30,000 Transactions per Second
Concurrent AP Upgrades Up to 500 250 Virtual Context
Mobility, Domain Size Up to 18,000 APs 4000 VLANs

Enhance Visibility, Deliver Robust,

Accelerate Troubleshooting Integrated, Streamlined Security
NMS SEC
Next Generation Next Generation
Network Analysis: NAM3 Firewall & DPI: ASA-SM
Monitoring Performance 16 Gbps 64 Gbps System Performance
16 Gbps Performance per ASA-SM
Capture to External Disk 6 Gbps
10,000,000 Concurrent Sessions
Performance Analytics 1588 Timestamps 300,000 Connections per Second
Hardware Filters & SPAN, FnF, SNMP 250 Security Contexts
Packet Captures Port Monitoring 1,000 VLANs

© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
SNMP, Netflow,
Network Analysis with NAM-3 NMAR, Packet Capture
WS-SVC-NAM3-6G-K9
20G Fabric Connector
Memory (24 GB)
SAS Controller
Internal
Hard Disk
(600 GB SAS)

miniSAS 1GE / 2 X86 (6 Core)

1588 Sync 2GHz CPU
10GE SFP+
/ FCoE
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 65
Wireless Services with WISM-2 WLC GUI TOOLS
WS-SVC-WISM2-K9
One device for converged Wireless and Wired Services
supporting next-generation wiring closet infrastructures…

• New Features ISE

Wireless AVC
Flexible NetFlow
Bonjour Gateway Status LEDs
NMSP Location Services
Stateful AP Failover with VSS Serial & USB
Console Ports
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 66
NAT64,IPSec,
Firewall & VPN Services with ASA-SM VPN Site-to-Site Services

WS-SVC-ASA-SM1-K9

Multi-Gigabit Fabric
• 20G Connection
Multiple Contexts (250)
• High Capacity
• Virtualized interfaces
• Memory for high session counts
• Module-to-module
communications • 24 GB of memory

Dual-Crypto Accelerators
• Hardware Processing Security Service Processors
• Accelerated Virtual Private Networking
• Multi-Services Capable
• Unified Communications Encryption
• Dedicated 64-bit multi-core Processors
• Future-proof Hardware

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 67
C6800-48P-TX Based on
WS-X6848-TX

Updated 1GE Line Cards

48 ports of RJ45
• 40Gbps Capacity per Slot
• Single DFC4 for 60Mpps
• Integrated DFC-4A (XL)
• Updated Port ASICs
• New Hardware RFID

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 68
C6800-48P-TX
Block Diagram FIRE = Fabric Interface & Replication Engine

FIRE = Fabric Interface & Replication Engine

12 x 1G Ports per Port ASIC Supervisor Switch Fabric

20G 20G
• DFC4-A supports 48 x 1G Ports EOBC

Fabric Fabric
• Improved FIRE & Fabric ASICs ASIC
BACKPLANE INTF

ASIC
• 20Gbps per Fabric Channel 20G
FPGA FPGA 20G

FIRE FIRE
• 20Gbps per FIRE ASIC ASIC ASIC
• 1.2:1 Oversubscribed @ Port ASIC 10G 10G DFC4 10G 10G

Port
• New Port ASIC Port
ASIC
Port
ASIC ASIC
Port
ASIC

PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY
Front
Panel
01-04 05-08 09-12 13-16 17-20 21-24 25-28 29-32 33-36 37-40 41-44 45-48

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 69
C6800-48P-SFP
Based on
WS-X6848-SFP

Updated 1GE Line Cards

48 ports of SFP
• 40Gbps Capacity per Slot
• Single DFC4 for 60Mpps
• Integrated DFC-4A (XL)
• Updated Port ASICs
• New Hardware RFID

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 70
C6800-48P-SFP
Block Diagram FIRE = Fabric Interface & Replication Engine

FIRE = Fabric Interface & Replication Engine

12 x 1G Ports per Port ASIC Supervisor Switch Fabric

20G 20G
• DFC4-A supports 48 x 1G Ports EOBC

Fabric Fabric
• Improved FIRE & Fabric ASICs ASIC
BACKPLANE INTF

ASIC
• 20Gbps per Fabric Channel 20G
FPGA FPGA
20G

FIRE FIRE
• 20Gbps per FIRE ASIC ASIC ASIC
• 1.2:1 Oversubscribed @ Port ASIC 10G 10G DFC4 10G 10G

Port
• New Port ASIC with more Buffers Port
ASIC
Port
ASIC ASIC
Port
ASIC

PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY
Front
Panel
ODD ODD ODD ODD ODD ODD EVEN EVEN EVEN EVEN EVEN EVEN
01-07 09-15 17-23 25-31 33-39 41-47 02-08 10-16 18-24 26-32 34-40 42-48

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 71
C6800-32P10G
Based on
WS-X6904-40G

New High Density 10GE Line Cards

32 ports of SFP/SFP+
Up to 4 ports of QSFP*
• 160Gbps Capacity per Slot
• Dual DFC4 for 120Mpps
• 2 x Integrated DFC-4E (XL)
• Support for 1/10GE or 40GE*
• 250 / 500MB Per Port TX Buffers
• VSL and IA capable on all ports
• New Hardware RFID
* with new CVR-4SFP-QSFP adapter cable

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 72
C6800-32P10G
Block Diagram FIRE = Fabric Interface & Replication Engine

FIRE = Fabric Interface & Replication Engine

Fabric ASIC of Active Sup Fabric ASIC of Standby Sup

4 x 8 SFP+ Port-Groups 40G 40G 40G 40G 40G 40G 40G Backplane

Local Fabric ASIC

• DFC4-E supports 16 x SFP Ports
2x20G 2x20G

• New FIRE & Fabric ASICs Inband DFC Inband

4
• 40Gbps per Fabric Channel Inband
DFC
Inband

4
• 40Gbps per FIRE ASIC
FIRE FIRE
• 2:1 Oversubscribed @ Port ASIC ASIC FIRE FIRE ASIC
ASIC ASIC
• Performance Mode per Port-Group
40G 40G 40G 40G
• 1/10 or 40GE Mode per Port-Group* Port ASIC Port ASIC Port ASIC Port ASIC

• 1.25 / 2.5MB RX and 250 / 500MB TX

PHY PHY PHY PHY PHY PHY PHY PHY
SFP SFP SFP SFP Front SFP SFP SFP SFP
01,03,05,07 09,11,13,15 17,19,21,23 25,27,29,31 Panel 02,04,06,08 10,12,14,16 18,20,22,24 26,28,30,32
* with new CVR-4SFP-QSFP adapter cable

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 73
Based on

C6800-16P10G WS-X6904-40G

New High Density 10GE Line Cards

16 ports of SFP/SFP+
Up to 2 Ports of QSFP*
• 80Gbps Capacity per Slot
• Single DFC4 for 60Mpps
• Integrated DFC-4E (XL)
• Support for 1 / 10GE or 40GE*
• 250 / 500MB Per Port TX Buffers
• VSL and IA capable on all ports
• New Hardware RFID
* with new CVR-4SFP-QSFP adapter cable

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 74
C6800-16P10G
Block Diagram FIRE = Fabric Interface & Replication Engine
FIRE = Fabric Interface & Replication Engine

Fabric ASIC of Active Sup Fabric ASIC of Standby Sup

2 x 8 SFP+ Port-Groups 40G 40G 40G 40G Backplane

Local Fabric ASIC

• DFC4-E supports 16 x SFP Ports 2x20G 2x20G

• New FIRE & Fabric ASICs DFC

Inband Inband
4
• 40Gbps per Fabric Channel
• 40Gbps per FIRE ASIC FIRE FIRE
• 2:1 Oversubscribed @ Port ASIC ASIC ASIC

• Performance Mode per Port-Group

40G 40G

• 1/10 or 40GE Mode per Port-Group* Port ASIC Port ASIC

• 1.25 / 2.5MB RX and 250 / 500MB TX

PHY PHY PHY PHY
SFP SFP Front SFP SFP
01-04 05-08 Panel 09-12 13-16
* with new CVR-4SFP-QSFP adapter cable

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 75
C6800-8P10G
Based on
WS-X6904-40G

New High Density Multi-Rate Line Cards

8 ports of SFP/SFP+
Up to 2 Ports of QSFP*
• 80Gbps Capacity per Slot
• Single DFC4 for 60Mpps
• Integrated DFC-4E (XL)
• 500MB Per Port TX Buffers
• Support for 1 / 10GE or 40GE*
• VSL and IA capable on all ports
• New Hardware RFID
* with new CVR-4SFP-QSFP adapter cable

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 76
C6800-8P10G
Block Diagram FIRE = Fabric Interface & Replication Engine

Fabric ASIC of Active Sup Fabric ASIC of Standby Sup

2 x 4 SFP+ Port-Groups 40G 40G 40G 40G 40G 40G 40G 40G Backplane

Local Fabric ASIC

• DFC4-E supports 8 x SFP Ports 2x20G 2x20G

• New FIRE & Fabric ASICs DFC

Inband Inband
4
• 40Gbps per Fabric Channel
• 40Gbps per FIRE ASIC FIRE FIRE
• Non Oversubscribed (1:1) ASIC ASIC

• No Need for Performance Mode

40G 40G

• 1/10 or 40GE Mode per Port-Group* Port ASIC Port ASIC

• 2.5MB RX and 500MB TX

PHY PHY
SFP Front SFP
01-04 Panel 05-08
* with new CVR-4SFP-QSFP adapter cable

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 77
Port ASIC
C6800 10G Modules PHY PHY
For Your
Information
Port-Groups & Performance Mode SFP
01-04
SFP
05-08

C6800-32P10G
Port-Group 1 Port-Group 3
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32

Port-Group 2 Port-Group 4

C6800-16P10G
Port-Group 1 Port-Group 2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

C6800-8P10G
Port-Group 1 Port-Group 2
1 2 3 4 5 6 7 8

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 78
Future Proofing with 10G to 40G Adapter
Phase I - 15.3(1)SY w Sup6T
Phase II - 15.3(1)SY1 w Sup2T

C6800-32P-10G
QSFP-40G-SR4
40G Adapter QSFP-40G-CSR4
QSFP-40G-SR-BD
QSFP-40G-LR4
C6800-16P-10G
QSFP-40G-ER4

C6800-8P-10G SFP+

QSFP

Reverse SFP to QSFP Adapter Can Upgrade Your 10G Ports to 40G
© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
Continued Investments Target
June 2017
Introducing New 40G Line Card – 8Px40G for Catalyst 6K 15.5(1)SY

160G Throughput, 2M NetFlow*

Performance mode Full IPv4 & IPv6
for line rate

Large Buffers - 1M IPv4 Routes, VSS, SGT, MACSec,

1GB/port 256K QoS & ACL LISP, HQoS, etc

Full Catalyst 6K Feature Set @ FCS—Mature and Proven

QSFP/40G Optics
QSFP-40G-SR4 QSFP-H40G-AOC3M
QSFP-40G-CSR4 QSFP-H40G-AOC5M
QSFP-40G-LR4 QSFP-H40G-AOC7M
QSFP-40G-ER4 QSFP-H40G-AOC10M
QSFP-40G-SR-BD QSFP-H40G-AOC15M
QSFP-H40G-ACU7M QSFP-40G-SR4-S
QSFP-H40G-ACU10M QSFP-40G-LR4-S
QSFP-H40G-AOC1M QSFP-40G-LR4L
QSFP-H40G-AOC2M

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 81
C6800-8P40G
New High Density 40GE Line Card

Port Group 1: Port Group 1: Port Group 3: Port Group 3:

Port 1 Port 3 Port 5 Port 7
Active in Shutdown in Active in Shutdown in
Performance Performance Performance Performance
Mode Mode Mode Mode

Port Group 2: Port Group 2: Port Group 4: Port Group 4:

Port 2 Port 4 Port 6 Port 8
Active in Shutdown in Active in Shutdown in
Performance Performance Performance Performance
Mode Mode Mode Mode

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 82
C6800-8P40G
New High Density 40GE Line Card

8 ports of QSFP
• 160Gbps Capacity per Slot
• Dual DFC4 for 120Mpps
• Integrated DFC-4E (XL) x 2
• Supports 40GE only @ FCS
• 1GB / 2GB Per Port TX Buffers
• VSL capable on all ports
• New Hardware RFID

Based on
WS-X6904-40G

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 83
C6800-8P40G FIRE = Fabric Interface & Replication Engine

Block Diagram FIRE = Fabric Interface & Replication Engine

Fabric ASIC of Active Sup Fabric ASIC of Standby Sup

• Each DFC4-E supports 4 x QSFP 40G 40G 40G 40G 40G 40G 40G 40G Backplane

Ports Local Fabric ASIC

• New FIRE & Fabric ASICs 2x20G 2x20G

Inband DFC Inband

• 40Gbps per Fabric Channel 4
Inband Inband

• 40Gbps per FIRE ASIC DFC

4
• 2:1 Oversubscribed @ PORT ASIC FIRE FIRE
ASIC FIRE FIRE ASIC
• 5MB / 10MB RX and 1GB / 2GB TX ASIC ASIC
40G 40G 40G 40G

Port ASIC Port ASIC Port ASIC Port ASIC

PHY PHY PHY PHY PHY PHY PHY PHY

Front
QSFP QSFP QSFP QSFP Panel QSFP QSFP QSFP QSFP

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 84
C6880-X
Agenda
 Background
 C6807-XL
 C6880-X
 Chassis & Power
 Fixed Supervisor
 Modular Port Card
 C6840-X
 Packet Walks
For Your
Catalyst 6880-X Information

Semi-Fixed Chassis Overview

5 RU
Catalyst 6000 (4 Half Slots)
Feature Set Up to 220G/Slot
(e.g. MPLS/VPLS, Backplane
LISP, Multicast, IPv6,
CTS, VSS, FEX)

Low-Power & Noise

High-Efficiency Fans
Powerful X86
2.0GHz CPU
Fixed RP Slot with & 4GB DRAM
Built-in 16P10G
Up to 2M FIB
Up to 5M Netflow
Up to 256K ACL
3000W (AC/DC)
Power Supplies 1:1 Redundant PS
(Front Serviceable)

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 87
For Your
Catalyst 6880-X Information

Mechanical View

Fan-Tray 4 Modular Half-Slots

Fixed Slot 5: Fixed

Uplink Ports Supervisor
Power Supplies

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 88
Catalyst 6880-X
Environmental Overview

Selectable
Height In-Reach Depth
8.5” (5RU) 21.4” to 11.7”

High Efficiency
4500 RPM
Redundant Fans
Depth
23.0”

Platinum Efficient Width Two-Post Rack

3000W 17.35” Custom Mount Kit
Power Supplies

Flexible Mounting Brackets

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 89
Catalyst 6880-X Air Flow:
Side to Side
Fan Redundancy & Air Flow Fan-Tray LEDs

Fan-Tray
Thumb-Screws

Individual
Fan-Tray Handle
Fans
(1 column of 4) Front-Serviced
Fan-Tray Card
Fan-Tray Highlights:
• Has 4 variable-speed High-Efficiency Fans (250 CFM) LED Color Status Description

• Supports 4 speeds between 3000 & 4500 RPM per Fan FAN Solid Fan-Tray OK

• Capable of cooling Slots operating up to 800W per Slot FAN Solid Fan-Tray Fault

ID Solid Identifies Fan-Tray

• Can still operate with up to 2 individual Fan failures
• Supports Fan-Tray “OIR” for minimum of 120 seconds
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Catalyst 6880-X
PSU Redundancy & Inputs C6880-X-3KW-AC (DC)

Power Supply
Status LEDs AC Input
AC
Power Switch or DC

PSU Fans PSU Lock

& Ejector
PSU Handle
PSU 1 PSU 2

LED Color Status Description

Power Supply Highlights:
IN Solid Input OK
• Max output is 3000W @ 220V (or 1300W @ 110V) IN Blinking Under-Current
• Up to 92% Power Efficiency @ 100% of load OUT Solid Output OK
• Power Hold-Up Time is ~20 msec @ 100% load OUT Blinking Over-Current

• Dual “Front to Back” Variable-Speed Cooling Fans Fault Solid Malfunction

• Supports Combined or Redundant (1:1) mode ID Solid Identifies PSU

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For Your
Power Supply Redundancy Information

Catalyst 6880-X
The Catalyst 6880-X Utilizes Two Power Supplies in Either Redundant or Combined Mode

1:1 Redundant Mode Combined Mode

50% 50% 90% 90%

PSU 1 PSU 2 PSU 1 PSU 2

• Each PSU provides ~50% of power needs • Each PSU provides up to 90% of its capacity
• Neither PSU operates at >60% or <40% capacity • Total power available is 180% of a single supply
• Either PSU can power the system on its own • A single PSU may not have power for the system
• This mode is Recommended (Default) • This mode is NOT Recommended

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Catalyst 6880-X
Based on
WS-X6904-40G

Fixed Supervisor Base Board

System
Forwarding Base Board
Daughter Board

Two HW Options 6880-X-LE 6880-X

IPv4 Routes 256K 2M

IPv6 Routes 128K 1M

16 x SFP+ Ports:
Multicast Routes 64K 128K VSS, IA (FEX),
MAC Addresses 128K 128K LISP, MPLS, HQoS, USB Host (Type A)
Security / QoS ACL Entries 64K 256K MACSEC, SGT,
USB Console (Type B)
available on Every Port
Flexible NetFlow Entries 512K 1M RJ-45 Console and
Management Ports

Enhanced Control-Plane Scale with new X86 2GHz RP CPU © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
Catalyst 6880-X:
Fixed Supervisor Design

3 Main Components:
• RP Complex
• Baseboard
• Switch Fabric

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Catalyst 6880-X
C6880X-SUP - RP Complex

Based on Sup2T MSFC5

• 2.0GHz X86 IBC CPU

• 4GB of DDR3 DRAM

4GB
DDR3
• EOBC & PCIe Switch Interface

• 2GB eUSB Bootdisk

• Direct RJ45 Ethernet Port (Mgmt0)

• USB Type A File System (Disk0)

• USB Type B Serial Console

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Catalyst 6880-X FIRE = Fabric Interface & Replication Engine
C6880-X-SUP – Uplink Ports
20Gbps 20Gbps 20Gbps 20Gbps

Based on Sup2T + 6904-40G

• 16 ports of 1/10G SFP+
• 2 x 8 SFP+ Port-Groups

• Enhanced PFC4-E Forwarding Engine

• 80Gbps to Switch Fabric (2 Modes)
• Improved 40Gbps Fabric/Replication ASIC
• New 40Gbps Port Interface MUX FPGA
• RLDRAM Packet Buffers on MUX FPGA
• 1.25 or 2.5MB RX per Port (10MB per Port ASIC)
PHY PHY PHY PHY

SFP SFP Front SFP SFP • 24 or 48MB TX per Port (192MB per MUX FPGA)
01-04 05-08 Panel 09-12 13-16

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Catalyst 6880-X:
Fabric Channel Distribution
Slot 1 Slot 2
1 2 3 4 1 2 3 4 Current Fabric Channels
Extra Fabric Channels
(for future use)

Each “Channel” can

Switch
4

use any of the following

Slot 4
Slot 3

3
3

Clock Frequencies:
Fabric

2
• 6.25 GHz for 40 Gbps
2
1

1
• 7.50 GHz for 55 Gbps

4
1 2 3 4

Slot 5
Baseboard
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Catalyst 6880-X
Based on
WS-X6904-40G

C6880-X-16P10G - 16-port SFP+ Multi-Rate Port Card

Port Card Port Status
Status LED LED
Port Card
Base Board

16 x 10/1G Ejector Port Card

Lever Forwarding Engine
SFP Ports ID LED Daughter Board

Two Versions Standard (LE) Large Tables Port Speed & Type Number of Ports
FIB Table v4/v6 256K/128K 2M/1M 10/100/1000 Mb/s Copper 16 (GLC-T)
NetFlow Table 512K 1M 1 Gb/s Fiber 16 (SFP)
Security ACL Table 64K 256K 10 Gb/s Fiber 16 (SFP+)
Port Buffering 48MB / Port 48MB / Port 40 Gb/s Fiber 4 (SFP-QSFP)

MacSec, FEX, VSS, LISP, SGT, 1588 Capable on Every Port © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
Catalyst 6880-X FIRE = Fabric Interface & Replication Engine
C6880-X-16P10G Architecture

Same as Baseboard + 1.2Ghz LCP

• 16 ports of 1/10G SFP+
• 2 x 8 SFP+ Port-Groups

• Enhanced DFC4-E Forwarding Engine

• 80Gbps to Switch Fabric (2 Modes)
• Improved 40Gbps Fabric/Replication ASIC
• New 40Gbps Port Interface MUX FPGA
• RLDRAM Packet Buffers on MUX FPGA
PHY PHY PHY PHY • 1.25 or 2.5MB RX per Port (10MB per Port ASIC)
SFP SFP SFP SFP
01-04 05-08
Front
Panel 09-12 13-16 • 24 or 48MB TX per Port (192MB per MUX FPGA)

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C6840-X
For Your
Catalyst 6840-X Chassis Information

High-Level Overview
Catalyst 6000 2 RU 4 Models with
Feature Set (Fixed Chassis)
up to 48 x 10G
(e.g. MPLS/VPLS, Low-Power & Noise
LISP, Multicast, IPv6, High-Efficiency Fans and 12 x 40G
CTS, VSS, FEX)

Powerful X86
Up to 256K FIB 750/1100W (AC/DC)
2.0GHz CPU
Up to 1.5M NetFlow Power Supplies
& 4GB DRAM
Up to 64K ACL
1:1 Redundant PS
(Front Serviceable)

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Catalyst 6840-X For Your
Information
Mechanical View

Rear-Serviced Slot 1: Fixed

Fan-Tray Supervisor

1 3 5 7 9 11 13 15 17 19 21 23 41 42

Fixed 2 4 6 8 10 12 14 16 18 20 22 24 43-46 47-50

Uplink 25 27 29 31 33 35 37 39
Ports PSU1 PSU2
26 28 30 32 34 36 38 40

Power Supplies

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NEW
Catalyst 6840-X
Environmental Overview

Height
High Efficiency 3.5 in (2RU)
6500 RPM
Redundant Fans

Depth
Width 21.8 in
Platinum Efficient 17.35 in
750 / 1100W
Power Supplies

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Catalyst 6840-X Air Flow:
Front to Back
Fan Redundancy & Air Flow
Fan-Tray
Thumb-Screws

Individual
Fans Fan-Tray Handle
(2 set of 2) Airflow
Intake Vents

Fan-Tray Highlights:
• Has 4 variable-speed High-Efficiency Fans (200 CFM) LED Color Status Description

• Supports 4 speeds between 6500 & 11000 RPM per Fan FAN Solid Fan-Tray OK

• Capable of cooling of ALL 4 C6804-X chassis models FAN Solid Fan-Tray Fault

• Can still operate with up to 2 individual Fan failures

• Supports Fan-Tray “OIR” for minimum of 120 seconds
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Catalyst 6840-X
PSU Redundancy & Inputs
PSU Fans AC or DC
C6840-X-750W-AC (DC)
C6840-X-1110W-AC (DC)

Power Supply
Status LEDs AC Input

PSU Lock PSU 1 PSU 2

PSU Handle & Ejector

Power Supply Highlights: LED Color Status Description

• Two AC or DC models @ 110V: 750W or 1100W IN Solid Input OK

• Up to 92% Power Efficiency @ 100% of load IN Blinking Under-Current

OUT Solid Output OK

• Power Hold-Up Time is ~20 msec @ 100% load
OUT Blinking Over-Current
• “Front to Back” Variable-Speed Cooling Fans
Fault Solid Malfunction
• Supports Combined or Redundant (1:1) mode
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For Your
Power Supply Redundancy Information

Catalyst 6840-X
The Catalyst 6840-X Utilizes Two Power Supplies in Either Redundant or Combined Mode

1:1 Redundant Mode Combined Mode

90% 90%
50% 50%

PSU 1 PSU 2 PSU 1 PSU 2

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NEW
Catalyst 6840-X Series
Fixed Chassis Portfolio
15.2(1)SY 15.2(1)SY
C6816-X-LE C6832-X-LE
Q4CY2014 C6824-X-LE-40G
Q4CY2014 C6840-X-LE-40G

Native Optics SFP/SFP+ SFP/SFP+ SFP/SFP+ and QSFP SFP/SFP+ and QSFP
# of 10G Ports 16 32 24 40
+8 using breakout cable +8 using breakout cable

# of 40G Ports 2 2
+4 using reverse adapter +8 using reverse adapter +6 using reverse adapter +10 using reverse adapter

IPv4 / v6 Routes 256K / 128K 256K / 128K 256K / 128K 256K / 128K
Multicast Routes 128K / 64K 128K / 64K 128K / 64K 128K / 64K
MPLS Labels 256K 256K 256K 256K
MAC Addresses 128K 128K 128K 128K
Security ACL 64K (Shared) 64K (Shared) 64K (Shared) 64K (Shared)
QoS ACL 64K (Shared) 64K (Shared) 64K (Shared) 64K (Shared)
Flexible NetFlow 512K 1M 1M 1.5M

Enhanced Control-Plane Scale with X86 2GHz RP CPU © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
Catalyst 6840-X:
Fixed Chassis Design

3 Main Components:
• RP Complex
• Baseboard
• Switch Fabric

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Catalyst 6840-X
Fixed Chassis - RP Complex

Based on C6880-X-SUP
• 2.0GHz X86 IBC CPU

• 4GB of DDR3 DRAM

4GB
DDR3
• EOBC & PCIe Switch Interface

• 2GB eUSB Bootdisk

• Direct RJ45 Ethernet Port (Mgmt0)

• USB Type A File System (Disk0)

• USB Type B Serial Console

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Catalyst 6840-X:
Fabric Channel Distribution

Fabric Channels

2
1

PG 4-5
PG 3-4

Switch
Each “Channel” uses
Fabric the following Clock
Frequency:

1
2

• 6.25 GHz for 40 Gbps

1 2

PG 1-2

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NEW
Catalyst 6840-X
FIRE = Fabric Interface & Replication Engine
C6816-X-LE

Local Fabric ASIC Based on C6800-16P10G

•
2x20G 2x20G
16 ports of 1/10G SFP+
DFC
Inband
4 Inband
• 2 x 8 SFP+ Port-Groups

• Enhanced DFC4-E Forwarding Engine

FIRE FIRE
ASIC ASIC • 80Gbps to Switch Fabric (2 Modes)
• New 40Gbps Fabric & Replication ASIC
40G 40G

Port ASIC Port ASIC • Combines FIRE ASIC & MUX FPGA of 6880-X

PHY PHY PHY PHY

• DDR3 Packet Buffers on FIRE & Port ASIC
SFP
01-04
SFP
05-08
Front
Panel
SFP
09-12
SFP
13-16
• 1.25 or 2.5MB RX per Port (10MB per Port ASIC)

• 250 or 500MB TX per Port (2GB per FIRE ASIC)

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NEW
Catalyst 6840-X
FIRE = Fabric Interface & Replication Engine
C6832-X-LE32-X-LE

Local Fabric ASIC Based on C6800-32P10G

•
2x20G 2x20G
32 ports of 1/10G SFP+
Inband Inband
DFC4
• 4 x 8 SFP+ Port-Groups
Inband Inband

DFC4 • 2 x DFC4-E Forwarding Engines

FIRE FIRE
ASIC FIRE FIRE ASIC • 80Gbps to Switch Fabric (2 Modes)
ASIC ASIC
• New 40Gbps Fabric & Replication ASIC
40G 40G 40G 40G
Port ASIC Port ASIC Port ASIC Port ASIC
• Combines FIRE ASIC & MUX FPGA of 6880-X
• DDR3 Packet Buffers on FIRE ASIC
PHY PHY PHY PHY PHY PHY PHY PHY
SFP SFP SFP SFP Front SFP SFP SFP SFP • 1.25 or 2.5MB RX per Port (10MB per Port ASIC)
01-04 05-08 09-12 13-16 Panel 17-20 21-24 25-28 29-32

• 250 or 500MB TX per Port (2GB per FIRE ASIC)

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NEW
Catalyst 6840-X
FIRE = Fabric Interface & Replication Engine
C6824-X-LE-40G

Local Fabric ASIC Based on C6800-32P10G

•
2x20G 2x20G
24 ports of 1/10G SFP+ / 2 ports of 40G QSFP
Inband Inband
DFC4 • 3 x 8 SFP+ Port-Groups / 1 x 2 QSFP Port-Group
Inband Inband

DFC4 • 2 x DFC4-E Forwarding Engines

FIRE FIRE
ASIC FIRE FIRE ASIC • 80Gbps to Switch Fabric (2 Modes)
ASIC ASIC
• New 40Gbps Fabric/Replication ASIC
40G 40G 40G 40G
Port ASIC Port ASIC Port ASIC Port ASIC
• Combines FIRE ASIC & MUX FPGA of 6880-X
• DDR3 Packet Buffers on FIRE ASIC
PHY PHY PHY PHY PHY PHY PHY PHY
SFP SFP SFP SFP Front SFP SFP QSFP QSFP • 1.25 or 2.5MB RX per Port (10MB per Port ASIC)
01-04 05-08 09-12 13-16 Panel 17-20 21-24 25 26
• 250 or 500MB TX per Port (2GB per FIRE ASIC)

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NEW
Catalyst 6840-X
FIRE = Fabric Interface & Replication Engine
C6840-X-LE-40G
Local Fabric ASIC 2x20G

2x20G

Inband Inband
2x20G
Based on C6800-32P10G
DFC4
Inband

DFC4
Inband
• 40 ports of 1/10G SFP+, 2 ports of 40G QSFP
FIRE FIRE
ASIC FIRE FIRE ASIC • 5 x 8 SFP+ Port-Groups, 1 x 2 QSFP Port-Group
ASIC ASIC
40G 40G 40G 40G
• 3 x DFC4-E Forwarding Engines
Port ASIC Port ASIC Port ASIC Port ASIC

PHY PHY PHY PHY PHY PHY PHY PHY

• 80Gbps to Switch Fabric (2 Modes)
SFP SFP SFP SFP SFP SFP SFP SFP
•
Front
01-04 05-08 09-12 13-16 Panel 17-20 21-24 25-28 29-32
Inband
New 40Gbps Fabric/Replication ASIC
•
Inband

DFC4 Combines FIRE ASIC & MUX FPGA of 6880-X

FIRE
FIRE ASIC • DDR3 Packet Buffers on FIRE ASIC
ASIC
40G 40G • 1.25 or 2.5MB RX per Port (10MB per Port ASIC)
Port ASIC Port ASIC
• 250 or 500MB TX per Port (2GB per FIRE ASIC)
PHY PHY PHY PHY

SFP SFP Front QSFP QSFP

33-36 37-40 Panel 41 42

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Agenda
 Background
 C6807-XL
 C6880-X
 C6840-X
 Packet Walks
Layer 2 Switching For Your
Information

L2 Forwarding Steps
Frame received

1
L2 Table Source MAC Destination MAC L2 Table
Lookup Lookup

2
Learn New MAC? Router MAC? L3 forwarding
Yes Yes
L2 Table
No No
3
Update entry Known MAC? L2 forwarding
Yes
L2 Table
No

L2 flooding

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Layer 2 Switching
Layer 2 MAC Table

PFC & DFC MAC Table

Table
MAC Port
has an CAM with
A 1
N pages x 4096 rows = B 2
MAC address space C 3
D 4
E 5
F 6

32
PFC Pages 4096
Rows

MAC Table

PFC4 = 128K Entries

VLAN MAC PFC

1 Hash 0000.2222.7777 | 20
0000.1111.cccc | 10
4096
0000.dddd.a112 | 30 Rows
2
MAC Table Row 0000.bbbb.ac1c | 30

HIT! MAC Table

1. Hash result identifies the starting Page and Row in the MAC table
2. Lookup Key (VLAN + MAC) compared to contents on each page (sequentially)
- DST MAC Lookup: Match returns Destination interface(s) OR Miss results in Flood
- SRC MAC Lookup: Match updates age of current entry OR Miss installs new entry
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For Your
Displaying the Layer 2 Table Information

SUP2T#show mac address-table

Legend: * - primary entry

age - seconds since last seen; n/a - not available; S - secure entry;
R - router's gateway mac address entry; D - Duplicate mac address entry

Displaying entries from active supervisor:

vlan mac address type learn age ports

----+----+---------------+-------+-----+----------+-----------------------------
* 192 00d0.0053.bc00 dynamic Yes 5 Gi7/3
R 205 0024.c4dc.d740 static No - Router
R 20 0024.c4dc.d740 static No - Router
* 192 0014.5e31.4220 dynamic Yes 65 Gi7/3
* 60 00d0.2bfc.23f5 dynamic Yes 30 Gi5/14
* 192 00e0.1e5d.e9ff dynamic Yes 30 Gi7/3
…

Catalyst 6500/6800 Information

Understanding EtherChannels

• Combines Multiple physical ports into One logical port

• Deterministic Hash-based Channel Load-Balancing

• Configurable Hash uses SRC, DST, L2 and / or L3

• Load Sharing is always Per Flow (Not Per Packet)

• PFC3 hash algorithm supports 8 results (3 bits)

• PFC4 hash algorithm supports 256 results (8 bits)

EtherChannel Load-Balancing Information

PFC3 Flow Distribution

Frame 1 2 3 4 5 6 7 8

EtherChannel Hash 3 bit Result

Channel
Link1 Link2 Link3 Link4 Link5 Link6 Link7 Link8
Bundle
2 Links 50% 50% -- -- -- -- -- --
3 Links 37.5% 37.5% 25% -- -- -- -- --
4 Links 25% 25% 25% 25% -- -- -- --
5 Links 25% 25% 25% 12.5% 12.5% -- -- --
6 Links 25% 25% 12.5% 12.5% 12.5% 12.5% -- --
7 Links 25% 12.5% 12.5% 12.5% 12.5% 12.5% 12.5% --
8 Links 12.5% 12.5% 12.5% 12.5% 12.5% 12.5% 12.5% 12.5%

Even distribution ONLY for Hash Combinations highlighted in RED!

EtherChannel Load-Balancing Information

PFC4 Flow Distribution

Frame 1 2 3 4 … 256

EtherChannel Hash 8 bit Result

Channel
Link1 Link2 Link3 Link4 Link5 Link6 Link7 Link8
Bundle
2 Links 50% 50% -- -- -- -- -- --
3 Links 33.6% 33.2% 33.2% -- -- -- -- --
4 Links 25% 25% 25% 25% -- -- -- --
5 Links 20.4% 19.9% 19.9% 19.9% 19.9% -- -- --
6 Links 16.8% 16.8% 16.8% 16.8% 16.4% 16.4% -- --
7 Links 14.5% 14.5% 14.5% 14.5% 14% 14% 14% --
8 Links 12.5% 12.5% 12.5% 12.5% 12.5% 12.5% 12.5% 12.5%

Nearly Even distribution for ODD & EVEN Hash Combinations!

EtherChannel Uses a Hash Algorithm to Determine which Link in the Bundle to Use -
The Inputs to the Algorithm Are a Combination of L2, L3 and / or L4 addresses
dst-ip Dst IP Addr
dst-mac Dst Mac Addr
dst-mixed-ip-port Dst IP Addr and TCP/UDP Port
dst-port Dst TCP/UDP Port
mpls Load Balancing for MPLS packets
src-dst-ip Src XOR Dst IP Addr
src-dst-mac Src XOR Dst Mac Addr
src-dst-mixed-ip-port Src XOR Dst IP Addr and TCP/UDP Port
src-dst-port Src XOR Dst TCP/UDP Port
src-ip Src IP Addr
src-mac Src Mac Addr
src-mixed-ip-port Src IP Addr and TCP/UDP Port
src-port Src TCP/UDP Port
vlan-dst-ip Vlan, Dst IP Addr
vlan-dst-mixed-ip-port Vlan, Dst IP Addr and TCP/UDP Port
vlan-src-dst-ip Vlan, Src XOR Dst IP Addr
vlan-src-dst-mixed-ip-port Vlan, Src XOR Dst IP Addr and TCP/UDP Port
vlan-src-ip Vlan, Src IP Addr
vlan-src-mixed-ip-port Vlan Src IP Addr and TCP/UDP Port

Interface Management Information

VLANs & Interfaces

Supervisor 720 Supervisor 2T

4K VLAN POOL 16K Bridge 128K Logical

Domains Interfaces
VLANs L3 Ports
SVIs Tunnels VLAN 1 - 4K
L3 Ports
CoPP Etc…
VLAN 1 - 4K SVIs Tunnels

VLAN 1 - 4K CoPP Etc…

• VLANs used for both L2 Bridging • Separate L2 Bridging and L3 Routing

and L3 Routing
• Breaks the 4K VLAN barrier
• Each L3 Interfaces consumes
an internal VLANs from total 4K • Allows VLAN reuse on Per Port basis
VLAN pool
• Massive scale for L3 interfaces
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For Your

L3 Forwarding Information

High-Level SW & HW Process

Control Plane (RP)
Routing Protocols Stores routing details,
OSPF, EIGRP, RIP, BGP, etc from Static Routes &
RP receives routing updates Routing Protocols in
from attached neighbors Routing Information Base
1 (RIB)
2
Software CEF 3
FIB (on PFC/DFC) Takes RIB and builds a
FIB & ADJ tables are used Hardware CEF Forwarding Information
Loads FIB into PFC Base (FIB) containing
by EARL to perform L3
& distributes to DFC’s IP/mask prefixes
lookups & forwarding
5 4
Hardware-based CEF Process
1. FIB lookup based on Destination prefix (longest-match)
2. FIB “Hit” returns an Adjacency pointer
3. Adjacency contains Rewrite (next-hop) information
4. ACL, QoS & NetFlow lookups occur IN PARALLEL (may effect final result)

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L3 Forwarding
FIB & Adjacency Overview
Each PFC/DFC stores a copy of the “FIB” & “Adjacency Table”… 172.20.45.1 IF1, MAC, MTU
FIB contains: 10.1.1.100
IF2, MAC, MTU
MASK (/32)
CEF entries from MOST to LEAST specific … IF3, MAC, MTU
based on /Mask
10.1.3.0 IF4, MAC, MTU
FIB TCAM shared by: 10.1.2.0
…
– IPv4 Unicast MASK (/24)
– IPv4 Multicast … …

– IPv6 Unicast 10.1.0.0 Adjacency

– IPv6 Multicast Table
172.16.0.0
– MPLS
MASK (/16)
Adjacency Table: …
– L2 “Re-Write” information and / or pointers for replication 0.0.0.0
– Hardware Adjacency table also shared among protocols MASK (/0)

FIB TCAM
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L3 Forwarding
FIB & ADJ Lookup in PFC/DFC
Lets assume a lookup needs to be performed for a packet with
a destination of 10.1.5.2 /24, then the following would occur…

1 Packet 172.20.45.1
10.1.1.100
MASK (/32)
IF1, MAC, MTU
2 Key Gen …
10.1.3.0 IF2, MAC, MTU

10.1.2.0
7
Load-Sharing 6 IF3, MAC, MTU
3 Lookup Key MASK (/24) Hash
… 4
IF4, MAC, MTU

PFC/DFC FIB TCAM Information

Defaults and Changes

IPv4 Unicast & MPLS require only 1 entry
NON-XL XL
IPv6 Unicast & IPv4 Multicast require 2 entries PFC PFC
Standard PFC/DFC = 256K entries IPv4, MPLS 192k 512k

The “XL” PFC/DFC = 1M entries IPv6, Multicast 32k 256k

Default TCAM allocation shown below

Changing default (requires Reboot!)
SUP2T-XL Example
SUP2T(config)#platform hardware cef
SUP2T#sh platform hardware cef maximum-routes maximum-routes ?
FIB TCAM maximum routes : ip number of ip routes
======================= ip-multicast number of multicast routes
Current :- ipv6 number of ipv6 routes
------- mpls number of MPLS
IPv4 + MPLS - 512k (default) labels
IPv6 + IP Multicast - 256k (default)

SUP2T#show platform hardware capacity forwarding

...
L3 Forwarding Resources
FIB TCAM usage: Total Used %Used
72 bits (IPv4, MPLS, EoM) 196608 28 1%
144 bits (IP mcast, IPv6) 32768 7 1%

detail: Protocol Used %Used

IPv4 28 1%
MPLS 0 0%
EoM 0 0%

IPv6 1 1%
IPv4 mcast 3 1%
IPv6 mcast 3 1%

Adjacency usage: Total Used %Used

1048576 171 1%

SUP2T#show platform hardware cef

Codes: decap - Decapsulation, + - Push Label
Index Prefix Adjacency
68 255.255.255.255/32 receive
75 10.10.1.1/32 receive
76 10.10.1.0/32 receive
77 10.10.1.255/32 receive
78 10.10.1.2/32 Gi1/1, 0030.f272.31fe
3200 224.0.0.0/24 receive
3201 10.10.1.0/24 glean
3202 10.100.0.0/24 Gi1/1, 0030.f272.31fe
3203 10.100.1.0/24 Gi1/1, 0030.f272.31fe
3204 10.100.2.0/24 Gi1/1, 0030.f272.31fe
3205 10.100.3.0/24 Gi1/1, 0030.f272.31fe
...

SUP2T#show platform hardware cef 171.1.1.0

Codes: decap - Decapsulation, + - Push Label
Index Prefix Adjacency

SUP2T#show platform hardware cef lookup 171.1.1.0

Codes: decap - Decapsulation, + - Push Label
Index Prefix Adjacency
3531584 171.0.0.0/8 Vl192 ,00d0.0053.bc00

SUP2T#show platform hardware cef ipv6 lookup FF00::

Codes: + - Push label
Index Prefix Adjacency
512 FF00::/8 glean

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Agenda
 Background
 C6807-XL
 C6880-X
 C6840-X
 L2 Forwarding
 L3 Forwarding
 NetFlow
 Access Control
 Packet Walks
Catalyst Hardware NetFlow
Cisco NetFlow is a process designed to collect information about traffic “flows” that pass through a switch

Data Flow (PFC) Netflow

Collection
Exported Netflow Server
Record (MSFC) NetFlow

NetFlow Flow Masks

Hardware NetFlow Information

Supervisor 2T Enhancements
Increased customization and scale by
selecting the fields to Match and
Optimal CPU Utilization with Collect for both IPv4 and IPv6
Yielding NDE & Direct Export Flexible
from a Line Card NetFlow
Bigger tables mean
Up to 13M MORE entries per
CPU Friendly Flows per system, giving you
Export better visibility into
System your network (up to
13 million NF entries
with a 13 slot chassis)
Allow to use Netflow after
ingress lookup is done Sampled
(NetFlow on CoPP) Egress
Netflow in
Allow to account for Netflow Optimize the Netflow
Hardware Tables utilization and
IP Multicast traffic per
destination instead of per group minimize load on Analyzers

DataKey
Data Key Index
Index Flow Data Statistics
Data
Data Key
Key Index
Index
DataKey
Data Key Index
Index Flow Data Statistics
2 Data
Data Key
Key Index
Index
Data Key
DataKey
Key Index
Index Flow Data Statistics
Data
Data Key Index
Index
DataKey
Data Key Index
Index Flow Data Statistics
Flow
Flow Key
Key Data
Data Key
Key Index
Index Compare
DataKey
Data Key Index
Index Flow Data Flow Data Statistics
Data
Data Key
Key Index
Index
Data Key
DataKey
Key Index
Index Flow Data Statistics
Data
Data Key Index
Index 7
DataKey
HIT!
Data Key Index
Index Flow
HIT! Data 8 Statistics
Data
Data Key
Key Index
Index
3 DataKey
Data Key Index
Index Flow Data Statistics
Data
Data Key
Key Index
Index 6 Update
DataKey
Data Key Index
Index Flow Data Statistics
Hash Function Compare Data
Data Key
Key Index
Index
Stats
all pages Data Key
DataKey
Key Index
Index Index to Flow Data Statistics
Data
Data Key Index
Index
5 Data Key
DataKey
Key Index
Index
NF Data Flow Data Statistics
Data
Data Key Index
Index Table

Lookup Key Data Key

Data Key

512K
entries
4 Indexes row in Lookup Table
NetFlow Data Table NetFlow Statistics
NetFlow Lookup Table
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 137
Hardware NetFlow For Your
Information

Sup2T Flexible NetFlow Flow Record Flow Export

Multiple Exporters Export Profile
Key Field Non-Key Field can be associated
with a single FNF
Key Field Non-Key Field monitor Export Profile

… … …

Key Fields trigger the creation of a new Flow entry

every time their value change
Flow
Non-Key Fields are data that is indexed by the Key Fields. Flow Profile Monitor
Key Fields are defined using the “match” statement
Non-Key-Fields are defined using the “collect” statement

Ingress Ingress Same Flow Monitor

and / or …. and / or can be associated with
Egress Egress multiple Interfaces

Netflow
Export Netflow
Data

Netflow Collector
WS-X6848-TX-2T
Netflow Direct Export with Sup2T:
Data
EOBC • C6800-32P10G
• C6800-16P10G
WS-X6908-10G-2T • C6800-8P10G
• WS-X6904-40G
Netflow Direct
Data
Export • WS-X6908-10G
• WS-X6816-10X
• WS-X6716-10X (DFC4-E)
Also supported on C6880-X:
• C6880-X-16P10G
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 139
For Your

Hardware NetFlow Information

Sup2T “CPU Friendly” Netflow Export

NDE increases
export rate until
threshold reached When threshold reached,
CPU
Utilization NDE quickly backs off
20% export rate

Yielding NDE
70% CPU threshold

30% CPU before

NDE begins
Wait 5 seconds and then
step up export rate again

SUP2T#show platform hardware capacity netflow

Netflow resources:
Netflow table size: 515032 entries total

Netflow table usage: Module/Instance Input flows Output flows

3 10% 10%
7 25% 25%

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For Your
Information
PFC3 vs. PFC4 - Flexible Netflow
Feature PFC3 PFC4
Netflow Entries 256 K (Ingress Only) 512 K Ingress – 512 K Egress
Shared Netflow Policers N/A 512
Netflow Samplers N/A 1K
Class Maps per Policy Map 1K 4K
Aggregate Policers 1K 6K
Distributed Policers N/A 4K
Microflow Policers 63 128
Flexible Netflow N/A Yes
Egress Netflow N/A Yes
VRF-aware Netflow N/A Yes*
Direct Export,
Netflow Export Enhancements Direct Export
CPU Yield, EEM
Packet or Byte Policing Byte-based Packet or Byte-based

* Available in future IOS software releases

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 142
Agenda
 Background
 C6807-XL
 C6880-X
 C6840-X
 L2 Forwarding
 L3 Forwarding
 NetFlow
 Access Control
 Packet Walks
Access Control Lists
Hardware Support
Full Hardware Support
DFC Policy Feature Card
Distributed Forwarding Card
Create an ACL or classification DFC
policy, using the CLI or Network • Router ACLs
PFC
Management System (NMS) • VLAN ACLs
PFC • Port Based ACLs
• Role Based ACLs
1 DFC 2
ip access-list extended Internet DFC
permit ip any host 10.2.2.4 DFC
permit ip any host 10.5.2.33
Hardware- Assisted
3
permit ip any host 10.11.0.0
ACL Features
permit ip any host 10.4.0.0
• NetFlow
• NAT & PAT
• PBR
• WCCP
• Reflexive ACLs
• Cisco Trust Sec

Three Forms of Security ACLs

The PFC / DFC supports three forms of Security ACLs: the RACL, VACL and PACL…

Router ACL (RACL) VLAN ACL (VACL) Port ACL (PACL)

Used to permit or deny the Used to permit or deny the

Used to permit or deny the
movement of traffic movement of traffic
movement of traffic
between Layer 3 Subnets between Layer 3 Subnets
between Layer 3 Subnets
& VLANs or within a VLAN & VLANs or within a VLAN

Applied as a policy to a Applied as a policy to a

Applied as an input or output VLAN - is inherently applied Layer 2 Switch port interface
policy to a Layer 3 interface to both inbound and - is applied for inbound traffic
outbound traffic only

3 4
Input RACL Output RACL

2 5
VACL VACL

1
Input PACL Note: NO
Output PACL
exists

VACL
Forwarding Engine
QoS RACL

SGACL
PACL RACL

3 ACE
Counters
TCAM Controller (L2 ASIC)

4X
2 2X
Results 4 7
Lookup Keys
4 X Results
& Priority Final Result
Packet Header Information ACL ACL to Netflow
Labels LOUs 6
8
Classification Module 1 Classification Module 2
1 5

Access Control Lists Information

Mask Utilization: PFC3 vs PFC4

permit ip 10.1.1.0 0.0.0.255 any
permit ip 10.2.1.0 0.0.0.255 any
permit ip 10.3.0.0 0.0.255.255 any

PFC3 ACL TCAM PFC4 ACL TCAM

10.1.1.0 permit Mask 0.0.0.255 10.1.1.0 permit
MASK 10.2.1.0 permit Mask 0.0.0.255 10.2.1.0 permit
- -
- - Mask 0.0.255.255 10.3.0.0 permit
0.0.0.255 - - - - -
- - - - -
- - - - -
- - - - -
10.3.0.0 permit - - -
- - -
MASK - - - - -
- - - - -
- -
- -
0.0.255.255 - -
- - 3 ACEs
- -
used
16 ACEs
used
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 148
For Your

Access Control Lists Information

PFC4 “ACL Dry Run” Feature

• Make sure an ACL can fit in the SUP2T-E# show configuration session test status
TCAM before you apply the ACL ====================================
Status of last config validation:
- ACLs that do not fit can cause Timestamp: 2013-09-20@17:27:06
software forwarding and possible ======================================
high CPU utilization
SLOT = [1] Result = Configuration will fit in TCAM
• Special configuration session
- Create and Edit the ACL
- Verifies if the changes will fit within
the hardware resources
• The actual changes are not
programmed into the hardware
during the dry-run session
• Configuration changes can be
verified step by step…

Access Control Lists Information

PFC4 “ACL Hitless Update” Feature

IPv6
• Allows updates to an ACL without IPv4
interrupting traffic
MAC
• Multiple features updated at once

• IPv4, IPv6, MAC…

• RACL, VACL, PBR… ACL
Updates
• Global configuration option (default is on)
• Feature does consume double the number of
TCAM entries

Access Control Lists Information

PFC4 ACL Hitless Update

 Each ACL feature is initially TCAM A TCAM B

programmed into 2 different BANK 0 BANK 1 BANK 2 BANK 3

VACL-1
spaces into the TCAM QoS-1 VACL-2
Primary Space (Label-1) QoS-2 SGT-1 RACL-1
SGT-2 RACL-2
Shadow Space (Label-2)

 While an ACL is being updated

the PFC4 will use a temporary TCAM Controller
label that points to the shadow
TCAM space 2 X Lookup Keys 4 X Results & Priority

 Once the ACL changes have been ACL

completed the then PFC4 will then Labels ACL LOUs
1, 2
use the original label again
Classification Module 1

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 151
For Your
Information
PFC3 vs. PFC4 - Security
Feature PFC3 PFC4
ACL TCAM Size 64K or 256K
32K
(Programmable)
ACL Labels 4K 16K
ACE Mask Ratio 8:1 1:1
ACL LOU’s 64 208
Port ACL’s 2K 8K
MAC ACL Support Software Hardware
Per-Port Per-VLAN ACL’s N/A Yes
Security Group ACL’s N/A 32K
Security Group Tagging (SGT) CTS 1.5 (SXP) CTS 2.0
802.1ae Encryption Support N/A Yes (Line-Rate)
Unicast RPF IPv4 (2 paths) IPv4 & IPv6 (16 paths)
Layer3: 8 Layer3: 31
Hardware Rate Limiters
Layer2: 4 Layer2: 26

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 152
Agenda
 Background
 C6807-XL
 C6880-X
 C6840-X
 L2 Forwarding
 L3 Forwarding
 Packet Walks
 6700/6800 & 6900
 C6800 1G Series
 C6800 10G Series
 C6880-X Series
 C6840-X Series
For Your
Information
6700 to 6700 - Centralized Forwarding
1
Slot 1 Slot 2
Port ASIC A Port ASIC B Port ASIC A Port ASIC B

R CFC CFC 7
2
P
FIRE ASIC AH FIRE ASIC B FIRE ASIC A FIRE ASIC B
6 3 Dbus

Rbus

Michael Switch Fabric Amanda

Engineering Marketing
5 PFC4
H H 5 P = Packet
R 4 R
Fabric / Bus Layer 2 Engine
Interface & H = Header
Replication ASIC Layer 3 Engine
R = Result
Supervisor Engine 2T
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 154
1 15
Slot 2
Port ASIC A Port ASIC B
6700 (CFC) 14
Local Forwarding
CFC

2 4 10 10
5
FIRE ASIC A 3 FIRE ASIC B
11 13

5 E-DBUS

10 E-RBUS

12
Switch Fabric
10 6
5
9
Port ASIC
6
Fabric / Bus
Layer 2 Engine 7 P
10 Interface &
Replication ASIC F
CPU (MSFC) Layer 3 Engine 8
C
Supervisor Engine © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
For Your
6800 to 6800 - Distributed Forwarding (DFC) Information

1
Slot 1 Slot 2
Port ASIC A Port ASIC B Port ASIC A Port ASIC B
3
DFC4 L L DFC4 L L
R 2 3 2 3 6
2
4
P
FIRE ASIC A H FIRE ASIC B FIRE ASIC A FIRE ASIC B

5 Dbus

Rbus

Michael Switch Fabric Amanda

Engineering Marketing
PFC4
P = Packet
Fabric / Bus Layer 2 Engine
Interface & H = Header
Replication ASIC Layer 3 Engine
R = Result
Supervisor Engine 2T
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 156
1 13
Slot 2
Port ASIC A Port ASIC B
6800 (DFC) 2 12
Local Forwarding
5
DFC

3 4 6 10 11
FIRE ASIC A FIRE ASIC B
7 9

E-DBUS

E-RBUS

8
Switch Fabric

Port ASIC Fabric / Bus

Layer 2 Engine P
Interface &
Replication ASIC F
CPU (MSFC) Layer 3 Engine C
Supervisor Engine © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
For Your
Information
6900 to 6900 - Distributed Forwarding (DFC)
CTS ASIC A Slot1 CTS ASIC B CTS ASIC A Slot2 CTS ASIC B
6b
1a
1b Port ASIC A Port ASIC B Port ASIC A Port ASIC B 6a
3
DFC4 L L DFC4 L L
R 2 3 2 3
2
4
P
FIRE ASIC A H FIRE ASIC B FIRE ASIC A FIRE ASIC B

5 Dbus

Rbus

Michael Switch Fabric Amanda

Engineering Marketing
PFC4
P = Packet
Fabric / Bus Layer 2 Engine
Interface & H = Header
Replication ASIC Layer 3 Engine
R = Result
Supervisor Engine 2T
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 158
1 14
CTS CTS Slot 2 CTS CTS
6900 (DFC) ASIC A
2
ASIC B ASIC C
13
ASIC D

Local Forwarding Port Port Port Port

ASIC A ASIC B ASIC C ASIC D
12
DFC 5
3 4 6 10 11
FIRE ASIC A FIRE ASIC B
7 9

E-DBUS

E-RBUS

8
Switch Fabric

Port ASIC Fabric / Bus

Multicast Ingress Replication Model Egress Linecards

Host
Ingress Linecard RE Host
Host
Switch
Fabric Host

1 RE 3 4 RE Host
2 Host

Host
RE Host
Host Host Host Host
Ingress Replication Engine (RE) responsible Replicates for each egress linecard
for replication to ALL OIF’s
Switch Fabric sends copies for each OIF

Multicast Egress Replication Model Egress Linecards

Host
Ingress Linecard RE Host
Host
Switch
Fabric Host
RE RE 5
1 3 4 Host
2
Host

Host
RE Host
Host Host Host Host
Ingress Replication Engine responsible Switch Fabric replicates for each OIF
for replication to local OIF’s
Replicates a SINGLE copy to Fabric Local Linecard RE replicates for local OIF’s

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Catalyst 6800
Packet Walks
Agenda
 Background
 C6807-XL
 C6880-X
 C6840-X
 Packet Walks
 6700/6800 & 6900
 C6800 1G Series
 C6800 10G Series
 C6880-X Series
 C6840-X Series
C6800 1G - Packet Walks
Remote Forwarding (Ingress) Step 9: Fabric ASIC uses
Fabric Header to determine
Supervisor Switch Fabric Egress Fabric Port and then it
sends to Switch Fabric
20G 20G
EOBC
Step 8: Ingress FIRE ASIC uses
lookup result to determine
Step 4: FIRE ASIC stores data the Fabric Port mapped to Egress
payload in local buffer, and then it FABRIC BACKPLANE INTF FABRIC
Port, and converts Internal Header
sends only the Internal Header to INTF INTF
to Fabric Header.
Forwarding Engine for Lookup Then it sends to Fabric ASIC
20G 20G
FPGA FPGA

Step 3: Port ASIC parses packet FIRE FIRE Step 5: Inband FPGA parses
to derive VLAN, CoS, etc. and ASIC ASIC Internal Header, and then it sends
perform Ingress QoS. to Forwarding Engine
10G 10G 10G 10G
Then it applies Internal Header DFC4
and sends to FIRE ASIC Step 6-7: Forwarding Engine
PORT PORT PORT PORT performs L2, L3, ACL and
ASIC ASIC ASIC ASIC Netflow IFE & OFE processing
Step 2: PHY converts the signal to determine the Egress Port &
& serializes the bits, and then it Rewrite Info.
sends to Port ASIC Then it returns result to FIRE ASIC
(via Inband FPGA)
PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY
Step 1: Packet Arrives
@ Ingress Port 13 01-04 05-08 09-12 13-16 17-20 21-24 25-28 29-32 33-36 37-40 41-44 45-48

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 164
C6800 1G Packet Walks
Remote Forwarding (Egress)
Step 10: Switch Fabric transmits
frame to Egress Fabric ASIC, which Supervisor Switch Fabric
sends to Egress FIRE ASIC
20G 20G
EOBC
Step 11: FIRE ASIC uses Fabric
Header to derive new Internal header,
which it sends to Forwarding Engine FABRIC BACKPLANE INTF FABRIC
(Egress Lookup) Step 14: FIRE ASIC uses
INTF INTF
Internal Header to determine Egress
20G
FPGA FPGA
20G Port and reassemble the packet.
Then it sends to Port ASIC
Step 12: Inband FPGA parses FIRE FIRE
Internal Header, and then it sends ASIC ASIC Step 15: Port ASIC removes
to Forwarding Engine Internal Header and rewrites VLAN,
10G 10G 10G 10G CoS, etc. and perform Egress QoS.
DFC4 Then it sends to PHY
Step 13: Forwarding Engine PORT PORT PORT PORT
performs an Egress (L2) Lookup ASIC ASIC ASIC ASIC
to learn SRC MAC address. Step 16: PHY serializes the bits
Then it returns Internal Header to & converts signal, and then
FIRE ASIC (via Inband FPGA) transmits the packet

PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY Step 17: Packet Leaves
@ Egress Port 36
01-04 05-08 09-12 13-16 17-20 21-24 25-28 29-32 33-36 37-40 41-44 45-48
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 165
C6800 10G - Packet Walks
Remote Forwarding (Ingress) Step 9: Fabric ASIC uses
Fabric ASIC of Active Sup Fabric ASIC of Standby Sup Fabric Header to determine
Egress Fabric Port and then it
40G 40G 40G 40G 40G 40G 40G 40G sends to Switch Fabric

Local Fabric ASIC Step 8: Ingress FIRE ASIC uses

lookup result to determine
Step 4: FIRE ASIC stores data 2x20G 2x20G the Fabric Port mapped to Egress
payload in local buffer, and then it Port, and converts Internal Header
sends only the Internal Header to Inband Inband to Fabric Header.
Forwarding Engine for Lookup DFC4 Then it sends to Fabric ASIC
Inband Inband

Step 3: Port ASIC Decrypts DFC4 Step 5: Inband FPGA parses

CTS, then it parses packet to Internal Header, and then it sends
derive VLAN, CoS, etc. and FIRE FIRE to Forwarding Engine
perform Ingress QoS. ASIC ASIC
FIRE FIRE
Then it applies Internal Header Step 6-7: Forwarding Engine
and sends to FIRE ASIC ASIC ASIC
performs L2, L3, ACL and
40G 40G
Netflow IFE & OFE processing
Step 2: PHY converts the signal 40G 40G
to determine the Egress Port &
& serializes the bits, and then it Port ASIC Port ASIC Port ASIC Port ASIC Rewrite Info.
sends to Port ASIC Then it returns result to FIRE ASIC
(via Inband FPGA)
Step 1: Packet Arrives PHY PHY PHY PHY PHY PHY PHY PHY

@ Ingress Port 17 SFP SFP SFP SFP Front SFP SFP SFP SFP
01,03,05,07 09,11,13,15 17,19,21,23 25,27,29,31 02,04,06,08 10,12,14,16 18,20,22,24 26,28,30,32
Panel

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 166
C6800 10G Packet Walks
Remote Forwarding (Egress)
Step 10: Switch Fabric transmits
frame to Egress Fabric ASIC, which Fabric ASIC of Active Sup Fabric ASIC of Standby Sup
sends to Egress FIRE ASIC 40G 40G 40G 40G 40G 40G 40G 40G

Local Fabric ASIC

Step 11: FIRE ASIC uses Fabric
Header to derive new Internal header, 2x20G 2x20G
which it sends to Forwarding Engine
(Egress Lookup) Inband Inband
Step 14: FIRE ASIC uses
DFC4 Internal Header to determine
Inband Inband Egress Port, reassemble the packet
and perform Egress QoS.
Step 12: Inband FPGA parses DFC4 Then it sends to Port ASIC
Internal Header, and then it sends
to Forwarding Engine FIRE FIRE
Step 15: Port ASIC removes Internal
ASIC FIRE FIRE ASIC Header, rewrites VLAN, CoS, etc. and
Step 13: Forwarding Engine ASIC ASIC adds Encryption. Then it sends to PHY
performs an Egress (L2) Lookup 40G 40G
to learn SRC MAC address. 40G 40G Step 16: PHY serializes the bits
Then it returns Internal Header to & converts signal, and then
FIRE ASIC (via Inband FPGA) Port ASIC Port ASIC Port ASIC Port ASIC transmits the packet

Step 17: Packet Leaves

PHY PHY PHY PHY PHY PHY PHY PHY
@ Egress Port 24
SFP SFP SFP SFP Front SFP SFP SFP SFP
01,03,05,07 09,11,13,15 17,19,21,23 25,27,29,31 02,04,06,08 10,12,14,16 18,20,22,24 26,28,30,32
Panel
BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 167
Catalyst 6880-X
Packet Walks
Agenda
 Background
 C6807-XL
 C6880-X
 C6840-X
 Packet Walks
 C6800-10G Series
 C6880-X Series
 C6840-X Series
C6880-X & C6840-X Packet Walk
Remote Forwarding (Ingress)
Step 5: FIRE ASIC stores data Step 9: Fabric ASIC uses
payload in local buffer, and then it Fabric Header to determine
sends only the Internal Header to Egress Fabric Port and then it
Forwarding Engine for Lookup sends to Switch Fabric

Step 8: Ingress FIRE ASIC uses

Step 4: MUX ASIC stores new Internal Header to determine
packet in local buffer, and the Fabric Port mapped to
may perform special packet Egress Port, and converts Internal
encap. Then it sends to Header to Fabric Header.
(1 of 2) FIRE ASIC Then it sends to Fabric ASIC

Step 3: Port ASIC removes Step 6: Inband FPGA parses

Decryption, then it parses packet Internal Header, and then it sends
to derive VLAN, CoS, etc. and to Forwarding Engine
perform Ingress QoS.
Then it applies Internal Header Step 7: Forwarding Engine
and sends to MUX ASIC performs L2, L3, ACL and Netflow
IFE & OFE processing and
Step 2: PHY converts the signal determines the Egress Port &
& serializes the bits, and then it Rewrite Info. Then it returns new
sends to Port ASIC Internal Header to FIRE ASIC
(via Inband FPGA)
Step 1: Packet Arrives
@ Ingress Port 1

© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
C6880-X & C6840-X Packet Walk
Remote Forwarding (Egress)
Step 11: FIRE ASIC uses Fabric
Step 10: Fabric ASIC transmits frame Header to derive new Internal header,
to Egress Fabric Port, which is which it sends to Forwarding Engine
received by Egress FIRE ASIC (egress lookup)

Step 14: FIRE ASIC uses new Internal

Step 12: Inband FPGA parses Header to determine Egress Port and
Internal Header, and then it sends reassemble the packet, and then it
to Forwarding Engine sends to MUX ASIC

Step 15: MUX ASIC uses Internal

Step 13: Forwarding Engine
Header to determine Egress Port
performs an egress (L2) lookup to
and perform Egress QoS.
learn MAC address.
Then it sends to Port ASIC
Then it returns Internal Header to FIRE
ASIC (via Inband FPGA)
Step 16: Port ASIC removes Internal
Header, rewrites VLAN, CoS, etc. and
adds Encryption. Then it sends to PHY

Step 17: PHY serializes the bits

& converts signal, and then
transmits the packet

Step 18: Packet Leaves

@ Egress Port 16

© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
Catalyst 6840-X
Packet Walks
Agenda
 Background
 C6807-XL
 C6880-X
 C6840-X
 Packet Walks
 C6800-10G Series
 C6880-X Series
 C6840-X Series
C6840-X - Packet Walks
Same as C6800 10G Series
C6832-X-LE C6800-32P10G
Fabric ASIC of Active
Fabric ASIC of Standby Sup
Sup
40G 40G 40G 40G 40G 40G 40G 40G

Local Fabric ASIC Local Fabric ASIC

2x20G 2x20G 2x20G 2x20G

Inband DFC Inband Inband DFC Inband

4 4
Inband Inband Inband Inband
DFC DFC
4 4
FIRE FIRE FIRE FIRE
ASIC FIRE FIRE ASIC ASIC FIRE FIRE ASIC
ASIC ASIC ASIC ASIC
40G 40G 40G 40G 40G 40G 40G 40G
Port ASIC Port ASIC Port ASIC Port ASIC Port ASIC Port ASIC Port ASIC Port ASIC

PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY PHY
SFP SFP SFP SFP Front SFP SFP SFP SFP SFP SFP SFP SFP Front SFP SFP SFP SFP
01-04 05-08 09-12 13-16 Panel 17-20 21-24 25-28 29-32 01,03,05,07 09,11,13,15 17,19,21,23 25,27,29,31 Panel 02,04,06,08 10,12,14,16 18,20,22,24 26,28,30,32

SD-Access Platform Support

Control/Border Node

BRKARC-3465 © 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public 175
Summary
Innovation & Investment Protection
The Catalyst 6800 Series are based on the “Gold Standard”
Catalyst 6500 Series, leveraging the same ASICs and IOS
Software, while providing a foundation for the next-generation.

Hardware Multi-Layer Switching

L2 and L3 forwarding, network policies and statistics collection are
performed by the ASIC hardware, so there is minimal difference in
scale and performance.

Combined Features & Performance

Providing advanced features, in hardware, such as L2, IPv4, IPv6,
MPLS, NetFlow, QoS and Security, etc. without impacting overall
scale or performance.

How
1. Find this session in the Cisco Live Mobile App
2. Click “Join the Discussion”
3. Install Spark or go directly to the space
4. Enter messages/questions in the space

cs.co/ciscolivebot#BRKARC-3465

© 2018 Cisco and/or its affiliates. All rights reserved. Cisco Public
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Brkarc 3465

Uploaded by

Brkarc 3465

Uploaded by

BRKARC-3465

Catalyst 6800 Series

Catalyst 6800 Series

Catalyst 6500 Catalyst 6500-E Catalyst 6807XL Catalyst 6840X

ME-6524 C6503-E C6504-E C6506-E C6509-E C6513-E

Software Control-Plane Hardware Control-Plane

The System CPU and DRAM, Intelligent Switching ASICs

Hardware Data-Plane Forwarding ASICs

Modular Chassis Overview

Fan Tray Slot 1: Line Card

• Supports Fan-Tray “OIR” for minimum of 120 seconds

N+1 Redundant Mode Combined Mode

90% 0% 90% 90%

100% 90% 90% 90%

PSU1 PSU2 PSU1 PSU2

• Adds +1 to Total # of Redundant PSU • Same operational behavior as 6500-E

2Tbps QUICK FACTS

2 x 10G (X2) and 3 x  Connectivity Management Processor

Connectivity Control Plane Port ASIC 0 Port ASIC 1

Compact Serial MGMT USB SFP 1 SFP 2 SFP 3

2 x 10G (X2) & 2 x 40G (QSFP) &

VSS, VSS, IA, MACSEC,

Feature Parity with Sup2T from Day 1: 4000+ Features

6Tbps Fabric ASIC

Keystore Port / CTS Port / CTS

MSFC Complex Runs Layer 2 & System functions:

Inband Intf 1Gbps Full-Duplex “Inband” CPU interface

Communicates with HW via EOBC interface

Feature MSFC3 (Sup720-10G) MSFC5 (Sup2T) MSFC6 (Sup6T)

The “Hardware” Control Plane, based on information learned by MSFC…

 Increased Hardware Performance

 PFC4-E merges L2 & L3+ ASICs

Collection of ACL “hit” Contains per-LIF

Policy Feature Card 4

Headers 1: Ingress 2: Ingress 3: DST L3 4: Ingress

PFC3 vs. PFC4

MAC Table 64K (32K) 96K (80K) 128K

PFC3 vs. PFC4

Shared Microflow Policers 63 63 512

Egress Microflow Policing No No Yes

Distributed Policers No No Yes

Packet or Byte Based Policing No No Yes

A dedicated set of Crossbar Channels that interconnect all Slots…

• Integrated 2Tbps Switch Fabric

• Provides Backplane Interconnects

• New Clock Frequencies (7.5Ghz = 55G)

• NO changes to the MSFC5 or PFC4

• Integrated 6Tbps Switch Fabric

• Provides Backplane Interconnects

This allows multiple LC’s to transmit and receive data simultaneously

0 Per Channel bandwidth is defined by 2 factors:

Line Card Active

Feature Sup720 Sup2T Sup6T

Aggregate Bandwidth 720 Gbps 2 Tbps 6 Tbps

Redundant Channels No Yes Yes

1 1 Each “Channel” can

6700 & 6800 Series 6900 Series

C6800 10G Series

CFC = Centralized Forwarding Card

CFC connects to DBUS/RBUS, so the PFC can perform Forwarding Lookup

The CFC comes on

Actual DATA Switching

WS-X6704-10G, WS-X6748-SFP/GETX FIRE = Fabric Interface & Replication Engine

Supervisor Switch Fabric The 6700 modules

They connect to the

NOTE: The DBUS is

DFC enables Local (Distributed) Forwarding Lookup on each Module

The DFC4 supports local Two models of the DFC4

The DFC4 includes same IFE / OFE • DFC4-A (XL) for 1G

WS-X6748-SFP/TX or WS-X6848-SFP/TX FIRE = Fabric Interface & Replication Engine

Supervisor Switch Fabric The 6700 Series

The 6800 Series has

6700 Series Line Cards

• 4 ports 10G Xenpak • 16MB Packet Buffers per port

WS-X6748-GETX & 6848-TX Information

6700 and 6800 Series Line Cards