6 5 4 3 2 1

REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

SDM636 GPIO Configuration For Starlord SSC_12 SENS_RXD

GPIO_0 GPIO_42 ID0 GPIO_84

DBM_UART0_RXD UIM2_CLK SSC_13 SENS_TXD

GPIO_1 GPIO_43 ID1 GPIO_85 NC

DBM_UART0_TXD UIM2_RESET SSC_14

GPIO_2 GPIO_44 ID2 GPIO_86 SSC_15 NC

I2C_TP_SDA UIM2_PRESENT
GPIO_45 SSC_16 NC
GPIO_3 REAR_CAM_AVDD1V8_EN_2 GPIO_87 UIM1_DATA
I2C_TP_SCL
SSC_17 NC
GPIO_4 GPIO_46 REAR_CAM_DVDD_EN_2 GPIO_88
TEST_TX UIM1_CLK
SSC_18 WCD_SDM_MCLK
GPIO_5 GPIO_47 GPIO_89
TEST_RX CAM1_RST_N UIM1_RESET
SSC_19 LPI_AUD_SB_CLK
GPIO_6 GPIO_48 GPIO_90
BLSP2_I2C_SDA CAM2_RST_N UIM1_PRESENT SSC_20 LPI_AUD_SB_DATA0

GPIO_7 GPIO_49 GPIO_91

BLSP2_I2C_SCL LDM_IDO UIM_BATT_ALARM SSC_21 LPI_AUD_SB_DATA1
C GPIO_50 DRX_TUNER_SW0
C
GPIO_8 CAM_AF_VDD_EN GPIO_92 SSC_22 LPI_AUD_CDC_INT1
BLSP_SPI3_MOSI
GPIO_51 SSC_23 LPI_AUD_CDC_INT2
GPIO_9 CAM_AVDD_EN GPIO_93 DRX_TUNER_SW1
BLSP_SPI3_MISO
SSC_24 LPI_AUD_CDC_RSTN
GPIO_10 GPIO_52 CAM3_RST_N GPIO_94 DRX_TUNER_SW2
BLSP_SPI3_CS_N
NC
SSC_25
GPIO_11 GPIO_53 GPIO_95 DRX_TUNER_SW3
BLSP_SPI3_CLK LCD_RESET SSC_26 NC
GPIO_12 GPIO_54 GPIO_96 DRX_TUNER_SW4 NC
AUDIO_MI2S_SCK NC SSC_27

GPIO_13 AUDIO_MI2S_WS GPIO_55 LDM_ID1 GPIO_97 DRX_TUNER_SW5 SSC_29 NC

LPI_QCA_SB_CLK
GPIO_56 SSC_30
GPIO_14 AUDIO_MI2S_D0 GPIO_98 PRX_TUNER_SW4
NC
SSC_31 LPI_QCA_SB_DATA0
GPIO_15 GPIO_57 GPIO_99 QLINK_REQUEST
AUDIO_MI2S_D1 FORCED_USB_BOOT

GPIO_16 GPIO_58 GPIO_100 QLINK_ENABLE

RXD USB_PHY_PS
GPIO_59
GPIO_17 TXD LCD_TE
GPIO_101 RFFE1_DATA - WTR6955 debug GROOT GPIO Configuration For Starlord
GPIO_18 GPIO_60 GPIO_102 RFFE1_CLK - WTR6955 debug
RTS NC
GPIO_1 OPTION1 GPIO_8 SLB
GPIO_19 GPIO_61 GPIO_103 RFFE2_DATA
CTS AUDIO_MI2S_MCLK
GPIO_2 DIV_CLK2 GPIO_9 uUSB_TYPEC
GPIO_20 GPIO_62 GPIO_104 RFFE2_CLK
FP_SUB_RESET DBMD_DVDD_EN GPIO_10 WCSS_VCTRL
GPIO_3 DIV_CLK1
GPIO_63 PRX_TUNER_SW1
GPIO_21 SMB_STAT DBM_RSTN GPIO_105
GPIO_4 NFC_CLK_REQ GPIO_11 HOMEKEY_FP_PM_INT
GPIO_64 PRX_TUNER_SW2
GPIO_22 BLSP_I2C_SDA_6 NC GPIO_106
GPIO_5 WLAN_SW_CTRL GPIO_12 WIPWR_MODE
GPIO_23 GPIO_65 DBM_INT GPIO_107 RFFE4_DATA
BLSP_I2C_SCL_6
GPIO_6 SLP_CLK GPIO_13 PM_A_GPIO_13
GPIO_24 GPIO_66 TP_RESET_N GPIO_108 RFFE4_CLK
IR_LED_EN
GPIO_7 UIM_BATT_ALARM
GPIO_25 GPIO_67 GPIO_109 RFFE5_DATA
NC TP_INT_N
B GPIO_26 GPIO_68
ACC_GYRO_INT1 GPIO_110 RFFE5_CLK B
NC

GPIO_27 GPIO_69 GPIO_111 PRX_TUNER_SW3

NC ACC_GYRO_INT2 DRAX GPIO Configuration For Starlord

09
GPIO_28 GPIO_70 GPIO_112 NC
BLSP_SPI8_MOSI HALL_EINT2
GPIO_1 OPTION2 GPIO_8 SD_CARD_DET_N
GPIO_29 GPIO_71 GPIO_113 NC
BLSP_SPI8_MISO ALSP_INT_N
GPIO_2 LPI_PWR_EN GPIO_9 WCSS_VCTRL
GPIO_30 GPIO_72 SSC_0
BLSP_SPI8_CS_N FP_INT_N_1 NC
GPIO_3 FRONT_CAM_DVDD_EN GPIO_10 SLB
GPIO_31 GPIO_73 SSC_1
BLSP_SPI8_CLK AUDIO_INT LPI_PWR_EN
GPIO_4 REAR_CAM_DVDD_EN GPIO_11 LP4x_CTRL
GPIO_32 GPIO_74 SSC_2
CAM_MCLK0 ANT_CHECK LPI_I2C_3_SDA NC
GPIO_5 GPIO_12 LP4x_MODE
GPIO_33 GPIO_75 HSJ_US_EURO_SEL
CAM_MCLK1 SSC_3 LPI_I2C_3_SCL
GPIO_6 FP_VDD_EN
B GPIO_34 NC GPIO_76 HALL_EINT1 SSC_4 NC
GPIO_7 KEY_VOL_UP_N
GPIO_35 CAM_MCLK2 GPIO_77
AUDIO_PA_RST SSC_5 NC

GPIO_36 GPIO_78
CCI_I2C_SDA0 WMSS_RESETN SSC_6 NC

GPIO_37 GPIO_79 SDM_HAPT_PWM SSC_7 NC

CCI_I2C_SCL0

GPIO_38 GPIO_80 AUDIO_SEL NC

CCI_I2C_SDA1 SSC_8

GPIO_39 GPIO_81
CCI_I2C_SCL1 COEX_RXD SSC_9 NC

GPIO_40 GPIO_82
GPIO40_ID3 COEX_TXD SSC_10 NC

GPIO_41 GPIO_83 SSC_11

FL_STROBE_TRIG UIM2_DATA NC

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 1OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U201-A

[17,33,51,52]
U201-L

D [17,33,51,52] U201-I
[17,33,51,52]
D
CONTROL [17,33,51,52] [17,33,51,52]
[5] LNBBCLK1 AT30 CXO SDC1_RCLK B20 SDC1_RCLK [10]
0R CONTROL R209
[5] LNBBCLK1_EN AU31 CXO_EN SDC1_CLK A23 R208
0201 SDC1_CLK [10] D34 D2
[17,33,51,52] [10] EBI1_CA0_CS_0 EBI1_CS_0 EBI_CAL 0201 DDR_VDDQ [10]
SDC1_CMD A19 SDC1_CMD [10]
CONTROL [10] EBI1_CA0_CS_1 D32 EBI1_CS_1 240R/1%
[5,20] SLEEP_CLK AV30 SLEEP_CLK SDC1_DATA_0 C25 SDC1_DATA_0 [10] D8 C204
[10] EBI0_CA0_CS_0 EBI0_CS_0
SDC1_DATA_1 C19 SDC1_DATA_1 [10] D10
[10] EBI0_CA0_CS_1 EBI0_CS_1 E29 E39 1.0uF
[10] EBI1_CA0_CK_C EBI1_CK_C DDR_RESET_N DDR_RESET_N [10]
0R R202 AT32 C23
[5] PON_RESET_N 0201 RESIN_N SDC1_DATA_2 SDC1_DATA_2 [10] F28
[10] EBI1_CA0_CK_T EBI1_CK_T
[10] RESOUT_N B22 RESOUT_N SDC1_DATA_3 D26 SDC1_DATA_3 [10] E13
C203 [10] EBI0_CA0_CK_C EBI0_CK_C
SDC1_DATA_4 D20 SDC1_DATA_4 [10] F14
[10] EBI0_CA0_CK_T EBI0_CK_T [10] EBI1_CA0_CKE_0 C37 EBI1_CKE_0
22nF R210 NC_10K AU37 D22 [10]
VREG_L13A_1P8 0201 MODE_0 SDC1_DATA_5 SDC1_DATA_5
C31
[10] EBI1_CA0_CKE_1 EBI1_CKE_1
R211 NC_10K AV38 C17
0201 MODE_1 SDC1_DATA_6 SDC1_DATA_6 [10] [10] EBI0_CA0_CKE_0 C5 EBI0_CKE_0 C41
EBI1_DQ_0 EBI1_DQ_0 [10]
SDC1_DATA_7 D16 SDC1_DATA_7 [10] C11
[10] EBI0_CA0_CKE_1 EBI0_CKE_1 A35 B40
[10] EBI1_DMI_0 EBI1_DM_0 EBI1_DQ_1 EBI1_DQ_1 [10]
[5] SDM_PS_HOLD AU29 PS_HOLD C1 [10]
EBI0_DQ_0 EBI0_DQ_0 A29 B38 EBI1_DQ_2
[10] EBI1_DMI_1 EBI1_DM_1 EBI1_DQ_2 [10]
[10] EBI0_DMI_0 A7 EBI0_DM_0 EBI0_DQ_1 B2 EBI0_DQ_1 [10] B36
EBI1_DQ_3 EBI1_DQ_3 [10]
TP6 TP4 TP3 TP2 TP5 TP1

K38 H38
NC NC NC NC NC NC

SRST_N SDC2_CLK A13 EBI0_DM_1 EBI0_DQ_2 B4 EBI0_DQ_2 [10] E35 A39

[10] EBI0_DMI_1 [10] EBI1_DQS_C_0 EBI1_DQS_0_C EBI1_DQ_4 EBI1_DQ_4 [10]
G41 TCK SDC2_CMD J37 B6
EBI0_DQ_3 EBI0_DQ_3 [10] D36 A37
[10] EBI1_DQS_T_0 EBI1_DQS_0_T EBI1_DQ_5 EBI1_DQ_5 [10]
F40 TDI SDC2_DATA_0 H36 E7 A3
[10] EBI0_DQS_C_0 EBI0_DQS_0_C EBI0_DQ_4 EBI0_DQ_4 [10] B34 EBI1_DQ_6
EBI1_DQ_6 [10]
G39 TDO SDC2_DATA_1 G37 D6 A5
[10] EBI0_DQS_T_0 EBI0_DQS_0_T EBI0_DQ_5 EBI0_DQ_5 [10] D28 A33
[10] EBI1_DQS_C_1 EBI1_DQS_1_C EBI1_DQ_7 EBI1_DQ_7 [10]
H40 TMS SDC2_DATA_2 L35 B8 EBI0_DQ_6 [10]
EBI0_DQ_6 E27 EBI1_DQS_1_T EBI1_DQ_8 B26 EBI1_DQ_8 [10]
[10] EBI1_DQS_T_1
J39 TRST_N SDC2_DATA_3 K36 D14 A9 [10]
[10] EBI0_DQS_C_1 EBI0_DQS_1_C EBI0_DQ_7 EBI0_DQ_7 B24
EBI1_DQ_9 EBI1_DQ_9 [10]
E15 EBI0_DQS_1_T EBI0_DQ_8 B16 EBI0_DQ_8 [10] D30 A25
[10] EBI0_DQS_T_1 [10] EBI1_CA0_CA_0 EBI1_CA_0 EBI1_DQ_10 EBI1_DQ_10 [10]
USB1_HS_DM BA39 USB_HS_DM [13] B18
EBI0_DQ_9 EBI0_DQ_9 [10] [10] EBI1_CA0_CA_1 E31 EBI1_CA_1 EBI1_DQ_11 A27 EBI1_DQ_11 [10]
E17 UFS_RESET USB1_HS_DP AY38 USB_HS_DP [13] D12 A17
[10] EBI0_CA0_CA_0 EBI0_CA_0 EBI0_DQ_10 EBI0_DQ_10 [10] [10] EBI1_CA0_CA_2 E37 EBI1_CA_2 EBI1_DQ_12 B28 EBI1_DQ_12 [10]
F22 UFS_REF_CLK E11 A15
[10] EBI0_CA0_CA_1 EBI0_CA_1 EBI0_DQ_11 EBI0_DQ_11 [10] F34 A31 EBI1_DQ_13 [10]
[10] EBI1_CA0_CA_3 EBI1_CA_3 EBI1_DQ_13
A21 UFS_REXT E5 B14
[10] EBI0_CA0_CA_2 EBI0_CA_2 EBI0_DQ_12 EBI0_DQ_12 [10] E33 B30 EBI1_DQ_14 [10]
[10] EBI1_CA0_CA_4 EBI1_CA_4 EBI1_DQ_14
USB2_HS_DM AT38 F8 A11
[10] EBI0_CA0_CA_3 EBI0_CA_3 EBI0_DQ_13 EBI0_DQ_13 [10] D38 B32
[10] EBI1_CA0_CA_5 EBI1_CA_5 EBI1_DQ_15 EBI1_DQ_15 [10]
E25 UFS_RX0_M USB2_HS_DP AR39 E9 B12
[10] EBI0_CA0_CA_4 EBI0_CA_4 EBI0_DQ_14 EBI0_DQ_14 [10]
E23 UFS_RX0_P D4 B10
[10] EBI0_CA0_CA_5 EBI0_CA_5 EBI0_DQ_15 EBI0_DQ_15 [10]
E19 UFS_TX0_M USB0_SS_RX_M AY36

F20 UFS_TX0_P USB0_SS_RX_P AW35

USB0_SS_TX_M AW37

USB0_SS_TX_P AV36

USB1_SS_RX_M AV40

USB1_SS_RX_P AW41

USB1_SS_TX_M AW39

USB1_SS_TX_P AY40

C205
USB1_SS_REXT AY34 0201

C DNC_6 AT40 100R_NC1%

C
R201
USB1_HS_REXT BA35 0201
4.02k 1%
BA19 DNC_1
R206
AY20 DNC_2 USB2_HS_REXT AR41 0201 Reserved for SDM660 Compatiable
NC
BA15 DNC_3
V38 DNC_4 SPMI_CLK AR27 SPMI_CLK [5,8]
U39 DNC_5 SPMI_DATA AT28 SPMI_DATA [5,8]

U201-J
[17,33,51,52] U201-K

[17,33,51,52]

[17,33,51,52]

CONTROL [17,33,51,52]
AE1 GND_1 GND_51 U1
CONTROL
BA33 GND_2 GND_52 U41 AF34 GND_101 GND_152 AR31
AM14 GND_3 GND_53 U7 M20 GND_102 GND_153 AY14
F10 GND_4 GND_54 V12 M22 GND_103 GND_154 AR33
F12 GND_5 GND_55 V14 M24 GND_104 GND_155 AR35
F16 GND_6 GND_56 V18 M26 GND_105 GND_156 AR9
F18 GND_7 GND_57 C13 M30 GND_106 GND_157 AT16
Y28 GND_8 GND_58 V20 M32 GND_107 GND_158 AT36
Y34 GND_9 GND_59 V22 M28 GND_108 GND_159 AU1
M6 GND_10 GND_60 V24 AE29 GND_109 GND_160 AU35
M8 GND_11 GND_61 V26 AF20 GND_110 GND_161 AU39
U9 GND_12 GND_62 V28 A1 GND_111 GND_162 AU41
BA37 GND_13 GND_63 V30 A41 GND_112 GND_163 AM8
L5 GND_14 GND_64 V32 AA1 GND_113 GND_164 AY16
H8 GND_15 GND_65 V8 AA35 GND_114 GND_165 AN1
F36 GND_16 GND_66 W9 AA41 GND_115 GND_166 AN11
F38 GND_17 GND_67 Y14 AB24 GND_116 GND_167 AN19
F4 GND_18 GND_68 C15 AB26 GND_117 GND_168 BA13
F6 GND_19 GND_69 Y20 AB28 GND_118 GND_169 BA17
C21 GND_20 GND_70 Y22 AB34 GND_119 GND_170 BA21
C27 GND_21 GND_71 Y24 AE35 GND_120 GND_171 BA25
C29 GND_22 GND_72 Y26 AB8 GND_121 GND_172 AG33
C3 GND_23 GND_73 P14 AC31 GND_122 GND_173 AH14
BA41 GND_24 GND_74 P16 AD10 GND_123 GND_174 AH16
C33 GND_25 GND_75 R17 AD12 GND_124 GND_175 BA1
C35 GND_26 GND_76 R9 AD14 GND_125 GND_176 AH18

B C39 GND_27 GND_77 AJ23 AD28 GND_126 GND_177 AH20 B

C7 GND_28 GND_78 AG27 AD34 GND_127 GND_178 AH24
C9 GND_29 GND_79 AF24 AM18 GND_128 GND_179 AH28
D18 GND_30 GND_80 AA13 AM24 GND_129 GND_180 AH34
D24 GND_31 GND_81 N25 AM28 GND_130 GND_181 AH8
D40 GND_32 GND_82 G35 AE41 GND_131 GND_182 AJ1
E1 GND_33 GND_83 G5 AM34 GND_132 GND_183 AJ19
E21 GND_34 GND_84 G7 AE7 GND_133 GND_184 AJ35
BA5 GND_35 GND_85 H30 AF14 GND_134 GND_185 AJ41
E3 GND_36 GND_86 H4 AF16 GND_135 GND_186 BA29
E41 GND_37 GND_87 J1 AF18 GND_136 GND_187 AJ7
M34 GND_38 GND_88 J3 AN23 GND_137 GND_188 AK14
N15 GND_39 GND_89 J41 AN35 GND_138 GND_189 AK18
N41 GND_40 GND_90 AF28 AN41 GND_139 GND_190 AK24
P12 GND_41 GND_91 K30 AN7 GND_140 GND_191 AK28
F24 GND_42 GND_92 K4 AP10 GND_141 GND_192 AK34
F26 GND_43 GND_93 L15 AW15 GND_142 GND_193 AK8
F30 GND_44 GND_94 L19 AP12 GND_143 GND_194 AL29
F32 GND_45 GND_95 L3 AP14 GND_144 GND_195 AL33
BA9 GND_46 GND_96 M10 AP16 GND_145 GND_196 AL9
T12 GND_47 GND_97 M12 AP18 GND_146
T18 GND_48 GND_98 M14 AP24 GND_147
T34 GND_49 GND_99 M16 AP28 GND_148
T4 GND_50 GND_100 M2 AP34 GND_149
AP40 GND_150
AR29 GND_151

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 2OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U201-D

[17,33,51,52]

U201-H

[17,33,51,52] [17,33,51,52]

CONTROL
MIPI_CSI0_CLK_P [12]
D MIPI_CSI0_CLK_N [12]
AT2

AR3
MIPI_CSI0_DCLK_P [17,33,51,52] D
MIPI_CSI0_DCLK_M CONTROL
MIPI_CSI0_DATA0_P [12] AR1 V6 T2
MIPI_CSI0_DLN0_P [20] COEX_CLK WCSS_CXM_RFA_CMD_CLK RF_XO_CLK WLAN_5G_CLK_OUT [20]
MIPI_CSI0_DATA0_N [12] AP2 AJ37 U5
MIPI_CSI0_DLN0_M MIPI_DSI0_CLK_N MIPI_DSI0_CLK_N [12] [20] COEX_DATA WCSS_CXM_RFA_CMD_DATA
[12] R321
MIPI_CSI0_DATA1_P AN3 AH38 AY32
MIPI_CSI0_DLN1_P MIPI_DSI0_CLK_P MIPI_DSI0_CLK_P [12] QREFS_CXO_REXT 0201
MIPI_CSI0_DATA1_N [12] 3.01K
AM4 MIPI_CSI0_DLN1_M MIPI_DSI0_LN0_N AH36 MIPI_DSI0_LANE0_N [12] [20] WL_CMD_CLK_CH0 Y4 WCSS1_BBD_RFA_CMD_CLK
MIPI_CSI0_DATA2_P [12] AM2 AG37 Y6
MIPI_CSI0_DLN2_P MIPI_DSI0_LN0_P MIPI_DSI0_LANE0_P [12] [20] WL_CMD_DATA_CH0 WCSS1_BBD_RFA_CMD_DATA
MIPI_CSI0_DATA2_N [12] AL3 AF38
MIPI_CSI0_DLN2_M MIPI_DSI0_LN1_N MIPI_DSI0_LANE1_N [12]
MIPI_CSI0_DATA3_P [12] AL1 AE39 W7
MIPI_CSI0_DLN3_P MIPI_DSI0_LN1_P MIPI_DSI0_LANE1_P [12] WCSS2_BBD_RFA_CMD_CLK
MIPI_CSI0_DATA3_N [12]
AK2 MIPI_CSI0_DLN3_M MIPI_DSI0_LN2_N AE37 MIPI_DSI0_LANE2_N [12] W5 WCSS2_BBD_RFA_CMD_DATA
MIPI_CSI1_CLK_P [12] AT4 MIPI_CSI1_DCLK_P MIPI_DSI0_LN2_P AD38 MIPI_DSI0_LANE2_P [12]

MIPI_CSI1_CLK_N [12] AU3 AD36 MIPI_DSI0_LANE3_N [12]

MIPI_CSI1_DCLK_M MIPI_DSI0_LN3_N
MIPI_CSI1_DATA0_P [12] AU5 MIPI_CSI1_DLN0_P MIPI_DSI0_LN3_P AC37 MIPI_DSI0_LANE3_P [12] [5,8] WCSS_VCTRL M4 WLAN_PWR_EN
MIPI_CSI1_DATA0_N [12] AV4 MIPI_CSI1_DLN0_M
1.4K/1% 6.04K/1%
MIPI_CSI1_DATA1_P [12] AV2 AK40 L1 AW17 [15]
MIPI_CSI1_DLN1_P MIPI_DSI0_REXT 0201 0201 WLAN1_DAC_REXT QLINK_CLK_M QLINK_CLK_M
[12] R318 R319
MIPI_CSI1_DATA1_N AW1 MIPI_CSI1_DLN1_M MIPI_DSI1_CLK_N AH40 [20] WL_BB_IN_TX J7 WLAN1_ADC_IM QLINK_CLK_P AV16 QLINK_CLK_P [15]
MIPI_CSI1_DATA2_P [12] AW3 MIPI_CSI1_DLN2_P MIPI_DSI1_CLK_P AG41 H6 WLAN1_ADC_IP
[20] WL_BB_IP_TX
MIPI_CSI1_DATA2_N [12] AY2 MIPI_CSI1_DLN2_M MIPI_DSI1_LN0_N AG39 K6 WLAN1_ADC_QM QLINK_DL0_M AU15 QLINK_RX0_M [15]
[20] WL_BB_QN_TX
MIPI_CSI1_DATA3_P [12] AY4 AF40 [20] WL_BB_QP_TX J5 AT14 QLINK_RX0_P [15]
MIPI_CSI1_DLN3_P MIPI_DSI1_LN0_P WLAN1_ADC_QP QLINK_DL0_P
MIPI_CSI1_DATA3_N [12] BA3 MIPI_CSI1_DLN3_M MIPI_DSI1_LN1_N AD40 QLINK_DL1_M AV14 QLINK_RX1_M [15]
[12] 6.04K/1%
MIPI_CSI2_CLK_P AR5 MIPI_CSI2_DCLK_P MIPI_DSI1_LN1_P AC41 Reserved for SDM660 Compatiable 0201 K2 WLAN2_DAC_REXT QLINK_DL1_P AU13 QLINK_RX1_P [15]
MIPI_CSI2_CLK_N [12] R320
AP6 MIPI_CSI2_DCLK_M MIPI_DSI1_LN2_N AC39 [20] WL_BB_IN_RX F2 WLAN2_ADC_IM QLINK_DL2_M AV12 QLINK_RX2_M [15]
MIPI_CSI2_DATA0_P [12] AP4 AB40 G3 AW13
MIPI_CSI2_DLN0_P MIPI_DSI1_LN2_P [20] WL_BB_IP_RX WLAN2_ADC_IP QLINK_DL2_P QLINK_RX2_P [15]
MIPI_CSI2_DATA0_N [12] AN5 AB38 H2 AU17
MIPI_CSI2_DLN0_M MIPI_DSI1_LN3_N [20] WL_BB_QN_RX WLAN2_ADC_QM QLINK_UL0_M QLINK_TX_M [15]
MIPI_CSI2_DATA1_P [12] AM6 AA39 G1 AV18
MIPI_CSI2_DLN1_P MIPI_DSI1_LN3_P [20] WL_BB_QP_RX WLAN2_ADC_QP QLINK_UL0_P QLINK_TX_P [15]
MIPI_CSI2_DATA1_N [12] AL7 AL41
MIPI_CSI2_DLN1_M MIPI_DSI1_REXT
MIPI_CSI2_DATA2_P [12] AL5 MIPI_CSI2_DLN2_P
MIPI_CSI2_DATA2_N [12] AK6 MIPI_CSI2_DLN2_M
MIPI_CSI2_DATA3_P [12] AK4 AU33
MIPI_CSI2_DLN3_P EDP_AUX_N
MIPI_CSI2_DATA3_N [12] AJ5 AV34
MIPI_CSI2_DLN3_M EDP_AUX_P

C U201-C C
[17,33,51,52]

[17,33,51,52]

CONTROL
AJ3 LPI_GPIO_0

[8] LPI_PWR_EN AH4 LPI_GPIO_1

U201-B
[3,14] I2C_SENSORS_SDA AC1 LPI_GPIO_2
[17,33,51,52]
[3,14] I2C_SENSORS_SCL AD2 LPI_GPIO_3
AH6 LPI_GPIO_4
[17,33,51,52]
AG5 LPI_GPIO_5
CONTROL
TXD AG7
DBM_UART0_RXD AK36 GPIO_0 GPIO_57 AN37 FORCED_USB_BOOT [13] LPI_GPIO_6
[11]
RXD AL35 AV32 AF6
DBM_UART0_TXD GPIO_1 * * GPIO_58 USB_PHY_PS [6] LPI_GPIO_7
AL37 GPIO_2 GPIO_59 W41 LCD_TE AG3 LPI_GPIO_8
[3,12] I2C_TP_SDA * [12]

[3,12] AM36 GPIO_3 GPIO_60 AA37

GPIO58 GND for uUSB. AF2 LPI_GPIO_9
I2C_TP_SCL *

TP11 AN39 GPIO_4 GPIO_61 N35 AUDIO_MI2S_MCLK GPIO58 PM660 39 pin for Type C AH2 LPI_GPIO_10
TP10 AP38 Y40 DBMD_DVDD_EN [11] AG1 LPI_GPIO_11
GPIO_5 * GPIO_62
[3,7,10] BLSP2_I2C_SDA AJ39 GPIO_6 * GPIO_63 N39 DBM_RSTN [11] [20] SENS_RXD U3 LPI_GPIO_12

[3,7,10] BLSP2_I2C_SCL AK38 GPIO_7 GPIO_64 AL39 V4 LPI_GPIO_13

* [20] SENS_TXD

[14] BLSP_SPI3_MOSI V36 GPIO_8 GPIO_65 AT12 W1 LPI_GPIO_14

* DBM_INT [11]
W35 GPIO_9 GPIO_66 V40 TP_RESET_N [12] Y2 LPI_GPIO_15
[14] BLSP_SPI3_MISO * *

[14] BLSP_SPI3_CS_N W37 GPIO_10 * * GPIO_67 W39 TP_INT_N [12] AE3 LPI_GPIO_16

[14] BLSP_SPI3_CLK Y36 GPIO_11 * GPIO_68 P38 ACC_GYRO_INT1 [14] AF4 LPI_GPIO_17

[11] AUDIO_MI2S_SCK K40 GPIO_12 * GPIO_69 P40 ACC_GYRO_INT2 [14] [9] LPI_CDC_PDM_CLK AA7 LPI_GPIO_18

[11] AUDIO_MI2S_WS L39 GPIO_13 * * GPIO_70 R39 [9] LPI_CDC_PDM_SYNC AA5 LPI_GPIO_19

[11] AUDIO_MI2S_D0 L41 GPIO_14 GPIO_71 R41 [14] [9] LPI_CDC_PDM_TX AB6 LPI_GPIO_20
* ALSP_INT_N
M40 GPIO_15 GPIO_72 T40 FP_INT_N_1 [14] [9] LPI_CDC_PDM_RX0 AC7 LPI_GPIO_21
[11] AUDIO_MI2S_D1 *

[20] RXD P6 GPIO_16 * GPIO_73 P36 AUDIO_INT [11] HSJ_US_EURO_SEL [9] LPI_CDC_PDM_RX0_DRE AC5 LPI_GPIO_22

[20] TXD R7 GPIO_17 * * GPIO_74 R35 ANT_CHECK [18]

RF_ANT_CHECK [9] LPI_CDC_PDM_RX1 AD6 LPI_GPIO_23
HSJ_US_EURO_SEL AD4
[20] RTS P8 GPIO_18 * GPIO_75 R37 HSJ_US_EURO_SEL [13] [9] LPI_CDC_PDM_RX1_DRE LPI_GPIO_24

[20] N7 GPIO_19 GPIO_76 T36 HALL_EINT1 [13] [9] LPI_CDC_PDM_RX2 AE5 LPI_GPIO_25
CTS *

[14] FP_SUB_RESET U35 GPIO_20 * GPIO_77 T38 AUDIO_PA_RST [11] AA3 LPI_GPIO_26

SMB_STAT AM38 GPIO_21 GPIO_78 U37 WMSS_RESETN [15] AB4 LPI_GPIO_27

[7] * *

P4 GPIO_22 GPIO_79 AY18 AB2 LPI_GPIO_28

[3,11] BLSP_I2C_SDA_6 * SDM_HAPT_PWM [5]
AUDIO_SEL
[3,11] N3 GPIO_23 GPIO_80 AW19 AUDIO_SEL [11,13] AC3 LPI_GPIO_29
BLSP_I2C_SCL_6
M38 GPIO_24 GPIO_81 R5 [20] [20] SB_CLK W3 LPI_GPIO_30
[14] IR_LED_EN COEX_RXD
N37 GPIO_25 * * GPIO_82 T6 COEX_TXD [20] [20] SB_DATA V2 LPI_GPIO_31
L37 GPIO_26 * GPIO_83 AY26 UIM2_DATA [13]

For Voice wake up IC M36 BA27 [13]

GPIO_27 * GPIO_84 UIM2_CLK
MOSI R3 AW27
[11] BLSP_SPI8_MOSI GPIO_28 * * GPIO_85 UIM2_RESET [13]
MISO N5 AY28
[11] BLSP_SPI8_MISO GPIO_29 * * GPIO_86 UIM2_PRESENT [13]
CS_N
B [11] BLSP_SPI8_CS_N P2 GPIO_30 * * GPIO_87 AV28 UIM1_DATA [13]
B
BLSP_SPI8_CLK CLK R1 GPIO_31 GPIO_88 AW29 UIM1_CLK [13]
[11] *
R327
[12] CAM_MCLK0 0402 AU9 GPIO_32 GPIO_89 AY30 UIM1_RESET [13]
0R R328
[12] CAM_MCLK1 0402 AV6 GPIO_33 * GPIO_90 BA31 UIM1_PRESENT [13]
0R
AV8 GPIO_34 * GPIO_91 AW25 UIM_BATT_ALARM [5]
R329
[12] CAM_MCLK2 0402 AW9 GPIO_35 GPIO_92 AV20 DRX_TUNER_SW0 [13]
0R
[3,12] CCI_I2C_SDA0 BA7 GPIO_36 GPIO_93 AW21 DRX_TUNER_SW1 [13]
C302 C301 C303
[3,12] CCI_I2C_SCL0 AY8 GPIO_37 GPIO_94 AY22 DRX_TUNER_SW2 [13] Reserved for main antenna tuner
NC NC NC [3,12] AU7 BA23
CCI_I2C_SDA1 GPIO_38 GPIO_95 PRX_TUNER_SW5 [13] Reserved for diversity antenna tuner
[3,12] CCI_I2C_SCL1 AT8 GPIO_39 GPIO_96 AW23 PRX_TUNER_SW6 [13]

[3] GPIO40_ID3 AT10 GPIO_40 * GPIO_97 AY24 DRX_TUNER_SW5

[8] FL_STROBE_TRIG AR11 GPIO_41 * * GPIO_98 AV24 PRX_TUNER_SW4 [13] Board ID

[3] ID0 AV10 GPIO_42 * GPIO_99 AT18 QLINK_REQUEST [15]
VREG_L13A_1P8
[3] ID1 BA11 GPIO_43 * GPIO_100 AU19 QLINK_ENABLE [15]
VREG_L13A_1P8 VREG_L13A_1P8 VREG_L13A_1P8 VREG_L13A_1P8
[3] ID2 AY6 GPIO_44 * * GPIO_101 AR19 RFFE1_DATA [15] VREG_L11A_1P8
VREG_L14A_1P8
[12]
CAM_AF_VDD_20M_EN AU11 GPIO_45 GPIO_102 AT20
* RFFE1_CLK [15]
[12] REAR_CAM_DVDD_EN_2 AW5 GPIO_46 * * GPIO_103 AU21 RFFE2_DATA [19]

R305
0201
2.2K
R302
0201
2.2K
[12] CAM1_RST_N AT6 GPIO_47 GPIO_104 AV22 RFFE2_CLK

0201
2.2K

100K
*

R331
[19]

100K

0201
100K
0201
R304

0201

0201
0201

0201

R312

100K
R307
2.2K

R309

R311
2.2K

R313
[12] CAM2_RST_N AY12 GPIO_48 * * GPIO_105 AT22 PRX_TUNER_SW1 [13]

0201
2.2K
R308
[12] LDM_IDO AR7 GPIO_49 * GPIO_106 AU23 [13]
PRX_TUNER_SW2
[12] CAM_AF_VDD_EN AW11 GPIO_50 * * GPIO_107 AR23 RFFE4_DATA [19] BLSP2_I2C_SDA [3,7,10] [3] ID0
[3] ID1
AW7 GPIO_51 * GPIO_108 AT24 RFFE4_CLK [19]
[12] CAM_AVDD_EN
[3] ID2
I2C_SENSORS_SDA [3,14] CCI_I2C_SDA0 [3,12] BLSP2_I2C_SCL [3,7,10]
[12] CAM3_RST_N AY10 GPIO_52 * * GPIO_109 AU25 RFFE5_DATA[16,18]
[3] GPIO40_ID3
[12] LCD_RESET Y38 GPIO_53 GPIO_110 AV26 RFFE5_CLK [16,18] CCI_I2C_SCL0 [3,12]
I2C_SENSORS_SCL [3,14]

100K
0201

0201
100K
R314
J35 AT26 [13]

R315

R316
100K
0201
SD_CARD_DET_N GPIO_54 * * GPIO_111 PRX_TUNER_SW3

R332

100K
0201
[12] LDM_ID1 AW31 GPIO_55 GPIO_112 AU27
*
LNA_PRX_B41_EN [18,19] SMB I2C
AW33 AM40
[13] ACOK GPIO_56 * * GPIO_113 sensor I2C camera I2C

VREG_L11A_1P8
VREG_L13A_1P8
VREG_L11A_1P8

R325
A A

0201
2.2K

R326
2.2K
0201
R301
0201
2.2K

R310
0201
2.2K
R303
2.2K
0201

0201
R306
2.2K

I2C_TP_SDA [3,12]
BLSP_I2C_SDA_6 [3,11]
CCI_I2C_SDA1 [3,12] I2C_TP_SCL [3,12]
BLSP_I2C_SCL_6 [3,11]
CCI_I2C_SCL1 [3,12]

Smart I2C LEGACY TOUCH COMPANY:

<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 3OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D
U201-E

[17,33,51,52]

[17,33,51,52]

CONTROL
VREG_S6A AM12 VDD_MODEM_1 VDD_QFPROM_PRG AC35 VREG_L10A_1P8

C459 C402 AK10 VDD_MODEM_2

C430 C431 C432 C433 C434
[6] VREG_S6A_FB AH10
1.0uF 1.0uF VDD_MODEM_3
22uF 1.0uF 1.0uF 1.0uF
22uF AH12 P34
VDD_MODEM_4 VREF_SDC REF_MSM_HVPAD [4,5]
AK12 VDD_MODEM_5 VREF_UIM AR21

AM10 VDD_MODEM_6 C410 C411

100nF 100nF
AB22 VDD_MEM_1 VDD_APC1_1 AD30

AD16 VDD_MEM_2 VDD_APC1_2 AD32

AB20 VDD_MEM_3 VDD_APC1_3 AF30

AD18 VDD_MEM_4 VDD_APC1_4 AF32

AD20 VDD_MEM_5 VDD_APC1_5 AH30

AD22 VDD_MEM_6 VDD_APC1_6 AH32 VREG_S2A_S3A_0P87

VREG_S5B_0P915 AD24 VDD_MEM_7 VDD_APC1_7 AK30

C407 C422 C417 C413 C412
C423 C420 C419 C418 C416 C414
AD26 VDD_MEM_8 VDD_APC1_8 AK32 C421 C492 C415 VSNS_GOLD_APC_P [6]
C436 C435 C403 C404 C405 C457 C455 C439 C437
C456 C438 1.0uF 1.0uF
SG1105 AF22 AM30 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 22uF 22uF
VDD_MEM_9 VDD_APC1_9 1.0uF 100nF 22uF
[9] VSNS_S5B_P 1.0uF 1.0uF 100nF 22uF
22uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF
22uF AF26 AM32
VDD_MEM_10 VDD_APC1_10
SG1006 VSNS_GOLD_APC_M [6]
[9] VSNS_S5B_M AB16 AP30
VDD_MEM_11 VDD_APC1_11
AJ27 VDD_MEM_12 VDD_APC1_12 AP32

T14 VDD_MEM_13 VDD_APC1_13 AM26

T16 VDD_MEM_14
V16 VDD_MEM_15
Y16 AM20
VDD_APC_SILVER Capacitors
VDD_MEM_16 VDD_APC0_1 VREG_S1A_0P87

C4241

C424
Y18 VDD_MEM_17 VDD_APC0_2 AM22 C458 C428 C426 C493
C408 C429 C427 C425
AB18 AP20 VSNS_S1A_P [6]
VDD_MEM_18 VDD_APC0_3 1.0uF 1.0uF 100nF 100nF
1.0uF 1.0uF 1.0uF 10uF 22uF
AK20 22uF
VDD_APC0_4
VSNS_S1A_M [6]
VREG_L10B_0P915 Y10 VDD_LPI_MEM_1 VDD_APC0_5 AK22
1.0uF 1.0uF Y12 VDD_LPI_MEM_2 VDD_APC0_6 AP22

C406 C453

C C

U201-G
U201-F
[17,33,51,52]
[17,33,51,52]

[17,33,51,52]
[17,33,51,52]
CONTROL
CONTROL
VDD_PLL1_1 AH22 VREG_S5B_0P915
VREG_S3B_S4B L17 VDD_CORE_1 VDD_P1 H24 VREG_S1B_1P125
VDD_PLL1_2 AH26
T24 VDD_CORE_2
VREG_L10A_1P8 AN27 VDDA_APC1_CS_1P8
T26 VDD_CORE_3 VDD_P2 K34
C495 C443 C441 C494 Del C479
C440 C450 C451 C446 C445 C442
N17 VDD_CORE_4 VDD_P2 should be GND if SDC2 is not used
SG1108 C444 1.0uF
[9] VSNS_S3B_S4B_P 1.0uF 1.0uF 100nF
22uF 1.0uF 1.0uF 1.0uF 22uF N19
22uF 22uF VDD_CORE_5
100nF C478 AM16
P28 VDD_QLINK_1 VREG_L1B_0P925
VDD_CORE_6
SG1107 H10 AK16
[9] VSNS_S3B_S4B_M P22 VREG_S5B_0P915 VDD_EBI_PHY_1 VDD_QLINK_2
VDD_CORE_7
H14 VDD_EBI_PHY_2
P24 VDD_CORE_8 VDD_P3_1 AD8 VREG_L13A_1P8 C463 C464
H16 VDD_EBI_PHY_3 VDD_UFS_1P8 K24
T32 VDD_CORE_9 VDD_P3_10 K32 1.0uF 1.0uF
1.0uF 1.0uF 1.0uF 1.0uF 1.0uF K10 VDD_EBI_PHY_4
T28 VDD_CORE_10 VDD_P3_2 AF8 1.0uF 1.0uF
C475 VDD_UFS_CORE H26
T30 AP8 C476 C477 C474 C483
VDD_CORE_11 VDD_P3_3 C481 C482
VREG_L1B_0P925 H28 VDD_EBI_PHY_LV
M18 VDD_CORE_12 VDD_P3_4 AP36
VREG_L1A_1P225 K26 VDD_EBI_PHY_HV VDD_USB_SS_1P8 AP26 VREG_L10A_1P8
P30 VDD_CORE_13 VDD_P3_5 V34

P26 VDD_CORE_14 VDD_P3_6 AR13

VDD_USB_SS_CORE AK26
P18 VDD_CORE_15 VDD_P3_7 AR37
VREG_S5B_0P915 K12 VDD_EBI_PHY_5
P20 VDD_CORE_16 VDD_P3_8 Y8
VDD_USB1_HS_CORE AJ25
P32 VDD_CORE_17 VDD_P3_9 H32
H12 VDD_EBI_PHY_6 VDD_USB2_HS_CORE AB32
R19 VDD_CORE_18
T20 VDD_CORE_19
K14 VDD_EBI_PHY_7 VDD_USB1_HS_1P8 AN25
T22 VDD_CORE_20
VDD_USB2_HS_1P8 AB36

B VREG_L9B_0P87
VDD_SSC_CX Capacitors AB10 VDD_LPI_CORE_1 VDD_P5 AR17 VSIM1
K16 VDD_EBI_PHY_8 B
1.0uF VDD_USB1_HS_3P1 AT34 VREG_L7B_3P125
1.0uF AB12 VDD_LPI_CORE_2
1.0uF
VDD_USB2_HS_3P1 AF36
C452 C485 1.0uF
C449 L25
AR15 VREG_L10A_1P8 VDD_PLL2_1
VDD_P6 VSIM2 C488
AB14 VDD_PLL2_2 VDD_WCSS_ADC_DAC_1 K8 VREG_L6A_1P3
P10 VDD_WCSS_1
1.0uF L7
T10 VDD_WCSS_2 VDD_(SERDES_1P2) Capacitors VDD_WCSS_ADC_DAC_2

VREG_L5A_0P848 VDD_WCSS Capacitors V10 VDD_WCSS_3 If SDC1(eMMC) not used, connect to GND VDD_P7 H34
C484
VREG_L13A_1P8
VREG_L1A_1P225 AE11 VDD_MIPI_CSI_1P2_1

C468 C469 AF10 VDD_MIPI_CSI_1P2_2

1.0uF C467
C447 C448 AF12 T8 1.0uF
1.0uF 1.0uF VDD_MIPI_CSI_1P2_3 VDD_PLL_WCSS VREG_L9A_1P8
C491 1.0uF
4.7uF 1.0uF C480
If UFS not used, Float this PIN VDD_P10 K28
Y32 1.0uF
VREG_L1B_0P925 VDD_MIPI_DSI_0P9_1
C462 AA33 VDD_MIPI_DSI_0P9_2 C454
R402 should be 1ohm
1.0uF VDD_EBI_IO_1 H20
PDN : C447 change from 1uF 0201 to 4.7uF 0402 VDD_P11 AR25 VREG_L10A_1P8
AB30 K18 R402 0R VSNS_VDDIO_EBIX [10]
VDD_MIPI_DSI_1P2_1 VDD_EBI_IO_2 0201
1.0uF
Y30 VDD_MIPI_DSI_1P2_2 VDD_EBI_IO_3 H18
C470 R403
AA31 VDD_MIPI_DSI_1P2_3 VDD_EBI_IO_4 K20 0402 VREG_LP4X_0P6
0R
AA29 VDD_MIPI_DSI_1P2_4 VDD_EBI_IO_5 H22

Y30,Y32,AA31 should be GND if DSI1 is not used K22 C465 C466 C489 C490 NC
VDD_EBI_IO_6 C409 VREG_S5B_0P915
0402
47uF
2.2uF 1.0uF 2.2uF 1.0uF R401

REF_MSM_HVPAD AG35 VREF_QREFS_1P25 NOTE: INSTALL R403 & DNI R401 for LPDDR4X

C487 INSTALL R401 & DNI R403 for LPDDR4

100nF

PDN£ºC465 C489 change to 2.2uF---0928

VDD_(SERDES_0P9) Capacitors
VDD_(1P8) Capacitors [4,8] VREG_L1B_0P925

VREG_L10A_1P8 [4,5]
C401 C460 C461
1.0uF 1.0uF 1.0uF
1.0uF
1.0uF 1.0uF 1.0uF
C471 C472 C473
C4731

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 4OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

X501

2 THRMSTR_GND
4 U501-D U501-G P-type are psuedo-capless, cap can be at load.
THRMSTR
CAD NOTE: C529 near to PIN# 165 & C531 near to PIN# 214 Regulators used internal to PMIC need cap at PMIC.
N-type > N300 need cap at PMIC
VERG_L1A,L2A,L3A,L4A,L5A,L6A and L7A are either N1200 or N600 which needs to be local;
D [5] XOADC_GND
3 H2 H1 1
D

1.0uF
C501
VREG_L10A and VERG_L13A are also used for PMIC internal regulators, need 0.1uF local though pseudo-capless;
1nF 104 173
GND_WLP_TST AVDD_BYP [5,8,9] 165 205 VREG_L1A_1P225 [4]
OW38477001 Dedicated to main GND plane VREG_S2B VDD_L2_3 VREG_L1
C510 149
TEST_EN_VPP VREG_L2 187
C529 VREG_L2A_1P0 [15]
[5] PM_XO_THERM
210 XTAL_IN VPH_PWR_1 130 VPH_PWR 176
1.0uF VREG_L3 VREG_L3A_1P0 [15]

198 XTAL_OUT VDD_MSM_IO 139 VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] 194 203

[6] VREG_S5A VDD_L1_6_7 VREG_L5 VREG_L5A_0P848 [4]
C508
VCOIN 64 204 215
47uF_NC VDD_L1_6_7 VREG_L6 VREG_L6A_1P3 [4,20]
TP12

VREG_L7 216 VREG_L7A_1P2 [15]

[13] KYPDPWR_N 71 KPD_PWR_N VREG_BOB 140 VREG_BOB [5,8,12,13,14] 202

VREG_L8 VREG_L8A_1P8 [10,13]

[8] PON_1 152 PON_OUT 214 192

[5,8,9] VREG_S2B VDD_L5 VREG_L9 VREG_L9A_1P8 [4,20]

[2] PON_RESET_N 195 PON_RESET_N VREF_MSM 151 REF_MSM_HVPAD [4] 190

VREG_L10 VREG_L10A_1P8 [4]

R503 0R 206
[2] SDM_PS_HOLD 0201 PS_HOLD VREG_L11 178 VREG_L11A_1P8 [3,12]
C531
[13] RESIN_N 184 128 0R R512 [2,20]
RESIN_N SLEEP_CLK 0201 SLEEP_CLK [5,6,9] VREG_S4A 1.0uF 191 VDD_L8_9_10_11_12_13_14_1 VREG_L12 201 VREG_L12A_1P8 [15,21]
TP15 218 CBL_PWR_N 213 VDD_L8_9_10_11_12_13_14_2 VREG_L13 179 VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]

217

1.0uF
[8] FAULT_N FAULT_N 181

C502
VREG_L14 VREG_L14A_1P8 [3,14]

TP16 VREG_XO 211 110

VREG_L15 VSIM1 [4,13]

TP17 GND_XO_1 199 [5,8,12,13,14] VREG_BOB 132 143

VDD_L15_16_17_18_19 VREG_L16 VREG_L16A_2P7 [13,14,18,19]

[2,8] SPMI_CLK 108 SPMI_CLK GND_XO_2 209 154 [4,13]

VREG_L17 VSIM2
CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT TO ANY OTHER GND C530
[2,8] SPMI_DATA 118 SPMI_DATA 111
VREG_L18 VREG_L18A_2P85
1.0uF

VREG_L19 121 VREG_L19A_3P3 [20]

4.7uF
C520

4.7uF
C522
[5,6,9] 189 200 C509

4.7uF
C514
VREG_S4A VDD_XO_RFCLK VREG_RF_CLK

C511
2.2uF
4.7uF 1.0uF 1.0uF

C513
[11,16,17,45] 1.0uF

2.2uF
212 1.0uF 4.7uF

2.2uF
1.0uF

C521
GND_RF HK 1.0uF

C512
2.2uF
C523 1.0uF 1.0uF C527
C515 100nF 1.0uF C519
[20] RF_CLK1 146 C516 C526 C528
RF_CLK1 CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT TO ANY OTHER GND C518
C524
C525 C517
[15] RF_CLK2 168 RF_CLK2 GND_XO_ISO 188

R507 0R 148 180

[2] LNBBCLK1 0201 BB_CLK1 REF_BYP

C503
100nF
[2] LNBBCLK1_EN 158 BB_CLK1_EN GND_REF 169

136 BB_CLK2 NOTE: GND_REF must connect to main GND plane using dedicated via near the PMIC ball
CAD NOTE: REF_BYP and REF_GND should be routed away from noisy traces
137 BB_CLK3

AMUX_1 161 SDM_THERM [5]

AMUX_2 172 EMMC_THERM [5]

[5] PM_XO_THERM 182 XO_THERM AMUX_3 160 PA_THERM0 [18]

[5] XOADC_GND 193 GND_XOADC AMUX_4 171

ID3 [12]

C AMUX_5 150 QUIET_THERM [5] C

ANA_IN 183 DRAX_DIE_TEMP [8]

Dedicated to main GND plane

VDD_PDPHY 72 VREG_L7B_3P125

115 100nF
GND_PD_PHY
C507
[11,16,17,45]
HK

QUIET_THERM [5] SDM_THERM [5] EMMC_THERM [5]

VPH_PWR

100K/1%_NTC
2

100K/1%_NTC
U501-E

2
RT501

100K/1%_NTC
RT502

2
RT503
0201
R508
NC

1
OPTION1 [5] [5] OPTION1 8 170
GPIO_1 NC_2

FOR SDM660 , GPIO_1 is HI-Z 51 129

10K_NC

GPIO_2 NC_1
0201
R509

FOR SDM630 , GPIO_1 is low 63 GPIO_3

PLACE CLOSE TO SDM
147 GPIO_4

[8,20] WLAN_SW_CTRL 7 GPIO_5

159 GPIO_6 PMK_Sleep_CLK

[3] UIM_BATT_ALARM 19 GPIO_7

[8] SLB 30 GPIO_8

[5] UUSB_TYPEC 29 GPIO_9 Hight for Type-C
LOW for uUSB
[3,8] WCSS_VCTRL 41 GPIO_10

52 GPIO_11

[11] DBM_CLK 0R R511 62

0201 GPIO_12

117 GPIO_13

[11,16,17,45]

B HK
B
VPH_PWR

U501-C
0201
R501
NC

100K
[3] SDM_HAPT_PWM 0201 50 HAP_PWM_IN
R506
UUSB_TYPEC [5] VSW_HAP_P 18 VSW_MOTO_P [13]

1M

R505
0201
22nF

uUSB_TYPEC is Hi-Z for TypeC

10K_NC

C505
R510
0201

uUSB_TYPEC is LOW for uUSB

VPH_PWR 6 VDD_HAP VSW_HAP_M 40 VSW_MOTO_M [13]

U501-B 22uF

C504

28 PGND_HAP

83 GND_1 GND_CHG_1 58

93 GND_2 GND_CHG_2 69

94 GND_3 GND_CHG_3 70

105 82 84 GND_HAP
GND_4 GND_CHG_4

106 GND_5
[11,16,17,45]
114 GND_6 HK

116 GND_7

125 GND_8

126 GND_9

127 GND_10

135 GND_11

138 GND_12

[11,16,17,45]
HK

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 5OF 22
TO ANY OTHER GND
 6 5 4 3 2 1

9
40
03
17
10
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

CHG_GND connect together , then Dedicated to main GND plane

U501-F

D D
VPH_PWR BULK CAPS. DISTRIBUTE THESE ALL OVER U501

65 96 U501-A
VDD_S1_1 VREG_S1 VSNS_S1A_P [4]
VPH_PWR
66 VDD_S1_2
22uF 22uF 22uF 22uF 22uF

C610 C611 C612 C613 C614 2.2uF L601

VSW_S1_1 75 [4]
VREG_S1A_0P87 78 56
[6,7,13] USB_VBUS USB_IN_1 USB_IN_MID_1
C616 0.47uH
VSW_S1_2 76 79 57
C617 USB_IN_2 USB_IN_MID_2
86 GND_S1_1 VSW_S1_3 77 88 67
4.7uF_25V USB_IN_3 USB_IN_MID_3
4.7uF_25V
87 GND_S1_2 89 68
USB_IN_4 USB_IN_MID_4
25V
C618

VREF_NEG_S1 107 VSNS_S1A_M [4]

Dedicated to main GND plane 17 VCONN_IN BOOT_CAP 36

VPH_PWR

61 VCONN_EN C623
16V
33 VDD_S2_1 VREG_S2 95 27nF

55 VDD_S2_2 5 34
[11,13] USB_CC1 CC1_ID VSW_CHG_1

2.2uF [13] USB_CC2 27 35

CC2 VSW_CHG_2
L602
C602 VSW_S2_1 11 VREG_S2A_S3A_0P87 [3] USB_PHY_PS 39 45
0.47uH CC_OUT VSW_CHG_3
L607
VSW_S2_2 22 46
VSW_CHG_4 VPH_PWR
1uH
10 GND_S2_1 VSW_S2_3 44 90
[7] STAT_CHG STAT_CHG C624 22uF
32 GND_S2_2 VSW_S2_4 54
33pF C619 T601

PGND_CHG_1 12
C625 C626
92 WIPWR_RECHG PGND_CHG_2 13
220pF 220pF
VREF_NEG_S2 85 VSNS_GOLD_APC_M [4] 91 23
WIPWR_CHG_OK PGND_CHG_3

103 QI_PMA_ON PGND_CHG_4 24 Dedicated to main GND plane

Dedicated to main GND plane 20 74

VDD_S3_1 VREG_S3 VSNS_GOLD_APC_P [4]

42 VDD_S3_3 1 3
LDO_CTRL_1 VPH_PWR1

2 LDO_CTRL_2 VPH_PWR2 15
2.2uF
L603
VSW_S3_1 9 25
C603 0.47uH VPH_PWR3

VSW_S3_2 31 37
VPH_PWR4
21 VDD_S3_2 VSW_S3_3 53 99 47
DC_EN VPH_PWR5
43 VDD_S3_4 80 DC_SNS

C 100 USB_EN C
VREF_NEG_S3 73 101 4
[6,7,13] USB_VBUS USB_SNS VBATT_PWR_1 VBATT [13]

VBATT_PWR_2 16 10uF

Dedicated to main GND plane [13] 49 26 C620

USB_HS_DP_PM USB_DP VBATT_PWR_3
175 VDD_S4_1 VREG_S4 174 60 38
[13] USB_HS_DM_PM USB_DM VBATT_PWR_4
186 VDD_S4_2 48
VBATT_PWR_5
208 VDD_S4_3 81
[13] VBATT_CONN_VSNS_M VBATT_SNS_M
2.2uF L604
VSW_S4_1 185 VREG_S4A 102
C604 [13] VBATT_CONN_VSNS_P VBATT_SNS_P
1uH
197 22uF 22uF
VSW_S4_2 BATT_THERM_BIAS 156 BATT_THERM_BIAS [13]

VSW_S4_3 219 C605 C606 133

[13] VBATT_CONN_ISNS_M IBATT_SNS_M
196 GND_S4_1 122 145
[13] VBATT_CONN_ISNS_P IBATT_SNS_P AUX_THERM_BIAS AUX_THERM_BIAS [6]

207 GND_S4_2

100nF
C621
0R R603 155 112
0201 ISNS_SMB_M VARB

Dedicated to main GND plane 0R R604 144

1.0uF
0201 ISNS_SMB_P

C622
Dedicated to main GND plane 123
VREG_FG

[13] BATT_ID 113 BATT_ID

131 VDD_S5_1 VREG_S5 162 14
BOOT_PWR BOOT_PWR [7]

141 VDD_S5_2 166

[13] BATT_THERM BATT_THERM

4.7uF
C601
Note:R1804 should the value of RT1801 at 45¡ã degree
REF_GND_CHG 59
L605
142 [5]
R602
2.2uF VSW_S5_1 VREG_S5A 0201 177
1uH
[6] AUX_THERM_BIAS
R605
AUX_THERM Dedicated to main GND plane
33.2K

68K/1%_NTC
C607 VSW_S5_2 153 22uF 22uF VREG_L13A_1P8 0201

RT601
NC
163 Dedicated to main GND plane
GND_S5_1 C608 C609 [8] BA_N 157 BA_N
164 GND_S5_2
Dedicated to main GND plane
134 GND_FG

Dedicated to main GND plane RT1 is for device skin temp monitor during charging
Dedicated to main GND plane Dedicated to main GND plane 167 REF_GND_FG

124 GND_PSUB_FG
120 VDD_S6 VREG_S6 119 VREG_S6A_FB [4]
[11,16,17,45]
HK
2.2uF

C615 L606
VSW_S6_1 98 VREG_S6A [4]
1uH
97 GND_S6 VSW_S6_2 109

GND connect together , then Dedicated to main GND plane

B [11,16,17,45]
B
HK

Dedicated to main GND plane

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 6OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U701

SMB1351

USB_VBUS 40 DCIN1 SW1 18

C704 41 19
DCIN2 SW2
25V2.2uF_25V
42 DCIN3 SW3 20
L701
47 DCIN4 SW4 21
1uH
48 DCIN5 SW5 25

D702
Dedicated to main GND plane 49 DCIN6 SW6 26
C702 Dedicated to main GND plane
27 C707
SW7
2.2uF_25V
25V 33 28
47pF 22uF
MID1 SW8
C705
34 MID2
Dedicated to main GND plane
35 MID3 SYS1 3

SYS2 10
C703
[3,10] BLSP2_I2C_SDA 45 SDA SYS3 17
33nF
[3,10] BLSP2_I2C_SCL 46 SCL SYS4 24
16V
100K
[6,7] BOOT_PWR 0201
R701
[6] STAT_CHG 29 EN BOOT 11
R703 NOTE:
[6,7] BOOT_PWR 0201 1 SUSP PGOOD 22
100K 1. Connect to VBATT_PWR for external 10mOhm sensing
2. Connect to VPH_PWR for internal BATFET sensing

R702
0201
1M
NC
0201 37 USBCS CHGOUT1 2
VPH_PWR
R707
C 31 USB23 CHGOUT2 9 C
C708
16 10uF
CHGOUT3
C706 47pF
30 FETDRV CHGOUT4 23
10K
VREG_L13A_1P8 0201
R704
[3] SMB_STAT 43 STAT VBATT 8
Route to C706
THERM 15

39 SYSON
1
C701 32 OTGID GND 36

10V 1.0uF
2

44 DPLUS PGND1 4

38 DMINUS PGND2 5

PGND3 6

PGND4 7

PGND5 12

PGND6 13

PGND7 14

Dedicated to main GND plane

B B

M1001 M1002 M1003 M1004

1 1 1 1

MARKD2MM MARKD2MM MARKD2MM MARKD2MM

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 7OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

VPH_PWR

10K_NC

R801
0201
OPTION2 needed to be pulled high for Track3
OPTION2 [8]

10K_NC

R802
0201
U801-D

U801-C
D 82 CMN_GND_1 D
84 CMN_GND_2

85 CMN_GND_3

94 102 OPTION2 [8] 95 CMN_GND_4

TEST_EN_VPP OPTION FOR FUTURE USE GPIO_01

107 145 [3]

96 CMN_GND_5
GND_WLP_TST GPIO_02 LPI_PWR_EN

146 104 CMN_GND_6

GPIO_03 FRONT_CAM_DVDD_EN [12]

113 134 REAR_CAM_DVDD_EN [12] 105 CMN_GND_7

VREG_L13A_1P8 VDD_MSM_IO GPIO_04

179 106 CMN_GND_8

GPIO_05

[5] 28 83 116 CMN_GND_9

PON_1 PON_1 GPIO_06 GPIO6_FLASH_EN VREG_L13A_1P8

[6] BA_N 6 97 KEY_VOL_UP_N [13] 117 CMN_GND_10

BA GPIO_07
C804
167 118 CMN_GND_11
GPIO_08
100nF

R803
0201
[3,5] 125

NC
GPIO_09 189 WCSS_VCTRL Remove for LP4x CMN_GND_12

VPH_PWR 58 VPH_PWR_1 GPIO_10 63 SLB [5]

[11,14,17,30,32,33,39,43,44,45,49,51,52]
74 VPH_PWR_2 Pull-up for LPDDR4 GPIO_11 157 BUCK-BOOST_FLASH
LP4X_CTRL_BUCK_EN [10]

GPIO_12 133 LP4X_BUCK_MODE [10]

[5] FAULT_N 80 FAULT

[2,5] SPMI_CLK 64 SPMI_CLK DIE_TEMP 49 DRAX_DIE_TEMP [5]

[2,5] SPMI_DATA 75 SPMI_DATA

88 NC1 REF_BYP 60

99 NC2 100nF

87 NC3 C805
REF_GND: Dedicated to main gnd plane right under PMIC pin
92 NC4 or as close to the pin as possible.

128 NC5 REF_GND 71

AVDD_BYP 48

[11,14,17,30,32,33,39,43,44,45,49,51,52] 1.0uF
BUCK-BOOST_FLASH
C806

CAD NOTE: ROUTE AWAY FROM NOISY TRACEs

Dedicated to main GND plane

C C

GND connect together , then Dedicated to main GND plane AT C801

U801-A

17 VDD_BOB_1 VSW_BCK_BOB_1 7
VPH_PWR
L801
39 VDD_BOB_2 VSW_BCK_BOB_2 18
2.2uF 0.47uH
VSW_BCK_BOB_3 29
C801

8 PGND_BOB_1
Dedicated to main GND plane P-type are psuedo-capless, cap can be at load.
30 PGND_BOB_2 VSW_BST_BOB_1 9 Regulators used internal to PMIC need cap at PMIC.
N-type > N300 need cap at PMIC
CAD NOTE: DEDICATED CONNECTION TO MAIN GND PLAIN 19
VSW_BST_BOB_2 VERG_L9B is N600 which needs to be local;
U801-F
31
VREG_L7B is also used for PMIC internal regulators, need 0.1uF local though pseudo-capless;
VSW_BST_BOB_3

53 GND_PSUB_BOB

[5,8,12,13,14] VREG_BOB 25 VDD_L2 VREG_L1 14 VREG_L1B_0P925 [4]

VREG_L2 36 VREG_L2B_SDC2
[5,20] WLAN_SW_CTRL 40 EXT_CTRL_BOB VREG_BOB_1 20

C818 C819 C820 C821 VREG_L3 123 VREG_L3B_3P0 [14]

VREG_BOB_2 42 VREG_BOB [5,8,12,13,14]
NC NC NC NC 112 51
22uF VDD_L3_5_7_8_1 VREG_L4 VREG_L4B_2P95 [10]
22uF
142 VDD_L3_5_7_8_2 VREG_L5 131 VREG_L5B_2P95
C802 C803
VREG_L6 52 VREG_L6B_3P3
VREG_BOB_SNS 41

VREG_L7 143 VREG_L7B_3P125 [4,5]

62 VDD_L4_6 VREG_L8 122 VREG_L8B_3P3

VREG_L9 35 VREG_L9B_0P87 [4]

4 16 VREG_L10 13 VREG_L10B_0P915 [4]

[5,8,12,13,14] VREG_BOB VDD_FLASH_1 FLASH_STROBE FL_STROBE_TRIG [3]

C810
4.7uF

C815
4.7uF
C809

C816
4.7uF

2.2uF
[5,9] VREG_S2B 3 VDD_L1_9_10
26 VDD_FLASH_2 1.0uF 1.0uF

C813
4.7uF
1.0uF 1.0uF
FLASH_LED1 5 FLASH_LED1 [12] C812 1.0uF C811
2.2uF [11,14,17,30,32,33,39,43,44,45,49,51,52]
C822 C808 C817
BUCK-BOOST_FLASH
C814
C807 NC
27 GND_FLASH_1 FLASH_LED2 15 FLASH_LED2 [12]

38 GND_FLASH_2

B FLASH_LED3 37 FLASH_LED3 [12] B

[5,8,12,13,14] VREG_BOB 73 VDD_RGB

RGB_BLU 72

RGB_GRN 50

RGB_RED 61 RGB_RED [14]

RGB_RED LED is reserved for charging indication

[11,14,17,30,32,33,39,43,44,45,49,51,52]
BUCK-BOOST_FLASH

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 8OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

GND connect together , then Dedicated to main GND plane AT C929

U801-E

D U801-G
D
D901 change to LMBR4010H3T5G 0929
D901 C929 must place close to PMIC VPH_PWR 156 VDD_S1_1 VFB_S1 135 VSNS_S1B_P [10]

L906 B903 178 VDD_S1_2

108 VDD_WLED VSW_WLED 121 VPH_PWR
VPH_PWR
4.7uH
D901 2.2uF
L901
C936 144
C932 VSW_S1_1 VREG_S1B_1P125 [4,10]
C915 0.47uH
10uF 166
B902 10uF VSW_S1_2
VREG_WLED 130 VREG_LEDA [12]
155 GND_S1_1 VSW_S1_3 188
C929 C937

NC 177 GND_S1_2
110 4.7uF
PGND_WLED

VREF_NEG_S1 115 VSNS_S1B_M [10]

98 GNDP_WLED_SINK WLED_SINK1 129 LED_SINK1 [12]

WLED_SINK2 109 LED_SINK2 [12]

Dedicated to main GND plane
WLED_SINK3 120
VPH_PWR 2 VDD_S2_1 VFB_S2 70

24 VDD_S2_2

2.2uF
CABC 86 LCM_PWM_CABC [12]
L902
C914 VSW_S2_1 1 VREG_S2B [5,8]
0.47uH
12
11 55 1 L907 2 VSW_S2_2
VPH_PWR VDD_DISP_1 VSW_DISP VPH_PWR
4.7uH 23 34
GND_S2_1 VSW_S2_3 22uF
21 C933 22uF
VDD_DISP_2
45 GND_S2_2 C925
10uF
C924
100K
0201 77 DISP_HW_EN VDISP_FB 65
LCD_BL_EN
R908 Dedicated to main GND plane VREF_NEG_S2 59
VDSIP_FB: STAR ROUTE TO O/P CAP

44 VDISP_MID VDISP_P_OUT_1 22 VDISP_P_OUT [12]

Dedicated to main GND plane
VDISP_P_OUT_2 33 10uF 10uF Dedicated to main GND plane
C930 67 VDD_S3_1 VFB_S3 93
C934 VPH_PWR VSNS_S3B_S4B_P [4]

C926 10uF 68 VDD_S3_2

C928 66 PGND_DISP
10uF C927 2.2uF
10uF 76 GND_VDISP_P
Dedicated to main GND plane
L903
C916 56 VREG_S3B_S4B [4]
VSW_S3_1
0.47uH
VSW_S3_2 57
VDISP_M_OUT_1 10 VDISP_M_OUT [12]
Dedicated to main GND plane 46 GND_S3_1 VSW_S3_3 69
10uF 10uF
47 GND_S3_2
C935 C931

VREF_NEG_S3 81
54
C GND_DISP_M
C
Route tegether then Dedicated to main GND plane
C938 Dedicated to main GND plane
VDISP_CAP1 43
10uF Dedicated to main GND plane
100 VDD_S4_1 VFB_S4 114
32 VPH_PWR
VDISP_CAP2
C938 SHOULD BE CLOSE TO PINS AS POSSIBLE 101 VDD_S4_2

[11,14,17,30,32,33,39,43,44,45,49,51,52] 111 VDD_S4_3

BUCK-BOOST_FLASH
L904
VSW_S4_1 89
2.2uF
0.47uH
C917 VSW_S4_2 90

VSW_S4_3 91

78 GND_S4_1

79 GND_S4_2 VREF_NEG_S4 103 VSNS_S3B_S4B_M [4]

Dedicated to main GND plane

U801-B 176 VDD_S5_1 VFB_S5 124 [4]
VPH_PWR VSNS_S5B_P

186 VDD_S5_2

187 VDD_S5_3
2.2uF
L905
VSW_S5_1 164 VREG_S5B_0P915 [4]
193 CDC_SPKDRV_P CDC_VDDIO 149 VREG_L13A_1P8 C918 0.47uH
VSW_S5_2 165
183 CDC_SPKDRV_M
VSW_S5_3 175
CDC_VDD_PA 169 VREG_S4A [5,6]

153 GND_S5_1
C901 C902 C903
154 GND_S5_2
[13] CDC_IN1_P 137 185 100nF 1.0uF 2.2uF
CDC_IN1_P CDC_VDD_CP
VREF_NEG_S5 132 VSNS_S5B_M [4]
[13] CDC_IN1_M 126 CDC_IN1_M

[11] CDC_MIC2_P 160 182

CDC_IN2_P CDC_VDD_SPKDRV_1 Dedicated to main GND plane [11,14,17,30,32,33,39,43,44,45,49,51,52]
[11] BUCK-BOOST_FLASH
CDC_IN3_P 138 CDC_IN3_P CDC_VDD_SPKDRV_2 192 VPH_PWR
Dedicated to main GND plane
C909 C906 C907 C908
[11,13] MIC_BIAS1 158 CDC_MIC_BIAS1
100pF 100pF 100pF 100pF
ADD C909 ---20171001 [11] MIC_BIAS2 147 CDC_MIC_BIAS2 CDC_BOOST_VREG_5V 152

C940 C941
[11] CDC_EAR_P 181 CDC_EAR_P
100nF 100nF

[11] CDC_EAR_M 159 CDC_EAR_M VPH_PWR

22uF
Dedicated to main GND plane CDC_BOOST_SW 174 22uF 22uF 22uF
DEL C919 C922
B [3] LPI_CDC_PDM_CLK 140 CDC_PDM_CLK CDC_BOOST_SNS 162
C920 C921 C923 B
[3] LPI_CDC_PDM_SYNC 161 CDC_PDM_SYNC

[3] LPI_CDC_PDM_TX 151 168 R901 0R [11,13]

CDC_PDM_TX CDC_HPH_REF 0201 CDC_HPH_REF

190 R902 0R CDC_HPH_L [11,13]

CDC_HPH_L 0201

[3] LPI_CDC_PDM_RX0 127 191 R903 0R CDC_HPH_R [11,13]

CDC_PDM_RX0 CDC_HPH_R 0201

139 C913 C904 C905

[3] LPI_CDC_PDM_RX1 CDC_PDM_RX1
470pF 680pF 680pF
[3] LPI_CDC_PDM_RX2 141 CDC_PDM_RX2 CDC_HS_DET 148 CDC_HS_DET [11]

Dedicated to main GND plane

[3] LPI_CDC_PDM_RX0_DRE 150 CDC_PDM_RX0_COMP CDC_GND_CP 195

Dedicated to main GND plane
[3] LPI_CDC_PDM_RX1_DRE 119 CDC_PDM_RX1_COMP
Dedicated to main GND plane
136 R904 0R [11]
CDC_GND_CFILT 0201 CDC_IN3_M
0R

4.7uF 173 CDC_NCP_FLY_P

C910
0201

184 CDC_NCP_FLY CDC_GND_SPKDRV_1 171

R905

CDC_GND_SPKDRV_2 172

Dedicated to main GND plane

194 CDC_NCP_VNEG CDC_GND_BOOST_1 163

CDC_GND_BOOST_2 196

B901
Dedicated to main GND plane
180 CDC_PA_VNEG CDC_NC 170
1.0uF

C912 [11,14,17,30,32,33,39,43,44,45,49,51,52]
10V 10V
BUCK-BOOST_FLASH
2.2uF
C911

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 9OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U1001-C

[2] AA16
DDR_RESET_N RST_N_2

R1001
D [2,10] DDR_VDDQ 0201
240R/1%
B16
ZQ0 D
R1002
C16
0201 ZQ1
240R/1%

[2] E15
EBI0_CA0_CS_0 CS0_A
[2] F15 A3
EBI0_CA0_CS_1 CS1_A DQ0_A EBI0_DQ_0 [2]
H14
CS2_A B3 EBI0_DQ_1 [2]
DQ1_A

[2] H16 C3 EBI0_DQ_2 [2]

EBI0_CA0_CK_T CLK_T_A DQ2_A
D3 EBI0_DQ_3 [2]
[2] EBI0_CA0_CK_C G16 DQ3_A
CLK_C_A
B7 EBI0_DQ_4 [2]
DQ4_A
U1001-B [2] EBI0_CA0_CKE_0 E16 C6
CKE0_A DQ5_A EBI0_DQ_5 [2]
R1006
[2] EBI0_CA0_CKE_1 F16
VREG_L13A_1P8 0201 CKE1_A D7 EBI0_DQ_6 [2]
J14 DQ6_A
10K U1001-A CKE2_A
C8 EBI0_DQ_7 [2]
M3 DQ7_A
VSF1 [4,9,10] VREG_S1B_1P125 J13
N3 A1 ODT_A K5 EBI0_DQ_8 [2]
VSF2 DNU_1 DQ8_A
[2] RESOUT_N N9 M4 A2 [2] EBI0_DQS_T_0 C9
RST_N_1 VSF3 DNU_2 DQS0_T_A K6 EBI0_DQ_9 [2]
DQ9_A
N4 [2] EBI0_DQS_T_1 K9
[2] SDC1_CMD M9 VSF4 DQS1_D_A K3 EBI0_DQ_10 [2]
CMD A17 DQ10_A
M5 DNU_3
VSF5 [2] D9 J3
[2] P12 EBI0_DQS_C_0 DQS0_C_A DQ11_A EBI0_DQ_11 [2]
SDC1_CLK CLKM N5 A18
VSF6 DNU_4 [2] J9
EBI0_DQS_C_1 DQS1_C_A J7 EBI0_DQ_12 [2]
M6 DQ12_A
R1007 0R M12 VSF7 B1
[2] SDC1_RCLK 0201 DS DNU_5 G3 EBI0_DQ_13 [2]
N6 DQ13_A
VSF8 [2] G14
B18 EBI0_CA0_CA_0 CA0_A
M7 DNU_6 H6 EBI0_DQ_14 [2]
R1007 : closed to eMMC part [2] SDC1_DATA_0
P16
DAT0
VSF9
AC1
[2] EBI0_CA0_CA_1 F13
CA1_A
DQ14_A
M15 DNU_7 H8 EBI0_DQ_15 [2]
[2] SDC1_DATA_1 DAT1 [2] EBI0_CA0_CA_2 C13 DQ15_A
CA2_A
AC18
[2] SDC1_DATA_2 N13 D16 DNU_8 [2] EBI0_CA0_CA_3 D13
DAT2 NC_1 CA3_A
[2] SDC1_DATA_3 P15 AD1 [2] EBI0_CA0_CA_4 E13
DAT3 DNU_9 CA4_A
K17
[2] SDC1_DATA_4 M16 NC_2 AD2 [2] EBI0_CA0_CA_5 C15
DAT4 DNU_10 CA5_A
[2] SDC1_DATA_5 N14 N7
DAT5 NC_3 AD17
DNU_11
[2] SDC1_DATA_6 L14 T17
DAT6 NC_4 D5
AD18 [2] EBI0_DMI_0 DMI0_A
[2] SDC1_DATA_7 L13 DNU_12
DAT7 AB16 H3
NC_5 [2] EBI0_DMI_1 DMI1_A

AC16
NC_6
LDDR4_254BALL_FBGA LDDR4_254BALL_FBGA

LDDR4_254BALL_FBGA

C C

U1001-F

U1001-D

U1001-E G13
VSS_18
K13 G15
VSSM_1 VSS_19
K14 H4
VSSM_2

C1016
Y15 VSS_20

1.0uF
[2] EBI1_CA0_CS_0 CS0_B K16
VSSM_3 H7
[2] EBI1_CA0_CS_1 W15 VSS_21
CS1_B L17 L12
VDDI VSSM_4 H13
U14 VSS_22
CS2_B L15
VSSM_5 H15
VSS_23
L16 J6
U16 M17 VSSM_6 VSS_24
[2] EBI1_CA0_CK_T CLK_T_B VREG_L4B_2P95 VCC_1
A4 M8 K4
V16 AD3 EBI1_DQ_0 [2] N17 VDD1_1 VREG_L13A_1P8 VSSM_7 VSS_25
[2] EBI1_CA0_CK_C CLK_C_B DQ0_B VCC_2
A9 M13
DQ1_B
AC3 EBI1_DQ_1 [2] C1013 C10181.0uF P17
VCC_3 VDD1_2 VSSM_8 VSS_26
K7
[2] EBI1_CA0_CKE_0 Y16 A15 C1026 C1027 C1010 C1011 M14 K8
CKE0_B AB3 EBI1_DQ_2 [2] VDD1_3 VSSM_9 VSS_27
W16
DQ2_B 2.2uF 2.2uFC1020 A16 N8
[2] EBI1_CA0_CKE_1 CKE1_B AA3 EBI1_DQ_3 [2] VDD1_4 1.0uF VSSM_10 R4
DQ3_B 1.0uF 1.0uF 1.0uF VSS_28
T14 B15 N12 R7
CKE2_B AC7 EBI1_DQ_4 [2] VDD1_5 VSSM_11 VSS_29
DQ4_B
AC15 N15 R8
AB6 EBI1_DQ_5 [2] VDD1_6 VSSM_12 VSS_30
DQ5_B
T13 AD4 N16 T6
[4,9,10] VREG_S1B_1P125 ODT_B AA7 EBI1_DQ_6 [2] VDD1_7 VSSM_13 VSS_31
DQ6_B
VREG_L8A_1P8 J15 AD9 P13 U4
AB8 EBI1_DQ_7 [2] VCCQ_1 VDD1_8 VSSM_14 VSS_32
DQ7_B
J16 AD15 P14 U7
R5 EBI1_DQ_8 [2] VCCQ_2 VDD1_9 VSSM_15 VSS_33
[2] AB9 DQ8_B
EBI1_DQS_T_0 DQS0_T_B J17 AD16 R15 U13
R6 EBI1_DQ_9 [2] C1015 C1014 VCCQ_3 VDD1_10 VSSM_16 VSS_34
R9 DQ9_B C1021
[2] EBI1_DQS_T_1 DQS1_T_B K15 R16 U15
R3 EBI1_DQ_10 [2] VCCQ_4 VSSM_17 VSS_35
DQ10_B 2.2uF 2.2uF 100nF R13 R17 V4
[2] AA9 T3 EBI1_DQ_11 [2] VCCQ_5 VSSM_18 VSS_36
EBI1_DQS_C_0 DQS0_C_B DQ11_B
R14 V5
[2] T9 T7 EBI1_DQ_12 [2] VCCQ_6 A5 VSS_37
EBI1_DQS_C_1 DQS1_C_B DQ12_B VDD2_1 VREG_S1B_1P125
T15 V6
V3 EBI1_DQ_13 [2] VCCQ_7 A8 VSS_38
DQ13_B VDD2_2 B4
INSTALL R536 & DNI R535 for LP4
T16 VSS_1 V13
[2] EBI1_CA0_CA_0 V14 U6 EBI1_DQ_14 [2] VCCQ_8 B9 VSS_39
CA0_B DQ14_B INSTALL R535 & DNI R536 for LP4x
VDD2_3 B6
VSS_2 V15
[2] EBI1_CA0_CA_1 W13 U8 EBI1_DQ_15 [2] B13 VSS_40
CA1_B DQ15_B VDD2_4 [9] B8
R1004 C1025 C1024 C1006 C1023 C1007 C1005 VSNS_S1B_P VSS_3
[2] EBI1_CA0_CA_2 AB13 B14 C1004 W14
CA2_B A6 VDD2_5 C4 VSS_41
VREG_LP4X_0P6 0402 VDDQ_1 VSS_4
[2] EBI1_CA0_CA_3 AA13 G7 4.7uF 4.7uF Y14
CA3_B 0R A7 VDD2_6 1.0uF 1.0uF 1.0uF C5 VSS_42
VDDQ_2 22uF 22uF VSS_5
[2] EBI1_CA0_CA_4 Y13 G8 AA4
B [2] EBI1_CA0_CA_5 AB15
CA4_B
CA5_B VREG_S1B_1P125
NC
0402
C1030 C1028 C1029 C1009 C1008
A13
A14
VDDQ_3 VDD2_7
VDD2_8
G9
C7
C14
VSS_6
VSS_43
VSS_44
AA6 B
R1005 VDDQ_4 VSS_7
2.2uF 2.2uF 1.0uF 1.0uF K2 VSNS_S1B_M [9] AA8
47uF B5 VDD2_9 D4 VSS_45
VDDQ_5 VSS_8
L7 AA14
H5 VDD2_10 D6 VSS_46
AA5 [2,10] VDDQ_6 VSS_9
[2] EBI1_DMI_0 DMI0_B DDR_VDDQ L8 AA15
H9 VDD2_11 D8 VSS_47
U3 VDDQ_7 VSS_10
[2] EBI1_DMI_1 DMI1_B L9 AB4
J4 VDD2_12 D14 VSS_48
R1003 0R VDDQ_8 VSS_11
[10] VSNS_DDR_VDDQ 0201 P7 AB5
LDDR4_254BALL_FBGA J5 VDD2_13 D15 VSS_49
VDDQ_9 VSS_12
P8 AB7
J8 VDD2_14 E14 VSS_50
VDDQ_10 VSS_13
P9 AB14
T4 VDD2_15 F14 VSS_51
VDDQ_11 VSS_14
R2 AC4
R1003 should be 1 ohm T5
VDDQ_12 VDD2_16
V7
G4
VSS_15
VSS_52
AC6
T8 VDD2_17 G5 VSS_53
VDDQ_13 VSS_16
V8 AC8
U5 VDD2_18 G6 VSS_54
VDDQ_14 VSS_17
U9 V9
VDDQ_15 VDD2_19
AC5 AC9
VDDQ_16 VDD2_20
AD6 AC13
VDDQ_17 VDD2_21 LDDR4_254BALL_FBGA
AD7 AC14
VDDQ_18 VDD2_22
AD13 AD5
VDDQ_19 VDD2_23
AD14 AD8
VDDQ_20 VDD2_24

LDDR4_254BALL_FBGA

Buck for VDRAM

FAN53526 / Buck I2C address: 0X60 (Write:0xC0, Read:0xC1)

Note: 23-2
U1002

WLCSP15/P0.4/B0.2/FAN53526
L1001
A1 A2 >=30mil
VPH_PWR VIN SW VREG_LP4X_0P6
0.47uH
B1 VIN SW B2
C1001 C1003
C1 VIN VOUT E3
VSNS_DDR_VDDQ [10]
4.7uF 4.7uF

VSNS_VDDIO_EBIX [4]

[3,7] BLSP2_I2C_SCL E2 SCL PGND A3

[3,7] BLSP2_I2C_SDA D3 SDA PGND B3

PGND C2

A [8] LP4X_CTRL_BUCK_EN D2 EN AGND C3

A
[8] LP4X_BUCK_MODE D1 VSEL AGND E1

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 10
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

[11] DBMD_DVDD_1.1 R1125 0R

0201

THIS VOL SHOULD ON

VREG_L13A_1P8 R1124 0R
[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] 0201

R1121 0R
0201

D C1130 C1131 C1132

D
1.0uF 100nF 1.0uF

1.1V
1.8V 1.8V

D1
A3

A5
R1130 10K

VCCA

VDD_IO

VDD_CORE
VREG_L13A_1P8 0201

Sub MIC

C1133

1.0uF
A1 DBM_IN3_P [11]
MIP_IP

C1134
DBM_IN3_P [11]

1.0uF
slpp_clk?? E1
[5] DBM_CLK MASTER_CLK
MIC_BIAS1 [11] B1 DBM_INT3_M [11]
DBM_INT3_M MIC_IN

[3] DBM_INT A4
GPIO14/TDM0_FSYNC/DM1_CLK/UART1_TXD
C1
[3] E6 VREF
DBM_RSTN RSTN
MIC101
NC NC NC NC NC
B1102 C1126 1.0uF TP33 TP34 TP31 TP32 NC C1108 C1135
1 [9] TP30
OUT CDC_IN3_P TP14 B4
5 180nH GPIO12/DM1_CLK/UART0_RTS/TDO
POWER B1101 1.0uF 1.0uF
C1102 C1109
2 180nH E4
GND GPIO11/DM1_DATA/TCK
3
GND 100pF NC
4
GND B1103 C1127 1.0uF C4
E3 GPIO0/DM1_CLK/TDM1_TXD_BYPASS/STRAP_TEST
CDC_IN3_M [9] GPIO17/UART0_TXD/DM1_CLK
180nH
AM0502B-NE381-X01 B5
[3] DBM_UART0_RXD R1123 0R GPIO18/UART0_RXD/WAKEUP/DM1_DATA NC NC
0201 TP35 TP36
C1103 C1104 T1102 T1107
B1106
180nH

C1101
33pF 33pF
[3] BLSP_SPI8_CLK R1126 0R C3
100nF 0201 GPIO6/SPI_CLK/IIC_SCL1/DM0_CLK
[3] BLSP_SPI8_CS_N R1127 0R B2
0201 GPIO7/SPI_SCS/IIC_SDA1 D3
GPIO19/DM0_CLK/TDM1_CLK/TDM0_CLK_BYPASS
[3] BLSP_SPI8_MOSI R1128 0R C6
0201 GPIO5/SPI_SDI/DM0_DATA
[3] BLSP_SPI8_MISO R1129 0R D6 E5
0201 GPIO4/SPI_SDO/CLKOUT_P GPIO20/DM0_DATA/TDM1_RXD

D5
GPIO1/IIC_SCL0/DM1_DATA/GPIO22/CLKOUT_N
together then single via to main GND C5
GPIO2/IIC_SDA0/DM0_DATA/GPIO21
C2
GPIO16/TDM0_TXD/TDM1_RXD_BYPASS/STRAP0
B3
GPIO8/DM0_CLK/UART1_TXD/RTCK/JTAG_EN
B6
GPIO9/IIC_SCL2/UART1_RXD/DM0_DATA/TDI
D4 E2
GPIO13/TDM0_CLK/SLIMBUS_CLK/DM1_DATA GPIO10/IIC_SDA2/TDM1_FSYNC/TDM0_FSYNC_BP

D2
GPIO15/TDM0_RXD/SLIMBUS_DATA/UART1_RXD A2
GNDA
A6
VSS

U1103
DSP_DBMD4

C C
Smart PA DCDC_SY8842
NOTE: L1101 2016, 0.8mm
0.68uH
1.1V always on
[5,6,7,8,9,10,11,16,18] 5 6 L1101
VPH_PWR IN LX DBMD_DVDD_1.1 [11]
NC NC NC NC

100K_1%
TP26 TP27 TP28 TP29
C1106
R1107 100K_NC 3 2 C1110 C1155
C1107

0201
0201 PG OUT
10uF
VPH_PWR U1102 NC 10uF 10uF

R1101
U1160
[3,11] TAS2555
AUDIO_MI2S_SCK VREG_L13A_1P8 4 1
[3] DBMD_DVDD_EN EN FB

GND
L1160

R1102
[3,11] AUDIO_MI2S_WS C3
IN_P B1
D3 SW
[3,11] AUDIO_MI2S_D0 IN_M B2 1uH
SW

7
100K

0201
A3
[3,11] AUDIO_MI2S_D1 D6 VBAT
MCLK_GPI2
B6 C6
[3,11] AUDIO_MI2S_SCK BCLK1_GPIO1 DVDD

0201
C1164

C1165
F4

C1161

C1163
100nF

120K_1%
100nF

100nF
AVDD

C1162
100nF
10uF
[3,11] AUDIO_MI2S_WS A5 G6
WCLK1_GPIO2 IOVDD

R1103
B5 C1160
[3,11] AUDIO_MI2S_D0 DIN1_GPI1
A6 D2
[3,11] AUDIO_MI2S_D1 DOUT1_GPIO3 VREG
10nF
F6 C1 C1166
BCLK2_GPIO5 VBOOST 10uF
E5 C2 Connect to PGND_B together
WCLK2_GPIO6 VBOOST 100pF
C5 16V

[3] BLSP_I2C_SCL_6
E6

F3
E4
DIN2_GPIO8
DOUT2_GPIO7

SCL_SSZ SPK_P
F1 R1162
C1167

0603
10uF

0R C1168
SPKR_OUT_P [13]
VOUT=0.6V¡Á (1+RH/RL)
[3] BLSP_I2C_SDA_6 SDA_MOSI R1164 NC
0201
D1 R1163 0R
[3,11] D5 SPK_M 0603 SPKR_OUT_M [13]
AUDIO_INT IRQ_GPIO4
R1165 NC
[3,11] G5 E2 0201 NC
AUDIO_PA_RST /RESET VSENSE_P VSENSE_P [13]
C2
F2 [13]
VSENSE_M C1170 VSENSE_M
C1169
B4
ICC_GPI3
A4 G1
ICC_GPIO9 NC
B3 G2
ICC_GPIO10 NC
E1
PGND
A2
G3 PGND_B
ADR1_MISO A1
VREG_L13A_1P8 F5 PGND_B
ADR0_SCLK D4
G4 IOGND
SPI_SELECT E3
AGND
C4
DGND

Earphone Audio nokia,L-R-MIC-GND

R1160

R1161
0201
0201

10K
10K

default Iphone,L-R-GND-MIC

[3,11]
AUDIO_INT
[3,11]
AUDIO_PA_RST Note: Ferrite beads and their corresponding bypass capacitors on
on CDC_HPH_L_P, CDC_HPH_L_M and CDC_HPH_REF
are needed to reduce noise generated by audio/FM concurrency

B B

2.2K
[9] MIC_BIAS2 0201
R1105

HPH_R
[9,13] CDC_HPH_R

[9,13] CDC_HPH_REF

HPH_L
[9,13] CDC_HPH_L
R1106 0R MIC_IN [13]
[9] CDC_MIC2_P 0201 HEADSET_MIC_P_S
C1140

33pF

REC
REC1101 VREG_L13A_1P8
[3,13]
AUDIO_SEL
B1104
2 CDC_EAR_M [9]
N
1
P
C1111 VREG_L13A_1P8

100pF
B1105 C1142
CDC_EAR_P [9] 1 6
IN1 IN2
100nF
2 5
GND VCC
T1103 T1104
R1108 100k 3 4
C1112 C1113 [6,13] USB_CC1 0201 IN0 Y

33pF 33pF
C1105 [9]
U1104 CDC_HS_DET
NC GATE_SN74LVC1G97DSF

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 11
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Main Camera A Main Camera B LCM

VREG_L11A_1P8

33

34
J1204

D [3] CAM_MCLK0 1-CAMW_MCLK 1

1 30
30 30-GND
R1223
0201
NC
D

33

34
2-GND 2 29 29-MCN
CAM_CLKN-A [12] J1202
2 30
3 28

42

41
28-MCP
[3,5,12] VREG_L11A_1P8 3-VREG_LVS1A-1.8V
3 28 CAM_CLKP-A [12]
4-GND 4 27 27-GND
4 27 [12] VCM_AF_AVDD_2P8 1-CAMW_VCM_2.8V 1 30 30-GND
1 40
[3] CAM2_RST_N 5-TELE_RSTN 5 26 26-MDN3
CAM_D2N-A [12] 1 30 1-GND 40-GND
5 26 2-GND 2 29 29-MDN4
R1248 1K 2 39
6-I2C_SDA 6 25 25-MDP3
CAM_D2P-A [12] 2 30 CAM_D3N-A-2 [12] [3,12] 2-TP_INT
[12]
[3] CCI_I2C_SDA0 6 25 3-CAMW_DVDD_1.2V 3 28 28-MDP4 TP_INT_N 0201 3
39-MIPI_D3N

38 TDN3_LCM
7-I2C_SCL 7 24 24-GND [12] CAM_DVDD_1.2 3 28 CAM_D3P-A-2 [12] 3-GND 38-MIPI_D3P
[12]
[3] CCI_I2C_SCL0 7 24 4-GND 4 27 27-GND
4 37 TDP3_LCM
8-GND 8 23 23-MDN1
CAM_D0N-A [12] 4 27 [3] 4-TP_SDA
8 23 5-CAMW_MCLK 5 26 26-MDN2 I2C_TP_SDA 5 J1205
37-GND

36
[12] DUALCAM_XVS 9-XVS 9 22 22-MDP1
CAM_D0P-A [3] CAM_MCLK2 5 26 CAM_D1N-A-2 [12] 5-TP_SCL 36-MIPI_D0N
[12]
9 22 [12] 6-GND 6 25 25-MDP2 [3] I2C_TP_SCL R1249 1K 6 35 TDN0_LCM
10-CAMT_AVDD2P8 10 21 21-GND [3,5,12] VREG_L11A_1P8 6 25 CAM_D1P-A-2 [12] 6-TP_RST
[12]
10 21 7-VREG_LVS1A-1.8V 7 24 24-GND [3,12] TP_RESET_N 0201 7
35-MIPI_D0P

34 TDP0_LCM
[12] CAM_AVDD_2P8_2 B1203 11-AGND 11 20 20-MDN4 7 24 7-GND 34-GND
11 20 CAM_D3N-A [12] [12] DUALCAM_XVS 8-XVS 8 23 23-MCN
8 33
12-CAMT_DVDD_1P05 12 19 19-MDP4
CAM_D3P-A 8 23 CAM_CLKN-A-2 [12] VREG_L11A_1P8 33-MIPI_CLKN
[12]
[12] CAM_DVDD_1.05 12 19 [12] 9_RSTN 9 22 22-MCP
R1201 1K 9
8-IOVCC_1.8V

32 TCN_LCM
13 18 18-GND [3] CAM3_RST_N 9 22 CAM_CLKP-A-2 [12] [12]

BB2R4-40KBJ03
13-AFGND
0R 13 18 10-GND 10 21 21-GND [3] LDM_IDO 0201 1K
9.LCD_ID0(GND) 32-MIPI_CLKP
TCP_LCM
[12] VCM_AF_AVDD_2P8 14-CAMW_VCM_2V8 14 17 17-MDN2 [12] 10 21 R1202 10 31-GND 31
0201 14 17 CAM_D1N-A CCI_I2C_SDA1 11 20 20-MDN1 [3] LDM_ID1 0201 10-LCD_ID1(GND)

15_GND 15 16 16-MDP2
[12] [3,12] 11-SIO_SDA
11 20 CAM_D0N-A-2 [12] [9] LCM_PWM_CABC 11 30
R1288 15 16 CAM_D1P-A [3,12] CCI_I2C_SCL1 12 19 19-MDP1
11-LEDPWM 30-MIPI_D1N
TDN1_LCM [12]
0R
12-SIO_SCL
12 19 CAM_D0P-A-2 [12] [3,12] LCD_TE R1247 1K 12 29-MIPI_D1P 29
13-AGND 13 18 18-GND
R1246 0201 1K 13
12-TE

28 TDP1_LCM [12]
[12] VCM_AF_AVDD_2P8_20M 0201 13 18 [3,12] LCD_RESET

31

32
28-GND

14-CAMW_AVDD_2V7 14 17 17-MDN3 0201 14

13-RESET

27
R1287 14 17 CAM_D2N-A-2 [12] 14-GND 27-MIPI_D2N
TDN2_LCM [12]
15 16 16-MDP3 [5] 15 26
[12] CAM_AVDD_2P8
B1202
15_GND
15 16 CAM_D2P-A-2 [12]
ID3 for BL LED thermal detect [9]
ID3
16
15-NC 26-MIPI_D2P

25-GND 25
TDP2_LCM [12]
VREG_LEDA 17
16-LEDA

24

31

32
C1229 C1227 C1226 C1228 17-NC 24-AVEE(-5.5V)
VDISP_M_OUT [9]
C1232 C1203 C1213 C1215 18 23
BTB-30F_BAF04-30083-0500 [9] LED_SINK1 18-LEDK1 23-AVDD(+5.5V)

VDISP_P_OUT [9]
19 22-GND 22
10uF 1.0uF [9] LED_SINK2 20
19-LEDK2

21
1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 1.0uF 20-GND 21-VCI(NC)

C1216 C1214 NC
NC
BTB-30F_BAF04-30083-0500

43

44
C1220
1.0uF C1217
10uF NC C1204
1.0uF NC NC

C1219 C1201 C1218 C1202

100nF
EMI1201
3 2
[3] MIPI_CSI0_CLK_P CAM_CLKP-A [12]
4 1 CAM_CLKN-A [12]
[3] MIPI_CSI0_CLK_N
EMI1211
[3] MIPI_DSI0_LANE0_P 3 2
TDP0_LCM [12]
EMI1216 4 1
[3] MIPI_DSI0_LANE0_N TDN0_LCM [12]
3 2
[3] MIPI_CSI1_CLK_P CAM_CLKP-A-2 [12]
4 1
[3] MIPI_CSI1_CLK_N CAM_CLKN-A-2 [12]
EMI1202
3 2 [3,5,12] VREG_L11A_1P8
[3] MIPI_CSI0_DATA1_P CAM_D1P-A [12]
4 1
[3] MIPI_CSI0_DATA1_N CAM_D1N-A [12] EMI1212
EMI1217
3 2 TDP1_LCM [12] [3,12] LCD_TE
3 2 [3] MIPI_DSI0_LANE1_P
[3] MIPI_CSI1_DATA1_P CAM_D1P-A-2 [12] 4 1
4 1 CAM_D1N-A-2 [12] [3] MIPI_DSI0_LANE1_N TDN1_LCM [12]
[3] MIPI_CSI1_DATA1_N [3,12] LCD_RESET

[3,12] TP_INT_N
EMI1203 [3,12] TP_RESET_N
3 2
[3] MIPI_CSI0_DATA0_P CAM_D0P-A [12] EMI1218
4 1 EMI1213
[3] MIPI_CSI0_DATA0_N CAM_D0N-A [12] 3 2
[3] MIPI_CSI1_DATA0_P CAM_D0P-A-2 [12] 3 2 T1208 T1207 T1206 T1205 T1209
4 1 [3] MIPI_DSI0_LANE2_P TDP2_LCM [12]
[3] MIPI_CSI1_DATA0_N CAM_D0N-A-2 [12] 4 1
[3] MIPI_DSI0_LANE2_N TDN2_LCM [12]

EMI1204 EMI1219
[3] MIPI_CSI0_DATA2_P 3 2 3 2
CAM_D2P-A [12] [3] MIPI_CSI1_DATA2_P CAM_D2P-A-2 [12]
[3] MIPI_CSI0_DATA2_N
4 1 4 1
CAM_D2N-A [12] CAM_D2N-A-2 [12]
C [3] MIPI_CSI1_DATA2_N

3
EMI1214
2
C
[3] MIPI_DSI0_LANE3_P TDP3_LCM [12]
[3] MIPI_DSI0_LANE3_N 4 1
TDN3_LCM [12]

EMI1220
3 Module Sensor IC DOVDD DVDD AVDD AFVDD
EMI1205 [3] MIPI_CSI1_DATA3_P 2
4 1 CAM_D3P-A-2 [12]
3 2 [12] [3] MIPI_CSI1_DATA3_N CAM_D3N-A-2 [12]
[3] MIPI_CSI0_DATA3_P CAM_D3P-A AVDD AFVDD DW9763
4 1 Module Sensor IC DOVDD DVDD IMX486PQHS-C 1.8V 1.2V 2.7V-0.1+0.2
[3] MIPI_CSI0_DATA3_N CAM_D3N-A [12] 140mAMax EMI1215
DW9763 [3] MIPI_DSI0_CLK_P 3 2
IMX376-AAKHS-C 1.8V 1.05V 2.8V TCP_LCM [12]
140mAMax 4 1
[3] MIPI_DSI0_CLK_N TCN_LCM [12]

Front Camera Camera Power Flash Light

AW1203 to J1208
AW1204 to J1209
26

25

24-DGND
AW1205 to J1210
1-DGND 1 24
2 J1203 23 23-MCLK
[12] CAM_D0N-C 2-MDN0
CAM_MCLK1 [3]
3 22 22-DGND

1
3-MDP0

1
[12]

1
CAM_D0P-C
BB2R4-24KBJ03

4-MDN1 4 21 21-DVDD-1.05 J1208 J1209 J1210

[12] CAM_D1N-C CAM_DVDD_1.05 [12]
[12]
5-MDP1 5 20 20-DGND
CAM_D1P-C 6 19 19-SCL
[12] CAM_CLKN-C
6-MLKN CCI_I2C_SCL1 [3,12] Warm white
7-MLKP 7 18 18-SDA
CCI_I2C_SDA1 [3,12]
[12] CAM_CLKP-C 8 17 17-RST
8-DGND
CAM1_RST_N [3] [8] FLASH_LED2
[12] CAM_D2N-C 9-MDN2 9 16 16-DGND

[12] CAM_D2P-C 10-MDP2 10 15 15-DOVDD-1.8V

[3,5,12] VREG_BOB
VREG_L11A_1P8 [8] FLASH_LED1
[12] CAM_D3P-C 11-MDP3 11 14 14-AGND VREG_BOB
12-MDN3 12 13 13-AVDD-2.8V
[12] U1201 Cool white
[12] CAM_D3N-C CAM_AVDD_2P8_2 U1202
B1201
4 1
27

28

IN OK OUT VCM_AF_AVDD_2P8 [12] 4 1

IN OK OUT CAM_AVDD_2P8 [12]
C1211 C1210 C1212 C1205 [3] CAM_AF_VDD_EN 3
EN

GND

GND
3
[3] CAM_AVDD_EN EN

GND

GND
1.0uF 10uF 1.0uF T1201 T1202
1.0uF 1.0uF
B NC 1.0uF
B

5
NC

5
1.0uF C1206

0201
R1203
C1208

100K
1.0uF

0201
R1204

100K
C1207
C1209

VREG_BOB
EMI1206 U1205
VREG_BOB
3 2
[3] MIPI_CSI2_CLK_N CAM_CLKN-C [12]
[3] MIPI_CSI2_CLK_P 4 1 4 1
CAM_CLKP-C [12] U1203 IN OUT CAM_DVDD_1.05 [12]
OK
[8] FRONT_CAM_DVDD_EN 3 AW1201 to J1206
4 1 EN
AW1202 to J1207

GND

GND
IN OK OUT CAM_DVDD_1.2 [12]
3 1.0uF
[8] REAR_CAM_DVDD_EN EN
GND

GND

EMI1207 NC

1
3 2 1.0uF C1224 J1206
[3] MIPI_CSI2_DATA0_N CAM_D0N-C [12] 1.0uF J1207

0201
R1207
4 1 R1205

100K
[3] MIPI_CSI2_DATA0_P CAM_D0P-C [12] NC
2

1.0uF C1222 [8] FLASH_LED3 0402

C1225 0R
0201
R1206

100K

C1221
T1203

EMI1208
[3] MIPI_CSI2_DATA1_N 3 2
4 1 CAM_D1N-C [12]
[3] MIPI_CSI2_DATA1_P CAM_D1P-C [12]

Module Sensor IC DOVDD DVDD AVDD AFVDD

EMI1209 OLF0692(E7S) IMX376-AAJH5-C 1.8V 1.05V 2.8V

3 2
[3] MIPI_CSI2_DATA2_N CAM_D2N-C [12]
[3] MIPI_CSI2_DATA2_P 4 1
CAM_D2P-C [12]

VREG_BOB

VREG_BOB U1208

EMI1210 4 1 VCM_AF_AVDD_2P8_20M [12]

U1204 IN OUT
[3] MIPI_CSI2_DATA3_P 3 2
4 1 CAM_D3P-C [12] [3] CAM_AF_VDD_20M_EN 3
EN

GND

GND
[3] MIPI_CSI2_DATA3_N CAM_D3N-C [12] 4 1 CAM_AVDD_2P8_2 [12] 1.0uF
IN OK OUT 1.0uF

C1288
[3] REAR_CAM_DVDD_EN_2 3 NC C1289
EN

5
GND

GND

0201
R1289

100K
1.0uF
NC
2

C1230
0201
R1230

1.0uF
100K

C1231

A A
Schematic design notice of "63_PERI_CAMERA_KEYPAD" page.
Note 62-1: The VCC of I2C_0 is pulled to "VCAM_IO_PMU".

Note 62-2: I2C control interface of front camera (with AF) must be assigned to I2C-2
bus when PIP/VIV feature be supported.
COMPANY:

Note 62-3: Reserve a capacitor (27pF) on camera's MCLK and shunt it to GND to prevent GPS de-sense.
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 12
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Battery Connector SUB_FPC

TP42 TP13

TEST1.2

41
42
J1302
VBATT_CONN_VSNS_M [6] [9,11]
VBATT_CONN_VSNS_P
VBATT_CONN_ISNS_P
[6]
[6]
[11] HEADSET_MIC_P_S
1
2
3
40
39
38
MIC_BIAS1
CDC_IN1_M
[9]
[9]
OVP U1301
D VBATT_CONN_ISNS_M [6]
[9,11]
[9,11]
CDC_HPH_L

CDC_HPH_REF
4 37
CDC_IN1_P OVP_FPF2281
OUT cap share with C704 D
5 36 [13] VBUS B3 A2 USB_VBUS [6,7]
[9,11] CDC_HPH_R VREG_L16A_2P7 [5,13,14,18,19] IN OUT
C2 A3
6 35 IN OUT
PRX_TUNER_SW4 [3] C3 B2 R1305
[3] PRX_TUNER_SW5 IN OUT
7 34

0201
[3] HSJ_US_EURO_SEL PRX_TUNER_SW3 [3]
Note C1312

0201
8 33 R1310
Wide trace to RF PA [5,8,12,13,14] VREG_BOB PRX_TUNER_SW6 [3]
9 32 1uF_35V NC
T1301 change to DFN1610-2 0.01R/1%
VBATT
[5,10,13] VREG_L8A_1P8 HALL_EINT1 [3] 1M->300K R1
0805 [6] 10 31 [6]
R1307 [5] VSW_MOTO_P USB_CC2
1 A1
30 EN

5052704010
11 C1
10uF C1302 [5] VSW_MOTO_M AUDIO_SEL [3,11] OVLO
12 29 B1
ACOK

GND
GND
GND
Note
C1301 1.0uF C1303
T1301 13 28
2 The BPD comparator threshold is set at 95% of VREF_BAT_THERM
33pF 14 27
R2

A4
B4
C4
[11] SPKR_OUT_P [11] R1312

14

13
SPKR_OUT_M

0201
15 26 0201 VREG_L13A_1P8
7 6 BATT_THERM_BIAS [6] 16 25 R1311 NC_100K
VSENSE_P [11]

R1302
[11] VSENSE_M R1306 NC_10K
8
VBAT 5
GND

17 24 470K->39K 0201 ACOK [3]

18 23
[2,13] USB_HS_DM PRX_TUNER_SW2 [3]

0201
19 22
USB_HS_DP
4 ID 1 [2,13]
20 21
PRX_TUNER_SW1 [3]

10K
BATT_ID [6,13] USB_CC1 [6,11,13]
3
NTC 2
BATT_THERM [6,13] VOUT = VIN*(1+R1/R2)

43
44
12 9
T1303
T1304 Note: 1K R1 Min 1M
C1306 R1308
11
GND C1304 AVDD_BYP option is reserved for BMS accuracy improvement
[6] USB_HS_DP_PM 0201
BM25-4S 10
NC NC 1K VBUS
[6] USB_HS_DM_PM 0201

TP44
R1309
J1301
16

15
HALL-SEL

GND HALL-OUTPUT

[6,11,13] USB_CC1
Note:
Battery ID resistor value require 20K~150K,
[13] VBUS TP20
DRX_TUNER_SW0 [3]

TP38
NC
[2,13] USB_HS_DM TP19
VBUS
R1302 resistor value should be same as battery thermistor value at 25 degree

TP45
VREG_L8A_1P8 [2,13] USB_HS_DP TP18 DRX_TUNER_SW1 [3]

NC
VREG_BOB VREG_L16A_2P7
TP21

TP46
DRX_TUNER_SW2 [3]

NC
TP41
C1307
[6,13] BATT_ID TP25
C1308 C1310 100pF
C1309 TP40
100pF 100pF [6,13] BATT_THERM TP24
100pF
TP39

[5,10,13] VREG_L8A_1P8 TP23

TP37
NC
[3] FORCED_USB_BOOT TP22

TP43
NC
C C

Signal Description
SIM&SD Sider Key KPSNS0 Volume Up
SUB_LED
R1322 PM_RST_N Volume Down
VREG_L13A_1P8
0201
100K KYPD_PWR_N PWER_ON
R1317
0201
0R
UIM1_PRESENT [3] PM_RST_N + Hardware Reset
R1316 0R KYPD_PWR_N
0201 UIM2_PRESENT [3]

TP7

TP8

TP9
AW1302 AW1300
AW1303 AW1301 DEBUG_KEY_VOL_DOWN_N [13] Volume Down
R1301
C71 G1 0201 RESIN_N [5,13]

1
IO GND J1313 J1314 J1315 J1316 1K
G2
GND
VSIM2 C61 G3
VPP GND
G4
DEBUG_KEY_VOL_UP_N [13] Volume Up
0201 GND
C51 G5 R1303
10K GND GND
[3] UIM2_DATA G6 0201 KEY_VOL_UP_N [8]
R1321 GND
C31 G7 1K
[3] UIM2_CLK CLK GND
G8
GND
[3] UIM2_RESET C21 G9
RST GND DEBUG_PMIC_PKD_N [13]
GND
G10 Power On
C11 R1304
VCC
0201 KYPDPWR_N [5]
1K

VSIM1 C72
IO
R1320 10K C62
0201 VPP
SW1
DET-GND
C52
[3] UIM1_DATA GND
SW2
DET-SW
C32
[3] UIM1_CLK CLK
J1306
[3] UIM1_RESET C22
RST
C12 25 T1309
VCC HOLE1
26
HOLE2

T1318 T1322 J1304

T1316 T1324
SIM_CAF99-12136-1032 C1317
DEBUG_KEY_VOL_UP_N [13]
T1319
C1314 100nF
T1317 DEBUG_KEY_VOL_DOWN_N [13]
T1321 T1323 1.0uF
C1313
DEBUG_PMIC_PKD_N [13]
1.0uF

B T1313 T1314
T1315
B
RESIN_N [5,13]

C1305

10nF

D2S_L8866_NUT
AW1311 AW1305 AW1307
J1312 AW1304 AW1306

1
1
J1311 J1303 J1305 J1308 J1307

0R
0402
L1366
A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 13
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

M-Sensor CAD P_SENSOR

M-Sensor I2C Address: 0x0C
0 0X0C
1 0X0D
VREG_L14A_1P8 U1401

C1410 A1 A2 [3,14] VREG_L14A_1P8

VSS SCL I2C_SENSORS_SCL
VREG_L14A_1P8
2.2uF
B1 B2
VDD SDA I2C_SENSORS_SDA [3,14] C1403

0201
R1401
100K U1402 100nF
AK09918 LTR-579ALS-028WA

C1401
1 8
[3,14] I2C_SENSORS_SDA SDA VDD
100nF 2 7
[3] ALSP_INT_N INT SCL I2C_SENSORS_SCL [3,14]
OK
R1410 0R 3 6
0201 LDR GND
4 5
LED_K LED_A VREG_L3B_3P0

1.0uF

C1404

G+Gyro-Sensor RGB

[8]
RGB_RED
I2C_SENSORS_SDA [3,14]

I2C_SENSORS_SCL [3,14]

VREG_L14A_1P8

C C

14

13

12
U1403

R1403
SDX

SCX

CSB

0402
R1408 NC

10R
1 11
SDO OSDO(GND) 0201
R1409 NC
NC 2 10
VREG_L14A_1P8 0201 ASDX OSCB(GND) 0201
NC 3 9 R1407
0201 ASCX INT2 ACC_GYRO_INT2 [3]
R1406

VDDIO
4 8
[3] ACC_GYRO_INT1 INT1 VDD VREG_L3B_3P0

GND

GND

D1401
BMI120

7
C1406
VREG_L14A_1P8
1.0uF

C1405

100nF GND

GND

GND

IR

R1405 : 10R to 33 R
B1401 R1405
[3] FP_INT_N_1 VREG_BOB 0402
J1401 33R

VREG_L3B_3P0 R1411 1 2 0R
0201 1 10 C1407
R1412 1 2 NC IRQ RST_N FP_SUB_RESET [3] C1412
VREG_L16A_2P7 0201 2 9 LED1401
GND_HOST MOSI BLSP_SPI3_MOSI [3]
3 8 4.7uF
GND_HOST MISO BLSP_SPI3_MISO [3] NC IR
4 7
GND_HOST CS_N BLSP_SPI3_CS_N [3]
VREG_L13A_1P8 5 6 [3]
VDD1.8V SCLK BLSP_SPI3_CLK

T1403
T1411 T1405 T1406 T1407 T1404 T1402
T1408
1.0uF 1.0uF C1409

C1402 C1408 NC Q1401 T1409 T1410

PWM 38KHZ D 3

[3] R1402 0R 1 G
IR_LED_EN 0201
S 2 NC
B B
WNM2046-3/TR

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 14
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U1501-E

SDR-660-0-180WLPSP-TR-03-0

[19] DRX_HB1_B38_B41 141 46 PRX_HB1_B38_B41 [18]

DRX_HB1 PRX_HB1

[19] DRX_HB2_B7 133 54 PRX_HB2_B7 [17]

DRX_HB2 PRX_HB2

[19] DRX_HB3_B40 126 63 PRX_HB3_B40 [18]

DRX_HB3 PRX_HB3

D [19] DRX_HB4_B34 117 DRX_HB4 PRX_HB4 71 PRX_HB4_B34 [17]

D
U1501-B
110 DRX_UHB PRX_UHB 80
SDR-660-0-180WLPSP-TR-03-0

[19] DRX_MB1_B3 171 16 PRX_MB1_B3 [17]

DRX_MB1 PRX_MB1

[19] DRX_MB2_B39 164 25 PRX_MB2_B39 [18] GND_19 41

DRX_MB2 PRX_MB2
[19] DRX_MB3_B2 156 32 PRX_MB3_B2 [17] 99 21
DRX_MB3 PRX_MB3 GND_44 GND_9

[19] DRX_MB4_B1_B4 148 38 PRX_MB4_B1 [17] GND_10 22

DRX_MB4 PRX_MB4

179 DRX_LB1 PRX_LB1 7

170 15 GND_17 36
DRX_LB2 PRX_LB2

[19] DRX_LB3_B20 178 6 PRX_LB3_B20 [17] 49 GND_24

DRX_LB3 PRX_LB3

[19] DRX_LB4_B8 169 14 PRX_LB4_B8 [17] 58 GND_29 GND_20 42

DRX_LB4 PRX_LB4

[19]
DRX_LB5_B5_B26 177 5
DRX_LB5 PRX_LB5 PRX_LB5_B5_B26 [17]

101 86 67 GND_32 GND_28 56

DRX_LTEU_UHB PRX_LTEU_UHB

84 GND_36 GND_42 97

GND_54 128

C1527 0R 68 26 TX_CH0_HB1_LTE_B7_B38_B40_B41 [18] 98 GND_43 GND_57 134

0201 TX_FBRX_M TX_CH0_HB1

[18] TX_FBRX_P 60 TX_FBRX_P

33 TX_CH0_MB1_B1_B2_B3_B4_B34_B39 [18] 89 GND_37

TX_CH0_MB1
33pF
C1532 C1525 2.4nH 161 GNSS_IN TX_CH0_MB2 10 TX_CH0_MB2_DCS_PCS [18] 158 GND_66

TX_CH0_LMB 18
5.1nH

[21] GPS_SDR660 138 GND_58

C1526
2 [18] 116 GND_51
TX_CH0_LB1 TX_CH0_LB1_G850_G900

27 GND_56 131
TX_CH0_LB2 TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28 [18]
61 GND_30

TX_CH1_UHB 168

GND_59 139

167 34 GND_16
TX_CH1_HB

159 40 GND_18 GND_39 92

TX_CH1_MB

129 GND_55 GND_14 30

176 105 GND_47

TX_CH1_LTEU

C GND_35 79
C
109 GND_49 GND_31 62

125 GND_53 GND_22 45

140 GND_60 GND_15 31

155 GND_65 GND_12 24

163 GND_69

GND_6 17

172 GND_70

GND_11 23

12 GND_5
U1501-A

GND_61 145
SDR-660-0-180WLPSP-TR-03-0

19 GND_7

48 GND_23 GND_63 151

U1501-C
28 GND_13
SDR-660-0-180WLPSP-TR-03-0

GND_25 51

RFFE1_CLK 166 RFFE1_CLK [3] 20 GND_8 GND_33 76

0R C1571
VDDA_1P2_RX1 108 VREG_L7A_1P2 [5] RF_CLK2 0201 114 XO_IN RFFE1_DATA 149 RFFE1_DATA [3]

NC
VDDA_1P2_RX2 70
C1559 GND_26 52

0201
C1502
VREG_L2A_1P0 77 VDDA_1P0_RX1 VDDA_1P2_ANA0 75 120 W_GRFC_6 DNC_3 173
100nF 175 GND_72
VDD_ANALOG_1P0 C1564
37 VDDA_1P0_RX2 VDDA_1P2_ANA0 90 157 W_GRFC_7
C1505 4.7uF 160 GND_67

4.7uF 107 VDDA_1P0_XO VDDA_1P2_FBRX 85 136 W_GRFC_5

GND_62 147
C1504
GPIO78
165 DNC_2 WMSS_RESETN 83 WMSS_RESETN [3]
100nF Pin 43,37,107within
C1550 C1588 one group C1561 GND_68 162
43 VDDA_1P0_RX2
100nF 100nF 100nF 153 GND_64 GND_34 78
GPIO100
95 VDDA_1P0_RX [3] QLINK_ENABLE 143 QLINK_EN
GND_40 93
53 VDDA_1P0_RX2_1
GPIO99
VDDA_1P2_TX0 29 [3] QLINK_REQUEST 73 QLINK_REQ 100 GND_45 GND_21 44
C1551
144 VDDA_1P0_TX1
100nF
[21] GNSS_ELNA_CTRL 150 GNSS_ELNA_CTRL 4 GND_2
C1552 C1562
W_GRFC_0 57
100nF 100nF 174 GND_71
154 VDDA_1P0_RX0 66 DNC_1 W_GRFC_1 65 [18]
GRFC1_DPDT_SWITCH0
55 GND_27 GND_41 94

C1553 146 VDDA_1P0_GNSS VDDA_1P2_RX0 130 W_GRFC_2 74

180 GND_73 GND_46 102
100nF 132 VDDA_1P0_RX0_1 VDDA_1P2_RX0 137
8 GND_3
13 VDDA_1P0_TX0_1

B C1554
B
100nF

3 VDDA_1P0_TX0 VDDA_1P2_RX0_1 123 U1501-D

C1563
SDR-660-0-180WLPSP-TR-03-0
100nF
C1555

100nF

1 GND_1 QLINK_CLK_M 81 QLINK_CLK_M [3]

9 GND_4 QLINK_CLK_P 96 QLINK_CLK_P [3]

Pin 152,121,122within one group 152 VDDA_1P8_TX1

121 118 0R C1529

VDDA_1P8_ANA2 VDDD_1P0_QLINK 0201 VREG_L3A_1P0
QLINK_UL0_M 87 QLINK_TX_M [3]
C1565

:37
QLINK_UL0_P 72 QLINK_TX_P [3]

:36
C1556

11 9
100nF C1570

3- 40
22
-0 03
19 17
100nF 4.7uF

20 10
QLINK_DL0_M 88 QLINK_RX0_M [3]
VDDD_1P0 64
QLINK_DL0_P 103 QLINK_RX0_P [3]
11 VDDA_1P8_TX0 VDDD_1P0 82 C1566

35 142 100nF
VDDA_1P8_ANA1 VDDD_1P0
115 GND_50 QLINK_DL1_M 111 QLINK_RX1_M [3]
C1557
124 GND_52 QLINK_DL1_P 127 QLINK_RX1_P [3]
100nF
VDDD_1P8 112 0R C1568
0201
106 GND_48
VREG_L13A_1P8

91 GND_38 QLINK_DL2_M 135 QLINK_RX2_M [3]

:37
C1569
122 C1567

:36
VDDA_1P8_ANA2

11 9
119 QLINK_RX2_P [3]

3- 40
VDD_ANALOG_1P8

22
4.7uF QLINK_DL2_P
100nF

-0 03
VREG_L12A_1P8 69 VDDA_1P8_RX2

19 17
20 10
C1560 C1558
50 VDDA_1P8_FBRX Each QPHY pair shall be routed in a channel together
4.7uF 100nF ETDAC_CH0_M 47
59 VDDA_1P8_FBRX
ETDAC_CH0_P 39
isolated from other QPHY pairs with surrounding gnd
ETDAC_CH1_M 113

ETDAC_CH1_P 104

QPHY_ETDAC_TEST

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 15
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U1601

QET4101

C QFE4101 C

1 10
VPH_PWR VDD_BATT DNC1

9
DNC2

4.7uF

C1601
L1601
11 VPA_APT [18]
VSW
1uH

5
VOUT_LDO

12
VBAT_SW

C1602

10uF

8
GND_SW

4
VREG_L13A_1P8 VDD_1P8

C1603

1.0uF

6
USID

[3,18] RFFE5_DATA 2
SDATA
3
[3,18] RFFE5_CLK SCLK

7
GND

B B

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 16
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

TRX_B1_B3_B4
L1716 1.2nH
[18]
TX_B3_B4
TRX_B7 TX_B7 [18]

C1747
C1746
C1701

NC
NC 6.8nH
SAYEY2G53BA0F0A
L1712 33pF
D [18] TRX_B7
6
ANT TX
RX
3
1 33pF L1701 1.0nH
D
L1724

C1729
NC
PRX_HB2_B7 [15]

GND
GND
GND
GND
GND
L1715 3.3nH [18] C1735
TX_B1
U1705

8
7
5
4
2
QM25005
NC

C1736
C1707 C1745 close to SDR

2.2nH
2.4nH

B3_TX

GND

GND

B1_TX
C1719
NC GND
GND

GND GND NC

C1702
15 16
[18] TRX_B1_B3_B4
33pF L1729 GND GND
9 4
TRX_B1_B3_B4

ANT GND
10 3 22pF
L1714 33pF
GND GND L1711 1.2nH PRX_MB4_B1
C1739 11 2

B1_RX

B3_RX
C1738
[15]

GND

GND
NC
C1754

12

13

14

1
2.4nH
U1712
GND GND

2.7nH

C1718

22pF

close to WTR

L1702 33pF
L1727 1.2nH PRX_MB1_B3
[15]

C1733

C1759
2.4nH
NC
L1726 1.0nH TX_B8

TRX_B8
[18]

NC

C1756
C1710

22pF

C1755

NC
U1709 close to WTR
[18] L1709 33pF 6 3
TRX_B8 ANT TX L1710 33pF
1 L1731 18nH [15]
RX

C1743
C1744 PRX_LB4_B8

GND
GND
GND
GND
GND
SAYEY897MBA0B0A

8
7
5
4
2
6.8nH C1742

NC
GND
GND

TRX_B2_B25
1.2nH
TX_B2_B25 [18]

C C

C1751
L1718
C1750

NC

C1717
0201
NC

NC

NC
DUP/1814/B2/UNBALANCED/SAYEY1G88BA0B0A
[18] TRX_B2_B25
6 3 L1704 L1730
0201 ANT TX 33pF 1.5nH
0R L1734 1
PRX_MB3_B2 [15]
RX
C1705

GND
GND
GND
GND
GND

C1749 C1737
8
7
5
4
2

U1710
2nH
NC
GND
2.4nH

C1706

22pF

TRX_B5_B26 L1717 6.2nH

TX_B5_B26 [18]
PRX_B34
C1753

C1752

NC
NC

SAFFB2G01AA0F0A
4 1.5nH C1793 PRX_HB4_B34 [15]
L1703 PRX_B34 R1710 0R OUT
TRX_B5_B26 6 3 33pF 18nH L1728 0201 1 C1792 33pF
0201 ANT TX IN
[18] 0R L1735 1 PRX_LB5_B5_B26 [15] [18] 3
RX G

G
G
C1777 L1741
GND
GND
GND
GND
GND

C1748 U1711

2
5
C1703 U1706
C1734 1.8nH
8
7
5
4
2

NC
NC 5.6nH NC

0R
GND

DUP/1814/B5/UNBALANCED/SAYEY836MBA0F

0201
C1704

R1706
NC

B B

TRX_B12/17_B20
TX_B20
L1721 6.2nH
C1724

[18]

TRX_B41_120M
C1723

NC
NC

DUP/1814/B5/UNBALANCED/SAYEY836MBA0F

33pF L1707
6 3 18nH L1720 U1722
TRX_B20 0201 ANT TX
[18] 0R L1732 1 [15]
RX PRX_LB3_B20
B39262B8870L210
GND
GND
GND
GND
GND

C1722 C1715
U1701 C1721
L1756 L1791
NC 1 4 [18]
8
7
5
4
2

7.5nH TRX_B41 IN OUT SW_TRX_B41

[18]
GND
1.5nH 2 1.2nH
NC GND NC
NC
3
GND
C1790 C1796
5
C1716 NC GND

NC C1758

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 17
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

C1807
C1812 NC C1813 NC
100pF

L1887 1.8nH L1834 0R 4 3 L1823 1.8nH DRX_TUNER_ANT [19]

DRX_ANT L1802 1.8nH L1889 1.8nH 0201 1 2
[19] VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]
J1823 C1810
56nH L1824
L1814

NC

100K
C1806
C1811 NC C1899 NC [17]
C1856 TRX_B7
NC

0201
NC

L1839 C1841 [17]

NC PRX_B34
100pF TRX_B40 [18]
[3] [17] TRX_B1_B3_B4
ANT_CHECK
SW_TRX_B41 [17]

DPDT
[17] TRX_B2_B25
TX_B34_B39 [18]
2
1
3

RF3
GND
GND

QM11022 VREG_L16A_2P7 [5,13,14,18,19]

RF1
4 [18] TRX_B39_B41_B20 L1867

3.3nH
U1808
TX_CH0_LB1_G850_G900
GND C1843 [15]
5 4.02K TRX_B8 1.2nH
NC
[17]

0201
RF2 1nF
6 L1838
GND

RF4

C1866
CTL

VDD

C1868
10
TRX_B5_B26
[17]
8

9
7

J1809 L1827 0R
0201 L1869
TX_CH0_MB2_DCS_PCS
C1842

2
100pF

GND [15]

31

32

33

34

35

36

37

38

39
3 1 1.2nH

U1803
GND RF
4 NC NC
GND GRFC1_DPDT_SWITCH0 [15]

TRX7

TRX6

TRX5

TRX4

TRX3

TRX2

TRX1

GND

GND
30
TRX8

C1860
1 C1869 C1870

33pF
RFIN_L_OUT
C1824 1.8nH 29
0R J1801 TRX9
L1828 2

GND
0201 1 3 0201 RFIN_L
IN OUT 0R L1843 28
NC TRX10
2 1 L1815 3
U1806 RFIN_H
27

2
3 4 TRX11
4

NC
68nH
RFIN_H_OUT

NC
26 R1822 0R
TRX12 [3,16,18]
5 0201 RFFE5_CLK
SCLK
25
TRX13
L1801 24
RF5212A SDATA
6 RFFE5_DATA [3,16,18]

C1854
TRX14

C1853

C1896
C1801 7 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]
VIO VREG_L13A_1P8
NC 23
GND
NC 8
VRAMP 0201 33pF
22 R1811
ANT 100K
9
VCC 33pF C1802
21
GND C1803 C1872
10
VBATT
20
GND

CLP_OUT
11 100nF
GND

GND

GND

GND

GND

GND

GND
NC
C C

19

18

17

16

15

14

13

12
L1894 0R
0201 VPH_PWR [5,6,7,8,9,10,11,16,18]

C3309
C3308 4.7uF
100nF

TX_FBRX_P L1829 0R
0201 VPH_PWR [5,6,7,8,9,10,11,16,18]
[15]
NC NC
C3304 C3311 C3312
L1831 L1830 2.2uF
100nF 100pF

PRX_B41 33pF
L1810
PRX_HB1_B38_B41 [15]
1.5nH
L1846

C1859

PRX_B40 PA_THERM0 [5]

100K/1%_NTC
22pF

2
C1855
C1833

1
33pF 100nF
L1809
PRX_HB3_B40 [15]
1.8nH

B B

TX_B7
L1845

C1857 L1816 10pF

22pF TX_B7 [17]

NC NC

TRX_B40
C1823 C1826
C1839

L1888 33pF U1834 NC

33pF L1806
1 6
GND EN
LNA_PRX_B41_EN [3,19]
[5,13,14,18,19] VREG_L16A_2P7 2 5
VDD RFIN
33pF L1807 U1805
3 4
5

RFOUT GND
3
G

C1877 L1817 G
C1825 1 L1818
IN
4
1.2nH OUT
G

1nF NC 2.7nH
QM23040T
2

TRX_B40 [18]
C1850
C1848

C1827
NC
NC
NC

C1871 C1873 NC C1849

NC
NC
43

42

41

40

39

38

37

TRX_B41_PRX_B39
GND

HBRX2

HBRX1

GND

HB4

GND

HB3

36
GND
1
GND L1855 1.2nH
35
HB2
2
L1840 0R 33pF GND
TX_CH0_HB1_LTE_B7_B38_B40_B41 L1808 34
0201 GND
3
[15] RFIN_H
33 NC C1889
HB1
4 TRX_B41 [17]
RFFE5_DATA [3,16,18] NC
10

C1831 32
8
7
5
4
3
2

B34/39
5 L1819
SDATA
GND
GND
GND
GND
GND
GND
GND

NC 31
GND 6 HB L1813 1.2nH L1876 33pF
6
SCLK
VCC2
30 1.2nH 9 QM25011
ANT 1 B39_B41 TRX
RFFE5_CLK C1834 100pF 7 LB
C1832 100pF VIO VPA_APT TRX_B39_B41_B20[18]
[3,16,18] 29
VCC1 [16,18] NC NC
8 QM25011 NC C1844
VBATT VPA_APT [16,18]
9
RF5428 VCC2_2
28 33pF 100nF
1.0uF C1830 U1818 C1821 C1822
NC 100pF
27 C1862 NC
GND
VREG_L13A_1P8 10 C1835 [17]
NC C1818 4.7uF TRX_B20
C1815 100pF 26 TX_B3_B4 [17] C1817 C1819
[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] MB4
11
NC
25 TX_B1 [17]
MB3 10nH L1865 PRX_MB2_B39
12
RFIN_M
24 L1878 33pF [15]
GND
13
NC

RFIN_L
23
MB2 TX_B2_B25 [17]
14
GND
22
VPH_PWR GND
15
GND
MB1
LB4

LB3

LB2

LB1

LB5

[5,6,7,8,9,10,11,16,18]
L1866

4.7uF C1816 100pF U1804

16

17

18

19

20

21

100nF
A C1828 C1829 C1888
A
5

L1821 NC
NC GND

NC GND

L1822 33pF
6 4 TX_B34_B39 [18]
IN OUT
3.6nH
L1820
33pF

NC NC
3

TX_CH0_MB1_B1_B2_B3_B4_B34_B39 0R L1833 TX_B20 [17] NC

0201 NC
[15] C1836 U1807 C1804
C1837
C1805
C1840 TX_B8 [17]
33pF
NC

NC L1804
NC

TX_B5_B26 [17]

TX_B34_B39 COMPANY:
<Company Name>
C1847

C1846

TX_CH0_LB2_W5_W8_LTE_B5_B8_B20_B28 0R L1832 TITLE:

0201
[15]
C1838
DRAWN: DATED:
<Title>
NC <Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 18
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

J1944 J1902

J1933
J1922

J1923

0R
0402
C1936
DRX_SW
U1918

C1949 56nH
17 15 DRX_B39_B41 [19]
[5,13,14,18,19] VREG_L16A_2P7 VDD TRX1
14 DRX_B41 [19]

0R
[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] VREG_L13A_1P8 18 TRX2
VIO
13 DRX_B7 [19]
TRX3
J1904 12 [19]

0201
L1934 0R DRX_TUNER_ANT TRX4 DRX_B40
0402 33pF
D [18] DRX_ANT L1905 C1919 33pF C1906 C1989 9 TRX5
11 DRX_B34 [19] D

L1931
[18] 2 1 ANT
3 4 6 DRX_B5 [19]
100nF TRX6
100nF

0402
C1911 C1912 5 DRX_B8 [19]

0402
TRX7
C1924
NC NC MXD86A0S TRX8
4 DRX_B20 [19]
3 [19]

Tuner_MIPI C1968 NC TRX9 DRX_B2

3
2 DRX_B1_B3_B4 [19]
19 TRX10
SDATA

RFGND

RF

RFGND
NC [3] RFFE2_DATA
20 1
[3] SCLK NC
RFFE2_CLK 7
GND
8
1 GND
4 10
GND VIO VREG_L13A_1P8 C1967 C1928 GND
6 16
DS32CK503R GND
[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] GND
5
NC C1927 21
NC 2 100pF
C1959 SW-DIV-SP10T_RF1660TR7
SDATA
SETID

100pF
SCLK

NC
U1925
7

330R
0201 RFFE4_DATA [3]
L1988
L1990
0201 RFFE4_CLK [3]
0R

C1918

10pF

B1_B3_B4_DRX
U1914 B39212B9926P810

[19] DRX_B1_B3_B4
L1907 33pF HB 6 L1914 33pF L1927 1.5nH DRX_MB4_B1_B4
1 [15]
IN
LB 9
B7_DRX
G
G
G
G
G
G
G

C1920 C1944
U1910
2
3
4
5
7
8
10

NC 3.3nH
L1921 33pF
[19] DRX_B7 1 4 L1901 1.2nH
0201 INPUT OUTPUT DRX_HB2_B7 [15]

C1933
0R L1933

GND

GND

GND
NC
C1923

2
33pF SAFFB2G65AA0F0A
L1917

2.4NH
C1941
33pF 1.5nH
L1926 DRX_MB1_B3 [15]

GND C1902

C1945 33pF
2.4nH
C C

C1921

33pF

DRX_B34
U1928
[19] L1903 33pF L1923 1.2nH
DRX_B34 4
OUT [15]
L1930 0R 1 DRX_HB4_B34
0201 IN

C1931
G 3

G
G
2
5
B2_DRX SAFFB2G01AA0F0A

C1934
2.4nH

NC
GND

C1913

22pF
U1919

L1944 33pF L1943 33pF 1.5nH

[19] DRX_B2 1 4 L1942 DRX_MB3_B2 [15]
IN1 OUT1
GND

GND
GND

C1965
C1964
2

3
5

NC 2.4nH

C1966 B40_DRX
33pF U1906

[19] L1925 33pF

0R L1937 1 4 1.0nH
DRX_B40 0201 INPUT OUTPUT L1920 [15]
DRX_HB3_B40

GND

GND

GND
NC
SAFFB1G90KA0F0A C1946

2
1.8nH

C1942
C1926

GND
33pF

B B
B5_DRX B39_B41_DRX
33pF L1902 1.5NH
L1922 DRX_MB2_B39
[15]

U1929
C1935 2.4nH

LB 6
U1915 [19] DRX_B39_B41 0201 1 IN
0R L1936

NC
SAFFB876MAA0F0A HB 9
C1905

G
G
G
G
G
G
G
L1908 33pF
1 4 18nH 33pF
GND
GND
GND

[19] DRX_B5 IN1 OUT L1924

2
3
4
5
7
8
10
DRX_LB5_B5_B26
[15]

C1940
SAWFD1G90AB0F0A
2
5
3

C1908 C1948

NC NC NC C1997 NC C1998

L1918 33pF 1.0nH

L1919
DRX_HB1_B38_B41 [15]
L1978

33pF 2.4NH
C1947

C1995
[19] TO_DRX_B41 NC C1987
33pF C1925
4 3
GND RFOUT
33pF
5 2
RFIN VDD
6 1

B8 DRX U1913
[3,18] LNA_PRX_B41_EN EN

U1934
GND

L1915 33pF 15nH

[19] DRX_B8 1 IN OUT 4 L1910 DRX_LB4_B8 [15]
VREG_L16A_2P7 [5,13,14,18,19]
2 GND
C1907 3 GND
C1943
NC GND 5
NC

SAFFB942MAN0F0AR15

L1979 DRX_B41_120M
SAFFB2G65AA0F0A
NC
4 TO_DRX_B41 [19]
[19] OUT
DRX_B41 0201 1
0R L1991 IN
NC G 3

NC
G
G
2
5
U1911

A A
C1986

C1915
B20 DRX U1908
33pF
L1911 33pF L1989 18nH L1913
[19] DRX_B20 1 IN OUT 4 DRX_LB3_B20
[15]
2 GND
C1914 3 GND
NC GND 5 C1929
NC COMPANY:
SAFFB942MAN0F0AR15 <Company Name>
L1980
NC TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 19
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U2001-A

WCN-3980-0-82BWLPSP-TR-0B-0

U2001-B

WL_RFI_5G_CH0 75 [21] WL_RFI_5G_CH0

WCN-3980-0-82BWLPSP-TR-0B-0

[3] WL_BB_IP_RX 53 10 0R C2036

WL_BB_IP_RX WP_IF 0201 U2001-C

WL_RFO_5G_CH0 68 [21] WL_RFO_5G_CH0 WCN-3980-0-82BWLPSP-TR-0B-0

[3] WL_BB_IN_TX 73 36 SLEEP_CLK [2,5]

WL_BB_IN_TX LF_CLK_IN
C2006 56pF SENS_TXD 3 SENS_TXD [3]SDM SSC_13
[3] WL_BB_IP_TX 80 WL_BB_IP_TX
C2005
22pF 23
[3] 0R C2027 [3] SENS_RXD SENS_RXD [3] SDM SSC_12
WL_BB_QN_RX 59 WL_BB_QN_RX CLK_OUT 69 0201 WLAN_5G_CLK_OUT
GND_XTAL 38
[3] 0R C2028 COEX_TXD 70 COEX_TXD [3]SDM GPIO82
WL_BB_QP_RX 52 WL_BB_QP_RX WL_CMD_DATA_CH0 17 0201 WL_CMD_DATA_CH0 [3]
SDM GPIO19
[3] CTS GND_PM 65
WCN3980 0R C2029 64 CTS COEX_RXD 57 COEX_RXD [3]
SDM GPIO81

WL_CMD_CLK_CH0 9 0201 WL_CMD_CLK_CH0 [3]

74 GND_WL_5G_DRV_CH0 GND_PDET 28
31 WL_BT_FEM_0
WL_RF_PDET_IN 27 WL_RF_PDET_IN_CH0 XTALI 44
XTALI [20]
15 GND_DPD_CH0 41
[21] WL_BT_RFIO_2G_CH0 42 37 SW_CTRL WLAN_SW_CTRL [5,8] SDM GPIO5
WL_BT_RFIO_2G_CH0 XTALO
SDM GPIO16
25 16
WL_BB_QN_TX 72 WL_BT_FEM_3 RXD RXD [3]
WL_BB_QN_TX [3]

[3] WL_BB_QP_TX 79
11 WL_BT_FEM_2 RTS 50 RTS [3] SDM GPIO18

WL_BB_QP_TX 7
FM_RX_HEADSET 8 20 GND_FM_VCO GND_BT_SYNTH 19
[21] LNA_EN_5G_CH0 39 WL_BT_FEM_1 TXD TXD [3] SDM GPIO17

6 GND_FM_RXFE
WL_BB_IN_RX 40 GP_EN
[3] 60 WL_BB_IN_RX
51 GND_WL_SYNTH_CH0 GND_WL_5G_RXFE_CH0 81
SB_CLK 22 SB_CLK [3]

67 GND_WL_5G_PA_CH0 GND_WL_BB_CH0 66
14 GP_IN SB_DATA 63 SB_DATA [3]
62 71 VREG_L19A_3P3 [5,20]
76 COEX_CLK [3] GND_WL_BALUN_CH0 VDD33_PM_DLDO
COEX_CLK
45 WL_BT_FEM_4 54 61 VREG_L19A_3P3 [5,20]
77 [3] GND_WL_2G_PA_CH0 VDD33_WL_5G_DRV_CH0
COEX_DATA COEX_DATA
48 GND_WL_BT_DRV_VH0 GND_ESD_0 47
13 GP_OUT
35 GND_WL_BT_RXFE_CH0 VDD33_WL_CH0 55 VREG_L19A_3P3 [5,20]
C [21] PA_EN_5G_CH0 58 WL_BT_FEM_5
C
30 GND_DIG GND_SEALRING3 78

24 GND_ISO VDD18_IO 56 VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]

VDD13_FM 12 VREG_L6A_1P3 [4,5,20]

VDD13_BT_BB_WL 26
VREG_L6A_1P3 [4,5,20]

VDD13_BT_FM_BBPLL 4 VREG_L6A_1P3 [4,5,20]

WCN3980

18 GND_BT_FM_BBPLL_A VDD33_WL_BT_DRV_CH0 34 VREG_L19A_3P3 [5,20]

21 GND_GP VDD33_FEM 2 VREG_L19A_3P3 [5,20]

49 GND_IO GND_SEALRING1 82

GND_BT_BB 33

43 VDD11D_PM [20]
VDD11D_PM

VDD13_PM 29 VREG_L6A_1P3 [4,5,20]

GND_SEALRING2 1

VDD13_WL_SYNTH_CH0 46 VDD13_WL_SYNTH_CH0 [20]

VDD13_BT_SYNTH 5 VREG_L6A_1P3 [4,5,20]

VDD18_XTAL 32 VREG_L9A_1P8 [4,5,20]

XTALI [20]

C2007 100pF [5]

RF_CLK1

WCN3980

1.3V_RFA
B VREG_L6A_1P3
[4,5,20]
0R
0201
C2026
VDD13_WL_SYNTH_CH0 [20] Pin 46 B
10nF
3.3V CH0
C2009 12,17
Pin 55
C2023
[5,20] VREG_L19A_3P3 C2019 VREG_L19A_3P3 [5,20] 1.8V IO
VREG_L13A_1P8 [2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20]
4.7uF C2002
VREG_L6A_1P3 [4,5,20] Pin 5 10nF
[2,3,4,5,6,7,8,9,10,11,13,14,15,16,18,19,20] VREG_L13A_1P8 VDD18_IO
C2012 4.7uF C2015
C2011
10nF Pin 94
10uF 4.7uF 470nF
C2022

VREG_L19A_3P3 [5,20]
VREG_L6A_1P3 [4,5,20] Pin 34
Pin 29 C2013 1.8V XO VDD18_XTAL
10nF
10nF
[10] [10] Pin 40
C2008 VREG_L9A_1P8 [4,5,20]
C2018
VREG_L9A_1P8
[4,5,20]
C2017 470nF
VREG_L19A_3P3 [5,20] Pin 61
C2021 2.2uF
VREG_L6A_1P3 [4,5,20] C2045
Pin12
1.0uF
10nF 100pF

C2014
VREG_L19A_3P3 [5,20] Pin 71
C2010
C2046
10nF
[4,5,20] 100pF
VREG_L6A_1P3 Pin 4
1.1V
VREG_L6A_1P3 [4,5,20]Pin 26 Pin 2
VREG_L19A_3P3 [5,20] VDD11D_PM [20]

10nF C2020
10nF C2001
C2024 1.0uF
C2016 1.0uF

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 20
OF 22
TO ANY OTHER GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

High rejection saw

GPS U2115
C2101 NC

U2123

F6QA1G582H2JM
C2104

L2110
NC

U2107 L2112 22pF 15pF

1 6 1 4 GPS_SDR660 [15]
F6QA1G582H2JM GND RFOUT UNB UNB
2 5
GND EN
C2136 0R 1 4 C2142 6.8nH 3 4 NC 2 5
[21] GPS_IN 0201 UNB UNB RFIN VDD GND GND
C2148 3
GND
2 5 AW5005DNR
GND GND
NC
NC 3
NC GND
C2132
C2137
C2133
GNSS_ELNA_CTRL [15]

C2166 0R
0201 VREG_L12A_1P8 [5,15]

NC NC

C2125 C2150

C C

used for connect to ground GPS_2G_5G_ANT

J2111
J2116
J2117

TP2012-A1255BA
U2106

J2105

C2102 0R C2103 0R C2108 0R

0201 0201 0201 2 6 TRIP_5G_ANT [21]
2 1 CP HFP
3 4 C2131
C2152 C2130 4 TRIP_2G_ANT [21]
C2151 MFP
NC
NC NC 1 GND1 LFP 8 GPS_IN [21]
NC
3 GND2
5 GND3
7 GND4

B B

2G_5G_WLAN_FEM

0R C2106 0R C2105 WL_RFO_5G_CH0 [20]

0201 0201
C2107
0201
NC

U2109
NJG1801K75

2 GND P1 1 0.6nH 18pF

C2141 C2109 [20]
[20] LNA_EN_5G_CH0 6 CTRL1 P2 3 WL_RFI_5G_CH0

[20] PA_EN_5G_CH0 4 CTRL2 PC 5

C2129

NC

885067
C2146 33pF 1.5nH C2135 4.3pF
4 C2140 18pF
OUT TRIP_2G_ANT [21]
WL_BT_RFIO_2G_CH0 1 TRIP_5G_ANT
C2139 IN 3 C2115
[20] G C2114 [21]
G
G

C2126 C2124 C2128

U2110 NC C2127
2
5

NC NC 2.2nH NC
NC

A A

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: CAD NOTE: VIA DIRECTLY TO MAIN GND. DON'T CONNECT
SHEET: 21
OF 22
TO ANY OTHER GND
 SH2201
D2S_L8866_BB_CPU_BASE SH2202
D2S_L8866_RFPMU_SHIELDING

1 1

SH2206
SH2207 SH2208
SH2205 D2S_L8866_WCN_SHIELDING D2S_L8866_SMB_SHIELDING D2S_L8866_APT_SHIELDING
SH2203 SH2204 D2S_L8866_PMU_SHIELDING
D2S_L8866_RF_BASE D2S_L8866_AUPA_SHIELDING
1 1 1
1
1 1