New Chapter 2 Micro Architecture
New Chapter 2 Micro Architecture
CHAPTER 2
MICROCONTROLLER
ARCHITECTURE
PENSYARAH:
• First family:
PIC10 (10FXXX) called Low End
• Second family:
PIC12 (PIC12FXXX) called Mid-Range
• Third family:
PIC16 (16FXXX)
• Fourth family:
PIC 17/18 (18FXXX)
• Speed :
When operated at its maximum clock rate a PIC executes most of its
instructions in 0.2 µs or five instructions per microsecond.
• Instruction set Simplicity :
The instruction set is so simple that it consists of only just 35 instructions
• Integration of operational features:
Power-on-reset (POR) and brown-out protection ensure that the chip
operates only when the supply voltage is within specifications. A watch
dog timer resets the PIC if the chip malfunctions or deviates from its
normal operation at any time.
• Programmable timer options:
Three timers can characterize inputs, control outputs and provide
internal timing for the program execution.
• Interrupt control:
Up to 12 independent interrupt sources can control then the CPU deal
with each sources.
D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB
• EXAMPLE : MOVLW Instruction
MOVLW 25H;
In the instruction, MOVLW , the letter L ( Literal ) comes first and then the
letter W ( WREG ), which means “move a literal value to WREG” to the
destination. Which is load the 25H of literal value to WREG register.
MOVLW 25H; move value 25H into WREG
MOVLW 25H;
ADDLW 34H;
WHAT DO YOU UNDERSTAND?
• File register
- The file register is read/write memory used by the CPU for data
storage, scratch pad, and registers for internal use and functions.
- The memory of the PIC is divided into a series of registers. Each of
the registers has its own address and memory locations.
- These addresses are normally denoted by using hexadecimal
numbers.
- According to the type of working and usage, the registers in PIC
are classified into two categories.
1. Special Function Registers (SFR)
2. General-Purpose Registers (GPR) or General Purpose RAM
(GP RAM)
1.Special function register (SFRs)
For example, CLRF STATUS will clear the upper-three bits and set the
Z bit. This leaves the STATUS register as 000u u1uu (where u =
unchanged).
Bit 7
IRP - Bit selects register bank. It is used for indirect addressing.
1 - Banks 0 and 1 are active (memory locations 00h-FFh)
0 - Banks 2 and 3 are active (memory locations 100h-1FFh)
Bit6 , Bit5
RP1,RP0 - Bits select register bank. They are used for direct
addressing.
Bit4
TO - Time-out bit.
1 - After power-on, after executing the CLRWDT
instruction which resets the watch-dog timer or
the SLEEP instruction which sets the microcontroller
into low-consumption mode.
0 - After watch-dog timer time-out has occurred.
Bit3
PD - Power-down bit.
1 - After power-on or after executing the CLRWDT
instruction which resets the watchdog timer.
0 - After executing the SLEEP instruction which sets the
microcontroller into low-consumption mode.
Bit2
Z – zero bit
1- the result of an arithmetic or logic operation is zero
0 - the result of an arithmetic or logic operation is not zero
Bit1
DC – Digit carry / borrow
1- A carry out from the 4th low order bit of the result occurred
0 - No carry out from the 4th low order bit of the result
Bit0
C- carry / borrow
1- A carry out from the most significant bit of the result occurred
0 - No carry out from the most significant bit of the result
occurred
TRY YOUR BEST!!!!
Show the status of the C , DC and Z flags after the addition of 38H and 2FH in the
following instruction:
MOVLW 38H
ADDLW 2FH ; ADD 2FH TO WREG
UNDERSTAND !!!
bit 7:
bit 3:
IRP: Register Bank Select bit (used for indirect addressing) PD: Power-down bit
0 = Bank 0, 1 (00h - FFh) 1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
1 = Bank 2, 3 (100h - 1FFh)
The IRP bit is not used by the PIC16F8X. IRP should be maintained clear. bit 2:
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
bit 6-5: 0 = The result of an arithmetic or logic operation is not zero
RP1:RP0: Register Bank Select bits (used for direct addressing) bit (for ADDWF and ADDLW instructions) (For borrow the polarity is reversed)
00 = Bank 0 (00h - 7Fh)
bit 1:
01 = Bank 1 (80h - FFh) DC: Digit carry/borrow
10 = Bank 2 (100h - 17Fh) 1 = A carry-out from the 4th low order bit of the result occurred
11 = Bank 3 (180h - 1FFh) 0 = No carry-out from the 4th low order bit of the result
bit (for ADDWF and ADDLW instructions)
Each bank is 128 bytes. Only bit RP0 is used by the PIC16F8X. RP1 should be maintained clear.
bit 0:
C: Carry/borrow
bit 4:
1 = A carry-out from the most significant bit of the result occurred
TO: Time-out bit 0 = No carry-out from the most significant bit of the result occurred
1 = After power-up, CLRWDT instruction, or SLEEP instruction Note: For borrow the second operand the polarity is reversed. A subtraction is executed by
0 = A WDT time-out occurred adding the two’s complement of. For rotate (RRF, RLF) instructions, this bit is loaded with either
the high or low order bit of the source register
IQ TEST