EXPERIMENT 6: LOGIC GATES

AIM:

To study and verify the Truth Tables of AND, OR, NOT, NAND, NOR, EXOR, EXNOR

logic gates

COMPONENTS REQUIRED:

1. Resistor = 500 Ჲ

2. Switch (SPST)

3. LED = 1

4. Power supply (VCC) = 2

5. Ground

6. TTL = 7432N (OR), 7408N (AND), 7404N (NOT), 7402N (NOR), 7437N (NAND),

7486N (EXOR)

THEORY:

AND, OR and NOT gates are basic gates. XOR and XNOR are universal gates. Logic

gates are electronic circuits because they are made up of number of electronic devices and

components. Inputs and outputs of logic gates can occur only in two levels. These two levels

are term HIGH and LOW, or TRUE and FALSE, or ON AND off, OR SIMPLY 1 AND 0. A

table which lists all possible combinations of input variables, and the corresponding outputs

is called a truth table. It shows how the logic circuits output responds to various combinations

of logic levels at the inputs.

An AND gate has two or more inputs but only one output. The output assumes the

logic 1 state only when each one of its inputs is at logic 1 state. The output assumes logic 0

state even if one of its input is at logic 0 state. AND gate is also called an all or nothing gate.

The symbol for AND operation is ‘.’.

With input variables A & B the Boolean expression for output can be written as: X = A.B

OR GATE:

Like an AND gate, an OR gate may have two or more inputs but only one output. The

output assumes the logic 1 state, even if one of its inputs is in logic 1 state. Its output assumes

logic 0 state, only when each one of its inputs is in logic 0 state. OR gate is also called an any

or all gates. It can also be called an inclusive OR gate because it includes the condition the

input can be present.

With input variables A & B the Boolean expression for output can be written as: X = A + B

NOT GATE:

A NOT gate is also known an inverter, has only one input and only one output. It is a

device whose output is always the complement of its input. That is the output of a not gate

assumes the logic 1 state when its input is in logic 0 state and assumes the logic 0 state when

its input is in logic 1 state.

The symbol for NOT operation is ‘-‘(bar).

With input variable A the Boolean expression for output can be written as: X=Ā

NAND GATE:

NAND gate is universal gate. It can perform all the basic logic function. NAND

means NOT AND that is, AND output is NOTed.so NAND gate is combination of an AND

gate and a NOT gate. The output is logic 0 level, only when each of its inputs assumes a logic

1 level. For any other combination of inputs, the output is logic 1 level. NAND gate is

equivalent to a bubbled OR gate.

NOR GATE:

NOR gate is universal gate. It can perform all the basic logic function. NOR means

NOT OR that is, OR output is NOTed.so NOR gate is combination of an OR gate and a NOT

gate. The output is logic 1 level, only when each of its inputs assumes a logic 0 level. For any

other combination of inputs, the output is logic 0 level. NOR gate is equivalent to a bubbled

AND gate.

With input variables A & B the Boolean expression for output can be written as: A + B

EXCLUSIVE-OR (X-OR) GATE:

An X-OR gate is a two input, one output logic circuit, whose output assumes a logic 1

state when one and only one of its two inputs assumes a logic 1 state. Under the condition
when both the inputs are same either 0 or 1, the output assumes a logic 0 state. Since an X-

OR gate produces an output 1 only when the inputs are not equal, it is called as an anti-

coincidence gate or inequality detector. The output of an X-OR gate is the modulo sum of its

two inputs.

The symbol for X-OR operation is ⊕.

With input variables A & B the Boolean expression for output can be written as: X= A ⊕B

EXNOR GATE:

The XNOR gate is the complement of the XOR gate. It is a hybrid gate. Simply, it is

the combination of the XOR gate and NOT gate. The output level of the XNOR gate is high

only when both of its inputs are the same, either 0 or 1. The symbol of the XNOR gate is the

same as XOR, only complement sign is added. Sometimes, the XNOR gate is also called

the Equivalence gate.

With input variables A & B the Boolean expression for output can be written as: X= A ⊕B
OUTPUT VERIFICATION:

1. OR GATE:

A B A+B

0 0 0

0 1 1

1 0 1

1 1 1

MULTISIM CIRCUIT FOR OR CIRCUIT:

2. AND GATE:

A B A.B

0 0 0

0 1 0

1 0 0

1 1 1

MULTISIM CIRCUIT FOR AND CIRCUIT:

3. NOT GATE:
 A Ā

0 1

1 0

MULTISIM CIRCUIT FOR NOT CIRCUIT:

4. NOR GATE:

A B A+B

0 0 1

0 1 0

1 0 0

1 1 0

MULTISIM CIRCUIT FOR NOR CIRCUIT:

5. NAND GATE:

A B A.B

0 0 1

0 1 1

1 0 1

1 1 0
MULTISIM CIRCUIT FOR NAND CIRCUIT:

6. EXOR GATE

A B A⊕B

0 0 0

0 1 1

1 0 1

1 1 0

MULTISIM CIRCUIT FOR EXOR CIRCUIT:

7. EXNOR GATE

A B A⊕B

0 0 1

0 1 0

1 0 0

1 1 1

MULTISIM CIRCUIT FOR EXNOR CIRCUIT:

EXTRA TASK:
SOLVE THE FOLLOWING BOOLEAN EQAUTIONS, TABULATE THE TRUTH

TABLE AND VERIFY IT BY DESIGNING THE LOGIC GATE CIRCUIT IN

MULTISIM.

1. [(Ā+B) . (C+D)]

2. (A⊕B) + (C.D)

INFERENCE:

The logic gates were designed in multisim and the corresponding truth tables were verified.