Northern Technical University

Technical College of Engineering / Mosul

Electrical Power Technology Engineering

Symmetrical Fault Analysis

Prepared by
Wissam Sami Mohammed

Fault Analysis:
1
 Under normal conditions, a power system operates under balanced conditions
with all equipments carrying normal load currents and the bus voltages
within the prescribed limits. This condition can be disrupted due to a fault in
the system. A fault in a circuit is a failure that interferes with the normal flow
of current. A short circuit fault occurs when the insulation of the system fails
resulting in low impedance path either between phases or phase(s) to ground.
This causes excessively high currents to flow in the circuit, requiring the
operation of protective equipments to prevent damage to equipment. The
short circuit faults can be classified as:

• Symmetrical faults

• Unsymmetrical faults

Symmetrical faults:
A three phase symmetrical fault is caused by application of three equal fault
impedances Z¯f to the three phases, as shown in Fig. 4.39. If Z¯ f = 0 the fault
is called a solid or a bolted fault. These faults can be of two types: (a) line to
line to line to ground fault (LLLG fault) or (b) line to line to line fault (LLL
fault). Since the three phases are equally affected, the system remains
balanced. That is why, this fault is called a symmetrical or a balanced fault
and the fault analysis is done on per phase basis. The behaviour of LLLG
fault and LLL fault is identical due to the balanced nature of the fault. This is
a very severe fault that can occur in a system and if Z¯ f = 0, this is usually the

most severe fault that can occur in a system. Fortunately, such faults occur
infrequently and only

about 5% of the system faults are three phase faults.

2
 Symmetrical or Balanced three phase fault analysis:
In this type of faults all three phases are simultaneously short circuited. Since
the network remains balanced, it is analyzed on per phase basis. The other
two phases carry identical currents but with a phase shift of 120○ . A fault in
the network is simulated by connecting impedances in the network at the fault
location. The faulted network is then solved using Thevenin’s equivalent
network as seen from the fault point. The bus impedance matrix is convenient
to use for fault studies as its diagonal elements are the Thevenin’s impedance
of the network as seen from different buses. Prior to the occurrence of fault,
the system is assumed to be in a balanced steady state and hence per phase
network model is used. The generators are represented by a constant voltage
source behind a suitable reactance which may be sub-transient, transient or
normal d-axis reactance. The transmission lines are represented by their π-
models with all impedances referred to a common base. A typical bus

of an n- bus power system network is shown in Fig. 4.41. Further, a balanced

three phase fault, through a fault impedance Z¯ f is assumed to occur at k th
bus as shown in the figure. A pre-fault load flow provides the information
about the pre-fault bus voltage. Let [V¯ BUS(0)] be the prefault bus voltage
vector =[V¯ 1(0) . . . Vk(0) . . . Vn(0)] T p.u. The fault at k th bus through an

3
 impedance Z¯ f will cause a change in the voltage of all the buses [∆V¯ BUS]
due to the flow of heavy currents through the transmission lines. This change
can be calculated by applying a voltage V¯ k(0) at k th bus and short
circuiting all other voltage sources. The sources and loads are replaced by
their equivalent impedances. This is shown in Fig. 4.42. In Fig. 4.42, Z¯ i

and Z¯ k are the equivalent load impedances as bus i and k respectively, z¯ik
is the impedance of line between i th and k th buses. x¯di is the appropriate
generator reactance, Z¯ f is the fault impedance, ¯Ik(F) is the fault current
and V¯ k(0) is the prefault voltage at k th bus. From the superposition
theorem, the bus voltages due to a fault can be obtained as the sum of prefault
bus voltages and the change in bus voltages due to fault,i.e.,

[V¯ BUS(F)] = [V¯ BUS(0)] + [∆V¯ BUS]

where, [V¯ BUS(F)] = Vector of bus voltages during fault =[V¯ 1(F) . . . V¯
i(F) . . . V¯ n(F)] T [V¯ BUS(0)] = Vector of pre-fault bus voltages =[V¯
1(0) . . . V¯ i(0) . . . V¯ n(0)] T [∆V¯ BUS] = Vector of change in bus voltages
due to fault= [∆V¯ 1 . . . ∆V¯ k . . . ∆V¯ n] T Also the bus injected current
[¯IBUS] can be expressed as,

4
 [¯IBUS] = [Y¯ BUS] [V¯ BUS]

where, [V¯ BUS] is the bus voltage vector and [Y¯ BUS] is the bus admittance
matrix. With all the bus currents, except of the faulted bus k, equal to zero,
the node equation for the network of Fig. 4.42 can be written as

As the fault current ¯Ik(F) is leaving the bus it is taken as a negative current
entering the bus. Hence,

[¯IBUS(F)] = [Y¯ BUS] [∆V¯ BUS]

[∆V¯ BUS] can be calculated as:

[∆V¯ BUS] = [Y¯ BUS] −1 [¯IBUS(F)] = [Z¯BUS] [¯IBUS(F)]

where, [Z¯BUS] is the bus impedance matrix = [Y¯ BUS] −1 . Substituting the
expression of [∆V¯ BUS] from equation (4.68) in equation (4.64) one can
write,

[V¯ BUS(F)] = [V¯ BUS(0)] + [Z¯BUS(F)] [¯IBus(F)]

Expanding the above equation one can write,

5
 The bus voltage of k th bus can be expressed as:

V¯ k(F) = V¯ k(0) − Z¯ kk ¯Ik(F)

For a bolted fault Z¯ f = 0 and hence, V¯ k(F) = 0. Thus the fault current
¯Ik(F) for bolted fault can be expressed using equation (4.71) as,

¯Ik(F) = V¯ k(0) / Z¯ kk

For faulty with non-zero fault impedance Z¯ f , the fault current can be
calculated as:

¯Ik(F) = V¯ k(0) / Z¯ kk + Z¯ f

The quantity Z¯ kk in equation (4.73) and equation (4.74) is the Thevenin’s

impedance or opencircuit impedance of the network as seen from the faulted
bus k. From equation (4.70), the bus voltage after fault for the unfaulted or
healthy buses can be written as:

V¯ i(F) = V¯ i(0) − Z¯ ik Z¯ kk + Z¯ f V¯ k(0) V¯ i(F) = V¯ i(0) − Z¯ ik ¯Ik(F)

∀i = 1, 2,⋯n, i ≠ k

Substituting ¯Ik(F) from equation (4.73) , V¯ i(F) can be expressed as:

V¯ i(F) = V¯ i(0) – (Z¯ ik / Z¯ kk + Z¯ f )V¯ k(0)

6
 The fault current ¯Iij(F) flowing in the line connecting i th and j th bus can be
calculated as

Iij(F) = V¯ i(F) − V¯ j(F) / z¯ij

where z¯ij is the impedance of line connecting buses i and j.

Example