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c01024 cc02 Report Lab 6 Group 2

This document discusses the design and simulation of several digital logic circuits by a group of students for a digital systems lab report. It includes: 1. Designing, simulating, and implementing a MOD-4 synchronous down counter using D flip-flops. 2. Designing, simulating and implementing an 8-to-1 multiplexer using IC 74151. 3. Designing and simulating a 3-to-8 decoder using IC 74138 in Logisim. 4. Designing and simulating an 8-bit magnitude comparator using IC 7485 in Logisim. 5. Explaining the difference between asynchronous and synchronous counters and outlining the design procedure

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38 views

c01024 cc02 Report Lab 6 Group 2

This document discusses the design and simulation of several digital logic circuits by a group of students for a digital systems lab report. It includes: 1. Designing, simulating, and implementing a MOD-4 synchronous down counter using D flip-flops. 2. Designing, simulating and implementing an 8-to-1 multiplexer using IC 74151. 3. Designing and simulating a 3-to-8 decoder using IC 74138 in Logisim. 4. Designing and simulating an 8-bit magnitude comparator using IC 7485 in Logisim. 5. Explaining the difference between asynchronous and synchronous counters and outlining the design procedure

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THỊNH LÊ LỘC QUỐC
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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DIGITAL SYSTEM LAB REPORT 6

Members of group:

1. Đỗ Đình Thạch-2213172
2. Đỗ Duy Cương-2210413
3. Lê Lộc Quốc Thịnh-2213278
2.3.1 Design, simulate, and implement a MOD-4 Synchronous Down
Counter using D Flipflops

• Design (The circuit):

• Assemble (DS
Kits with two D
Flip-Flops and
one XNOR gate):
2.3.2 Design, simulate and implement an 8-to-1 Multiplexer using IC

74151

• Design (The circuit):

• Assemble (DS Kits


with ic 74151):
2.3.3 Design and simulate a 3-to-8 Decoder using IC 74138 in
Logisim.

• Design (The circuit):

2.3.4 Design and simulate an 8-bit magnitude comparator using IC


7485 in Logisim.

• Design (The circuit):


2.3.4 What is the difference between asynchronous and synchronous counter?
Counters are of two types depending upon clock pulse applied. These
counters are: Asynchronous counter, and Synchronous counter. In Asynchronous
Counter is also known as Ripple Counter, different flip flops are triggered with
different clock, not simultaneously. While in Synchronous Counter, all flip flops
are triggered with same clock simultaneously and Synchronous Counter is faster
than asynchronous counter in operation.
Let’s see the difference between these two counters:

Synchronous Counter Asynchronous Counter


1. In synchronous counter, all flip flops In asynchronous counter, different flip
are triggered with same clock flops are triggered with different clock,
simultaneously. not simultaneously.
2. Synchronous Counter is faster than Asynchronous Counter is slower than
asynchronous counter in operation. synchronous counter in operation.
3. Synchronous Counter does not Asynchronous Counter produces
produce any decoding errors. decoding error.
4. Synchronous Counter is also called Asynchronous Counter is also called
Parallel Counter. Serial Counter.
5. Synchronous Counter designing as Asynchronous Counter designing as
well implementation are complex due well as implementation is very easy.
to increasing the number of states.
6. Synchronous Counter will operate in Asynchronous Counter will operate
any desired count sequence. only in fixed count sequence
(UP/DOWN).
8. In synchronous counter, propagation In asynchronous counter, there is high
delay is less. propagation delay.
2.3.5 What is the procedure to design a synchronous counter?

Design steps of synchronous counter:

The design steps are somewhat similar for both synchronous counter and asynchronous
counter but differ slightly. Follow the below-given steps to design the synchronous
counter.
1. Find the number of flip flops using 2n ≥ N, where N is the number of states and n
is the number of flip flops.
2. Choose the type of flip flop.
3. Draw the state diagram of the counter.
4. Draw the excitation table of the selected flip flop and determine the excitation
table for the counter.
5. Use K-map to derive the flip flop input functions.

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