AMPLIFIERS
AMPLIFIERS
Lecture Notes
R0
v2 v0
−
Rd + A(v2 − v1 )
v1
A = ∞ (gain is infinite)
v0 = 0, when v1 = v2 (no offset voltage)
Rd = ∞ (input impedance is infinite)
R0 = 0, (output impedance is zero)
Bandwidth = ∞
(no frequency response limitations, no phase shift)
−10
Voltage, V
vi + vb /2
0
Rb = 20 kΩ
−5 time
5 kΩ vb
−10 vo
−15V
vi vb
vo = −Rf +
Ri Rb
v vb
5 i
= −10 +
104 2 · 104
vb
= −10 vi +
2
←− i ←− i
− −
vo vo
vi + vi +
Rf +Ri
5 Slope = Ri
vo i(Ri +Rf ) Rf +Ri
vi = iRi = Ri −10 −5 5 10 vi
−5
−10
v5 = v4 R3R+R
4
4
i = v3R−v
3
5
= v5R−v
4
o
−→ vo = (v4 − v3 ) R4
R3
Common Mode : v3 = v4 , −→ Gain Gc = 0.
Differential Mode : v3 ̸= v4 −→ Gain Gd = R R3 .
4
Gd 4
CMRR = Gc must be > 10 for good quality amplifiers.
R1
R2 R3 R1 R4
Req = R2+R3 + R1+R4
2
R
−
Vi + a b Veq = Vab = Va − Vb
R3
Veq = Vi R2R+R
3
− Vi R1R+R
4
4
3 4
R
d 1 R3 −R2 R4
Veq = Vi (R1R+R 4 )(R2 +R3 )
R1
R2 and R4 decrease
by ∆R then
2
∆vo = ∆R v = ∆R
R
−
R0 i R i
v
Vi + Ry a b ∆vo = 5 · 0.003
= 0.015V .
R3
Rx 20
Gain = 0.015 = 1333.
Assume R = 120Ω,
4
R
RT = 60Ω.
d Use RT to replace
Ri R3 and
G d · R3
= 60 · 1333 = 80kΩ
∆vo to R4 in the amplifier.
v1 + R2
v3
R1
v4
i
− R2
v2 +
v3 − v4 = i(R2 + R1 + R2 ), v1 − v2 = iR1
Gd = vv41 −v
−v2 =
3 2R2 +R1
R1 Gc = 1
Ahmet Ademoglu, PhD Bogazici University Institute of Biomedical Engineering
AMPLIFIERS
Comparators
R1
vi
− vo R3 > 0
vref vo
+
10 Hysteresis
R1
R R3 = 0
No Hysteresis
−10 10 vi
R3
S2
C
1
Rt1
i vo = − RC vi dt + vic
0
Vo (jω)
vi − = ZZfi = − jωτ
Vi (jω)
1
i S1
vo
R where τ = RC .
+
A three-mode integrator
With S1 open and S2 closed, the DC circuit behaves as an inverting amplifier. Thus
vo = vic and vo can be set to any desired inital condition. With S1 closed and S2
open, the circuit integrates. With both switches open, the circuit holds vo constant,
making possible a leisurely readout.
R i = C dv
dt
i Vo (jω) Zf
vo = −RC dv
dt Vi (jω) = − Zi
vi −
i R
vo = − 1/jωC = −jωτ
C +
Vo (jω)
Rf Vi (jω) = − ZZfi = − 1/jωC
Rf
i +Ri
vi −
vo
jωRf Ci jωτ
= − RRfi
Ri
Ci + = − 1+jωC i Ri 1+jωτ
Cf Rf /jωCf
Vo (jω)
= − ZZfi = − 1/jωCfi +Rf i
1/jωC +R
Vi (jω)
Rf
Rf
vi −
= − (1+jωRfjωR f Ci
1+jωRf Cf
Ci
Ri
+
vo
=− 1+jωRi Ci Cf )(1+jωRi Ci )
jωCi
1 Find the transfer function H(jω) = Vout/Vin. Assume the op-amp is ideal.
jωR C
2 1
H(jω) = − (1+jωR C )(1+jωR
2 2 1 C1 )
2 Propose values for the circuit components such that the filter has a gain of 30
dB and a pass-band of 20 Hz to 20 kHz.
High pass and lower cut-off H(jω) ≈ jωR1 C1 → 2π · 20 = 1/R1 C1 . Choose
C1 = 80µF then R1 = 1/(40π · 80 · 10− 6) = 99.47Ω.
30
Pass band H(jω) ≈ − jωR 2 C1
ωR1 C1
= 10 20 → R2 /R1 = 31.6 or
R2 = 31.6 · 99.47 = 3.143kΩ.
Low pass and higher cut-off H(jω) ≈ −jωR2 C2 → 2π · 20k = 1/(R2 C2 ) or
C2 = 1/(3143 · 2π · 2 · 104 ) = 2.5319nF
3 Draw a Bode plot of the filter response.
Ahmet Ademoglu, PhD Bogazici University Institute of Biomedical Engineering
AMPLIFIERS
Self Study Question
A photoplethysmograph device can be used to determine heart rate. However, it
produces voltage signals that are superimposed on top of a large DC component. You
need to design a filter to remove the DC component from the voltage signal.
1 Draw a generic first order filter circuit suitable for this purpose. Use variables to
represent the component values. Label the voltage input and voltage output
nodes clearly. What kind of filter is this?
C
Vin Vout
Vout jωRC
R High Pass Filter : Vin
= 1+jωRC
2 The heart rate of athletes can be as low as 40 beats per minute. Given this
information, propose a set of numerical component values that are appropriate
for this filter.
40 beats/min = 2/3 Hz,fc = 1/(2πRC ) < 2/3. If fc = 0.1 Hz, C = 1µF , R = 1/(2πfc C ) ≈ 1.6MΩ
3 Draw Bode (magnitude and phase) plots of this filter. Be sure to label the
plots, including any significant features and all axes.
Ric Ric
is
vic
C C
S2
i
−
vo
vi −
i S1
+ R vo
+
isC
isR
dqs
is = = K dx
dt dt
Rt1
vo = −v − C1 Kdxdt
dt = − KX
C
0
The charge amplifier slowly drifts with time because of bias. A large feedback
resistance R must therefore be added to prevent saturation. This causes the circuit to
behave as a high pass filter, with time constant τ = RC . It then responds only to
1
frequencies above fc = 2πRC .
Charge
Generator
Rs Cs Cc Ca Ra = C R
iC
is iR
is = iC + iR
Z
1
vo = vC = iC dt
C
dvo dx vo
is − iR = C =K −
dt dt R
Vo (jω) jωτ K /C
=
X (jω) jωτ + 1
τ = RC
Charge
Generator
Rs Cs Cc Ca Ra = C R
iC
is iR
D1 D2
− When vi is (+),
D2 and D3 conduct.
Upper opamp operates
but lower opamp has no
vi + contribution to output.
v
vo = xi
z}|{ z }| {
R When vi is (-)
Rx R(1 − x) D1 and D4 conduct.
Lower opamp operates
but upper opamp has no
vo contribution to output.
−vi
vo = x
D3 D4
− Output of the system
|vi |
is vo = x
.
Rf = 1 kΩ
vi vo
Ri = 2 kΩ D
− RL = 3 kΩ
20 log |G (jω)|
= 20 log(K ) + 20 log |s + z1 | + 20 log |s + z2 | + · · · + 20 log |s + zk |
−20 log s m − 20 log |s + p1 | − · · · − 20 log |s + pn |
G (jω) = (jω + a) = a j ωa + 1
(
a for ω ≪ a
G (jω) ≈ jω j π2
a a = ωe for a ≪ ω
Block Diagram
Vo
Loop Gain : AVL = V1 = −Av β
Zf
α=1−β = Zi +Zf
Av α
AvCL = VVoi = − 1+A vβ
= − ZZfi 1+1 1
Av β
Block Diagram
Vo
Loop Gain : AVL = Va
105
When feedback is added to
the opamp to build an amplifier,
104 Uncompensated
the loop gain is the difference
Loop Gain
Gain
op ed
pe
circuit gain.
e
n
=
102
Slope =
−
If the gain is greater than 1
101 1
Amplifier Circuit Gain when the phase shift is -180o ,
−3
Frequency, Hz
there is undesirable oscillation.
101 102 103 104 105 106 107
Compensation
Adding an external capacitor, to the feedback compensates the opamp
resulting in a slope of -1 and a maximal phase shift of -90o . This opamp
does not oscillate for any amplifier. It has a very high DC gain, which
reduces towards higher frequencies reaching to 1 at 1 MHz.
Loop Gain
The loop gain of the amplifier circuit is obtained by breaking the
feedback loop, injecting a signal, and measuring the gain around
the loop which is equal to the opamp gain.
At low frequencies, the loop gain is high and the closed loop
amplifier circuit behavior is determined by the feedback resistors.
At high frequencies, the loop gain is low and amplifier circuit
behavior follows the opamp characteristics. High loop gain is good
for accuracy and stability.
Ahmet Ademoglu, PhD Bogazici University Institute of Biomedical Engineering
AMPLIFIERS
Gain Bandwidth Product
It is equal to the product of gain and bandwidth at a particular
frequency. Unity gain bandwidth product is 2MHz.
106
105
104 Uncompensated
Loop Gain
Gain
Co
103
Sl nsa
m
op te
pe
e d
=
Slope =
102
−
1
101
Amplifier Circuit Gain
−3
Frequency, Hz
101 102 103 104 105 106 107
40
Range of Gain for Stability via Bode Plots. G (jω) = (jω+2)(jω+4)(jω+5)
. Gain Margin
to be 20 dB.
When a negative (0V) pulse is applied to pin 2, comparator No1 detects this input and sets the state of the
flip-flop, changing the output from a LOW to HIGH. This action in turn turns OFF the discharge transistor
connected to pin 7, thereby removing the short circuit across the capacitor, C1 .
This action allows C1 to start to charge up through resistor, R1 until the voltage across the capacitor reaches the
threshold (pin 6) voltage of 2/3Vcc. At this point the comparator’s output goes “HIGH” and “resets” the flip-flop
back to its original state which in turn turns “ON” the transistor and discharges the capacitor to ground through
pin 7. This causes the output to change its state back to the original stable LOW value awaiting another trigger
pulse to start the timing process over again.
The Monostable 555 Timer circuit triggers on a negative-going pulse applied to pin 2 and this trigger pulse must
be much shorter than the output pulse width allowing time for the timing capacitor to charge and then discharge
fully. Once triggered, the 555 Monostable will remain in this HIGH unstable output state until the time period set
up by the R1 C1 network has elapsed. The amount of time that the output voltage remains HIGH level, is given by
the time constant equation τ = ln(3)R1 C1 .
Zsensor for test will decrease as the cells die and the output of the
lower opamp will also decrease.