ISSN (Online) : 2319 - 8753

ISSN (Print) : 2347 - 6710

International Journal of Innovative Research in Science, Engineering and Technology

Volume 3, Special Issue 3, March 2014

2014 International Conference on Innovations in Engineering and Technology (ICIET’14)

On 21st & 22nd March Organized by

K.L.N. College of Engineering, Madurai, Tamil Nadu, India

Design and Modeling of ZVS Resonant

SEPIC Converter for High Frequency
Applications
R. Sorna Vadivoo1, L.Maheswari2, S. Vijayalakshmi3, K.R Vairamani4
1
PG scholar , M.E Power Electronics and drives, Saranathan College of Engineering, Tiruchirapalli, India
2
PG scholar , M.E Power Electronics and drives, Saranathan College of Engineering, Tiruchirapalli, India.
3
Assistant Professor, Saranathan College of Engineering, Tiruchirapalli, India.
4
Associate Professor , Department of EEE, Saranathan College of Engineering, Tiruchirapalli, India.

ABSTRACT—This paper presents a resonant SEPIC fewmegahertz and below, limits the degree of contraction
(Single-Ended Primary Inductor Converter) Converter that can be achieved and obstructs fast transient response.
and Control method suitable forVery High Frequency dc- Therefore, design methods that reduce energy storage
dc Power Conversion. SEPIC is chosen since it has requirements and expand efficient operation range are
positive voltage gain and higher characteristics than any desirable. In this paper, we exploit the use of resonant
other converter. The proposed design provides high switchingalong with fixed frequency control techniques
efficiency over a wide range of input and output voltage to achieve these goals.
ranges, up & down voltage conversion, small size and DC-DC converters are used in power supply circuits
excellent transient performance. The Converter regulates forstabilizing the voltage to any desired value [1]. SEPIC
the output using an ON-OFF control scheme modulating (Single Ended Primary Inductor Converter) converter is a
at a fixed frequency and duty ratio operation. This control fourth-order nonlinear system and it is extensively used in
method enables a fast transient response and efficient step-down or step-up dc-dc switching circuits and PFC
light-load operation while providing controlled spectral (Power Factor Correction) circuits because it has several
characteristics of input and Output waveforms. The characteristics:
resonant inductors and capacitors are fine tuned to 1) The same polarity between input and output voltage
achieve Zero Voltage Switching (ZVS) condition and 2) Small input ripple current
thus the converter achieves higher than 80% efficiency 3) Step-down and Step-up operation
across entire input voltage range at nominal output 4) Easily extended to multiple-output
voltage and maintains good efficiency across the whole Power electronic circuits are rich in nonlinear
operating range. dynamics. Their operation is characterized by cyclic
KEYWORDS—SEPIC Converter, ON-OFF control switching of circuit topologies, which gives rise to a
strategy, PID Controller, Zero Voltage Switching. variety of nonlinear behaviour.
This paper introduces a quasi-resonant single-ended
primary inductor converter (SEPIC) converter [1], [7]
I. INTRODUCTION resonant switching and associated control method suitable
Probably most of the electronic applications could for converter design at frequencies above 2MHz. Unlike
benefit from a Power Converter and it is capable to many resonant converter designs the proposed approach
achieve high efficiency across wide input and output provides high efficiency over very wide input and output
voltage ranges at a small size. Although it is difficult for voltage ranges and power levels. It also provides up-and-
many conventional power converter design to provide down conversion, and requires little energy storage which
wide operation range while maintaining high efficiency, allows for tremendous transient response. Unlike
especially if both up & down voltage conversion is to be conventional quasi-resonant and multiresonant converters
achieved[2]-[4]. Furthermore, High energy storage no bulk inductor which reduces the Electro Magnetic
required at contemporary switching frequencies of a Interference and the converter operates at fixed frequency

Copyright to IJIRSET www.ijirset.com 315

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14

 Design and Modeling of ZVS Resonant SEPIC Converter for High Frequency Applications

and duty ratio. These aspects reduce passive component As shown in Fig.2 (b) When Q turns OFF, the energy
size & progress response speed. A new fixed-frequency stored inInductor L1 is transferred to C1. The energy
ON/OFF control is introduced which provides good stored in L2 is transferred to C2 through D1 and
control over input and output frequency content. Section supplying the energy to Load.
II presents the Design of SEPIC converterand discusses
its mode. Modelingof converterand tuning of the
controller are explained in detail in Section III, followed
by the discussion of Soft Switching in Section IV. Section
V presents the design and simulation result and
Conclusion is presented in Section VI.
Fig.2 (b) Equivalent circuit of the SEPIC converter when the switch is
II. DESIGN OF SEPIC CONVERTER OFF
A Single Ended Primary Inductor converter (SEPIC)
is a dc – dc converter, whose output voltage can be Applying KVL,
controlled by the duty cycle of the switching device. The Considering L1,
circuit diagram of the SEPIC converter is shown in Fig. 1. We know that, V0=VC2
The SEPIC converter consists of a switch (S) with duty
𝑉 𝑖𝑛 −𝑉 𝐶1 −𝑉𝑜
cycle d, a diode (D1), two inductors (L1 and L2), two 𝑖𝐿1 = 𝑇𝑜𝑓𝑓 (3)
𝐿1
capacitors (C1 and C2) and a resistor load (R). For
simplicity, R load is used here. As per the application Considering L2,
required load can be varied and the response can be
obtained. All the elements are assumed to be ideal and −𝑉𝑜
assuming the conduction to be continuous. The equivalent 𝑖𝐿2 = 𝑇𝑜𝑓𝑓 (4)
𝐿2
circuits during switch ON and OFF states are shown in Average Voltage across L1& L2 is Zero. So,
Fig. 2(a) and Fig. 2(b) also the design of SEPIC is
done. 𝑉𝑖𝑛 − 𝑉𝐶1 − 𝑉𝐿1 − 𝑉𝐿2 = 0. (5)

𝑉𝑖𝑛 = 𝑉𝑐1 (6)

Equation (6) becomes,

−𝑉𝑜
𝑖𝐿1 = 𝑇𝑜𝑓𝑓 (7)
𝐿1

Fig.1 Circuit diagram of SEPIC Converter

When Q turns ON, the energy is stored in the inductor Averaging the equations (9) & (2) to zero,
L1. At this time the inductor voltage equals to input
𝑉 𝑖𝑛 𝑉𝑜
voltage, and the energy stored in capacitor C1 will be 𝑇𝑜𝑛 − 𝑇𝑜𝑓𝑓 =
𝐿1 𝐿1
transferred to inductor L2. The load is supplied by
0 (8)
capacitor C2 as shown in Fig.2 (a).
We Know that,

𝑇𝑜𝑛 = 𝑑𝑇 and 𝑇𝑜𝑓𝑓 = 1 − 𝑑 𝑇

By simplifying the above expression we get,

Fig.2 (a) Equivalent circuit of the SEPIC converter when the switch The average output Voltage is
is ON.
𝑑
𝑉0 = 𝑉𝑖𝑛 (9)
Applying KVL, 1−𝑑

For the lossless Circuit,

Considering L1,
1−𝑑
𝑖𝐿1 =
𝑉 𝑖𝑛
𝑇𝑜𝑛 (1) 𝐼𝑜𝑢𝑡 = 𝐼𝑖𝑛 (10)
𝑑
𝐿1

The peak-to-peak ripple current in the inductor L1 & L2

Considering L2,
𝑉 𝑖𝑛 ∗𝑑
𝑉 𝐶1 ∆𝐼𝐿1&𝐿2 = (11)
𝑖𝐿2 = 𝑇𝑜𝑛 (2) 𝑓𝑠 ∗𝐿1
𝐿2
According to the variation in duty cycle d, this SEPIC
converter acts as either buck or boost converter.
Copyright to IJIRSET www.ijirset.com 316

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14

 Design and Modeling of ZVS Resonant SEPIC Converter for High Frequency Applications

III. MODELING OF SEPIC CONVERTER 𝑑𝑖 𝐿1 𝑉 𝑖𝑛

= (16)
𝑑𝑡 𝐿1
Modeling of a particular converter is done by either
Circuit Averaging Method or State Space Averaging 𝑑𝑉 𝐶1 𝑖𝐿2
=− (17)
method. Here State Space Averaging method is used for 𝑑𝑡 𝐶1
modeling of SEPIC converter. It is an approximation
𝑑𝑖 𝐿2 𝑉 𝐶1
technique thatapproximates the switching converter as a = (18)
𝑑𝑡 𝐿2
continuous linear system.State Space Averaging requires
that the effective filter corner frequency fc smaller than 𝑑𝑉 𝐶2 𝑉 𝐶2
the switching frequency fs. The Power stage of closed =− (19)
𝑑𝑡 𝑅𝐶2
loop system is a non-linear system. The non-linear During Switch OFF:
systems are usually difficult to model and are also
difficult topredict the behaviour of the non-linear system.
So, it is better to approximate the non-linear system to a
linear system. For the linearized power stage of dc-
dcconverter Bode plot can be used to determine
suitablecompensation in feedback loop for desired
steadystate and transient response. For this the State
SpaceAveraging technique is used. Fig.3 (b) State Space equivalent circuit of SEPIC during switch OFF
In dc-dc converter operating in CCM has two circuit
𝑑𝑖 𝐿1 𝑉 𝑖𝑛 𝑉 𝐶1 𝑉 𝐶2
states: one when the switch is turned ON and other when = − − (20)
𝑑𝑡 𝐿1 𝐿1 𝐿1
the switch is turned OFF.
During switch on:(0 < 𝑡 < 𝑑𝑇) 𝑑𝑉 𝐶1 𝑖𝐿 1
= (21)
𝑋 = 𝐴1 𝑋 + 𝐵1 𝑉𝑖𝑛 (12) 𝑑𝑡 𝐶1
During switch off:( 0 < 𝑡 < 1 − d T)
𝑑𝑖 𝐿2 𝑉 𝐶2
𝑋 = 𝐴2 𝑋 + 𝐵2 (13) =− (22)
𝑑𝑡 𝐿2
and the output voltage is
𝑉𝑜 = 𝐶𝑋 + 𝐸𝑉𝑖𝑛 (14) 𝑑𝑉 𝐶2 𝑖𝐿1 𝑖𝐿2 𝑉 𝐶2
To produce an average description of the circuit over a = + − (23)
𝑑𝑡 𝐶2 𝐶2 𝑅𝐶2
switching period, the equations corresponding to the two And states of the SEPIC converter are iL1, iL2,VC1,VC2.
foregoing states are time weighted andaveraged, resulting The averaged matrices for the steady-state and linear
in the following equations: small-signal state-space equations can be written
𝑋 = [𝐴1 𝑑 + 𝐴2 (1 − 𝑑)]𝑋 + [ 𝐵1 𝑑 + 𝐵2 (1 − 𝑑)]𝑉𝑖𝑛 (15) according to above equations.
Where,
‗d‘ is the duty cycle of the switch. 0 0 0 0
1
𝑋 is the electric charge. 0 0 − 0
𝐶1
A is thesystem matrix of the converter 𝐴1 = 0 1 (24)
B is the input matrix of the converter − 0 0
𝐿2
C is the Output matrix of the converter. 1
0 0 0 −
E is the direct transmission matrix of the converter 𝑅𝐶2

This equation shows that by controlling the duty cycle of 1 1

the switch the output voltage Vo can be controlled and 0 − 0 −
𝐿1 𝐿1
output voltage can be high or low or equal to the input 1
voltage Vin. The duty cycle of the SEPIC converter can be 0 0 0
𝐶1
varied during operation by using a controller and the 𝐴2 = 1 (25)
0 0 0 −
circuit can also be made to reject disturbances. 𝐿2
1 1 1
0 −
𝐶2 𝐶2 𝑅𝐶2
A. State Space Averaging of Conventional SEPIC Con-
verter 1
𝐿1
The state space equations for SEPIC converter during 𝐵1 = 𝐵2 = 0 (26)
switch ON and OFF are 0
During switch ON: 0

B. State Space Averaging of Proposed SEPIC Converter

The state space equations for SEPIC converter during

switch ON and OFF are
During switch ON:
Fig.3 (a) State Space equivalent circuit of SEPIC during switch ON

Copyright to IJIRSET www.ijirset.com 317

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14

 Design and Modeling of ZVS Resonant SEPIC Converter for High Frequency Applications

0 0 0 0 0 0
1
0 0 −𝐶 0 0 0
1
1
0 − 0 0 0 0
𝐿2
𝐴1 = 1 1 (39)
0 0 − 0 0
𝐶2 𝑅𝐶2
Fig. 4(a) State Space equivalent circuit of SEPIC during switch OFF
0 0 0 0 0 0
𝑑𝑖 𝐿1 𝑉 𝑖𝑛 1
𝑑𝑡
=
𝐿1
(27) 0 0 0 𝐶𝑟2
0 0

𝑑𝑉 𝐶1 𝑖𝐿2 1
=− (28) 0 0 0 0 − 0
𝑑𝑡 𝐶1 𝐿1
1
0 0 −𝐶 0 0 0
1
𝑑𝑖 𝐿2 𝑉 𝐶1
= (29) 1
𝑑𝑡 𝐿2 0 0 0 − 0 0
𝐴2 = 𝐿2 (40)
1 1 1
𝑑𝑉 𝐶2
=−
𝑉 𝐶2
(30) 𝐶2
0 𝐶2
− 𝑅𝐶 0 0
𝑑𝑡 𝑅𝐶2 2
1
𝑑𝑉𝑐𝑟 1
−𝐶 0 0 0 0 0
𝑟1
=0 (31)
𝑑𝑡 0 0 0 0 0 0
𝑑𝑉𝑐𝑟 2 𝑖𝐿 2 1
= (32)
𝑑𝑡 𝐶𝑟2
𝐿1

During switch OFF:

0
𝐵1 = 𝐵2 = 0 (41)
0
0
0
C. Transfer Function Evaluation

With the state space matrices defined above, the

Fig. 4(b) State Space equivalent circuit of SEPIC during switch OFF transfer function is given by,

𝑑𝑖 𝐿1 𝑉 𝑖𝑛 𝑉𝑐𝑟 1 𝐺𝑣𝑣 = 𝐶(𝑆𝐼 − 𝐴)−1 𝐵 (42)

= − (33)
𝑑𝑡 𝐿1 𝐿1
𝑋 = 𝐴−1 𝐵 𝑉𝑖𝑛 (43)
𝑑𝑉 𝐶1 𝑖𝐿2
=− (34)
𝑑𝑡 𝐶1
Where,
𝑑𝑖 𝐿2 𝑉 𝐶1
=− (35) 𝐴 = 𝐴1 𝑑 + 𝐴2 1 − 𝑑 (44)
𝑑𝑡 𝐿2

𝑑𝑉 𝐶2 𝑖𝐿1 𝑖𝐿2 𝑉 𝐶2 𝐵 = [𝐵1 𝑑 + 𝐵2 1 − 𝑑 ]

= + − (36)
𝑑𝑡 𝐶2 𝐶2 𝑅𝐶2

𝑑𝑉𝑐𝑟 1 𝑖𝐿 1
𝐶= 0 0 0 1 (45)
=− (37) For Conventional SEPIC
𝑑𝑡 𝐶𝑟2
and
𝑑𝑉𝑐𝑟 1 𝐶= 0 0 0 0 0 1
=0 (38)
𝑑𝑡 (46)
iL1, iL2,VC1,VC2, VCr1, VCr2 are the state variables of for Proposed resonant SEPIC
SEPIC converter. The averaged matrices for the steady-
state and linear small-signal state-space equations can be 𝐸 = 0 (47)
written according to above equations.
After discovering the values of A, B, C & E evaluate
them toobtain the transfer function. Compute Kp, Ki&Kd
parameters to tune the controller.
Where,
Gvv – Transfer function.
Copyright to IJIRSET www.ijirset.com 318

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14

 Design and Modeling of ZVS Resonant SEPIC Converter for High Frequency Applications

Kp- Proportional gain; of the controller.

Ki – Integral gainof the controller.
Kd- Derivative gain; of the controller.

D. Controller Tuning
PID controllers use a 3 basic behaviour types or
modes:
P - Proportional, I - Integral and D - Derivative. While
proportional and integral modes are also used as single
control modes, a derivative mode is rarely used on its Fig. 6. Cohen-Coon Tuning
own in control systems. Combinations such as PI and PD Where, the transfer function is given by
control are very often in practical systems.
𝑃𝑉𝑚 𝐾𝑒 −𝑇 𝑑 𝑠
𝐺𝑓𝑝𝑚 = = in which
𝐶𝑂 𝜏𝑠+1

𝐵
𝐾=
𝐴
𝐵
𝜏 = , S is the slope of the sigmoidal response of the
𝑆
Fig. 5 .Design of PID controller
Inflection.
Td = Time elapsed until the system responded.
 When P controller is used, large gain is needed to
From the obtained steady state response we have to
improve steady state error.
compute the parameters Kp,Ki&Kd using these
 D mode is used when prediction of the error can im-
expressions given below.
prove control or to stabilize the system. Sudden 1 𝜏 4 𝑇𝑑
change in error signal will cause sudden change in 𝐾𝑝 = + (48)
𝐾 𝑇𝑑 3 4𝜏
control output.
 PI controller will eliminate forced oscillations and 𝑇𝑖 = 𝑇𝑑
32+6𝑇𝑑 𝜏
(49)
steady state error and introducing integral mode has a 13+3𝑇𝑑 𝜏
negative effect on speed of the response and overall
4
stability of the system. 𝑇𝐷 = 𝑇𝑑 (50)
11+2𝑇𝑑 𝜏
 PID controller has all the necessary dynamics: fast
reaction on change of the controller input (D mode),
The Transfer function of PID controller is given by:
increase in control signal to lead error towards zero (I 1
mode) and suitable action inside control error area to 𝐺 𝑠 = 𝐾𝑝 1 + 𝑇𝐷 𝑠 + (51)
𝑇𝑖 𝑠
eliminate oscillations (P mode). Where,
 Derivative mode improves stability of the system and Kp = Proportional gain.
enables increase in gain K and decrease in integral TD = Derivative time constant.
time constant Ti, which increases speed of the con- Ti = Integral Time Constant.
troller response. PID controller is often used in in- K = the output steady state divided by the input step
dustry, but also in the control of mobile objects. change,
So, in this paper closed loop analysis of SEPIC Converter τ = the effective time constant of the first order response,
is done by PID controller since it can be used in dealing Td = the dead time(time elapsed until thesystem
with higher order capacitive processes. Fig.4 shows the responded).
plant modelof the controller which uses PID for execution By this above mentioned method initial tuning was done
and also better response will be produced since its higher and to get a well-tuned controller output, fine tuning must
order controller.. For PID tuning various methods have be done manually as a further progress.
been used,paper Cohen-Coon tuning method is used
which is duly used for stiff system.
IV. SOFT SWITCHING OF CONVERTER
E. Cohen-Coon Tuning Method
This technique was proposed by G.H.Cohen and Conventional PWM power converters were operated
G.A.Coon. The process output is affected not only by the in a switched mode operation. There are two types of
dynamics of the main process but also by the dynamics of switching namely,
the measuring sensor and final control element. They a. Hard Switching
observed that the response of most processing unit to an b. Soft Switching
input changehad a sigmoidal shape and it is shown in Hard switching refers to stressful switching behaviour of
Fig.5. the power electronic devices.During the turn-ON and
turn-OFF processes, the power device has to withstand

Copyright to IJIRSET www.ijirset.com 319

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14

 Design and Modeling of ZVS Resonant SEPIC Converter for High Frequency Applications

high voltage and current simultaneously, resulting in high V. SIMULATION RESULTS

switching losses and stress. Capacitive snubbers are used ` In order to verify the proposed topology of the
to limit the stress resonant switching of the SEPIC converter the simulation
However; the switching loss is proportional to the results have been analyzed by open loop and closed loop
switching frequency, thus limiting the maximum model of SEPIC converter and also by the comparative
switching frequency of the power converters. analysis of Conventional and proposed SEPIC. For closed
In order to reduce the switching loss soft-switching loop model, PID controller parameters have been
techniques are used (i.e.) Resonant converter is calculated using Cohen-Coon Technique explained in
incorporated. Two techniques namely ZVS(Zero Voltage Section III.D. The simulations have been done by
Switching) and ZCS(Zero Current Switching) are used for MATLAB/Simulink.The parameters are
Turn-ON and Turn-OFF transition of the switch. Tank For Conventional SEPIC:
circuits (L&C) are tuned to obtain these switching which Vin or Vdc =3.6V, L1=L2=64.89μH,
results in increase in switching frequency of the C1=10μF, C2=39.144nF, Dmax =56%.
converter, continuous improvement of the switch and For resonant SEPIC:
reduction in switching loss gradually increase the Lr1=Lr2= 64.89μH, Cr1= 3.8pF; Cr2=20nF, CS=10μF and it
efficiency of the converter.
is well tuned for better response.

A. Proposed Soft Switching Technique A. Open LoopModelfor SEPIC Converter

In this paper (Zero Voltage switching) ZVS condition

is obtained during Turn-ON Transition of the switch. This
proposed resonant SEPIC converter is the combination of
both quasi resonant SEPIC and Multiresonant SEPIC
converter. Multi resonant uses bulk inductors, introduces
capacitance in parallel with switch and diode, quasi
resonant uses choke inductor Lr1 along with coupling
capacitor Cs to achieve ZVS condition. Combination as
Quasiresonant and multi resonant technique ensures fixed
frequency and duty ratio operation which eliminates the
bulk magnetic component and enables ZVS which
increases the efficiency of the converter. The proposed
Resonant SEPIC converter is shown in Fig.6. In this new Fig.8 Simulink model for open loop of SEPIC converter
resonant SEPIC converter no bulk inductor is used, two
resonant inductors and capacitors used namely,

a. Lr1and Cr1
b. Lr2and Cr2

1
𝐿𝑟1 = 2 𝐶 (52)
16𝜋 2 𝑓𝑠𝑤 𝑟1

Fig. 9 Simulation result for open loop SEPIC converter

Fig.7 Proposed Resonant SEPIC converter

Resonant inductor Lr2 and Capacitance Cr1 and Cr2 are

tuned approximately to deliver the output. First, design
the open loop SEPIC converter and find all the
parameters required. Further for achieving resonant
condition introduce capacitance in parallel with diode and
switch and tune them particularly to get a specified
output.

Copyright to IJIRSET www.ijirset.com 320

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14

 Design and Modeling of ZVS Resonant SEPIC Converter for High Frequency Applications

B. Closed Loop Modelfor SEPIC Converter

Fig.10 Simulink model for closed loop model for SEPIC converter Fig.13 Simulation result for proposed resonant SEPIC converter

D. Proposed Closed loop ofResonant SEPIC converter

Fig.11 Simulation result for closed loop of SEPIC converter using PID
control Fig. 14 Simulink model for proposed closed loop resonant SEPIC
converter model

C. Proposed Resonant SEPIC Converter Model

Fig.15 Simulation result for proposed resonant SEPIC converter

Fig. 12 Simulink model for proposed resonant SEPIC converter model

Copyright to IJIRSET www.ijirset.com 321

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14

 Design and Modeling of ZVS Resonant SEPIC Converter for High Frequency Applications

E. Comparative Efficiency Analysisof SEPIC Converter eliminate the bulk magnetic components and facilitates
high efficient resonant
Gating. Soft switching can be achieved for a wide input
and output voltage ranges.
Unlike conventional quasi- resonant and multi
resonant converters no bulk inductor is used and the
converter operates at fixed frequency and duty ratio.
These attributes reduce passive component size, improve
response speed, and enable the use of low-loss sinusoidal
resonant gating. It is hoped that these techniques will
contribute to future development of low-power converters
operating over wide ranges and extreme high frequencies
to meet the increasing demands of modern portable
Fig.16Comparative Efficiency analysis of SEPIC Converter
electronics.
From the abovesimulation results we examine the
response of SEPIC converter for Open loop analysis in
Fig.8, Closed loop analysis in Fig.10 and the proposed
REFERENCES
resonant SEPIC analysis in Fig.12. Also the comparative
efficiency analysis had been done and verified through
[1] J. Hu, A. D. Sagneri, J. M. Rivas, S. M. Davis, and D. J. Per-
the graph shown in Fig.13. The graph implies that reault, ―High frequency resonant sepic converter with wide input
resonantSEPIC have higher efficiency compared to and output voltage ranges,‖ in Proc. IEEE Power Electron. Spec.
conventional SEPIC due to Zero Voltage Switching Conf., Jun. 2008, pp. 1397–1406.
condition achieved in it. It is obtained by tuning the [2] J. M. Rivas, ―Radio frequency dc-dc power conversion,‖ Ph.D.
dissertation, Dept. Elect. Eng. Compute. Sci., Massachusetts In-
resonant circuit includes inductors (Lr1 & L r2) and stitute of Technology (MIT), Cambridge, Sep. 2006.
Capacitors (Cr1 & Cr2) as shown in Fig.6. The variations [3] J. Perreault, J. Hu, J. M. Rivas, Y. Han, O. Lietermann, R. Pila-
are compared as shown in Table1. wa,A. Sagneri, and C. Sullivan, ―Opportunity and challenges in
very high frequency power conversion,‖ in Proc. 24th Annu.
IEEE Appl. Power Electron. Conf. Expo., 2009, pp. 1–14.
[4] J. R. WarrenIII, K. A. Rosowski, and D. J. Perreault, ―Transistor
Table1: Comparison between Conventional and Proposed SEPIC selection and design of a VHF dc-dc power converter,‖ IEEE
Converter Trans. Power Electron., vol. 23, no. 1, pp. 27–37, Jan. 2008.
[5] J.Rivas, D.Jackson, O.Leitermann, A.Sagneri, Y.Han and D.Per-
reault, ―Design Consideration for very high frequency dc-dc con-
Transient Conventional Proposed verters,‖ in proc Power Electron.Spec.conf. Jun.18-22, 2006,
response SEPIC Resonant pp.1-11.
Specification SEPIC [6] J.Rivas, R.Wahby, J.Shafran and D.Perreault, ―New architectures
Rise Time(tr) 0.0025 S 0.00089 S for radio frequency dc/dc power conversion,‖ IEEE Trans.Power
E
Peak Time(tp) 0.0035 S 0.0015 S [7] lectron. vol.21, no.2, pp.380-393, Mar.2006.
Settling Time(ts) 0.0063 S 0.0019 S [8] R.Erickson and D.Maksimovic, ―Fundamentals of Power Elec-
Delay Time (td) 0.0015 S 0.0010 S tronics”, Norwell, MA: Kluwer, 2000.
[9] Ray Ridley, ―Analyzing the Sepic Converter‖, Power Systems
Maximum Peak 5.12% 2.15% Design Europe, November, 2006, pp. 14-18.
overshoot(Mp) [10] Tae-Yeong Lee, Eun-JuYoo, Won-Yeong Choi, and Young-Woo
Park, ―Design and Control of DC-DC Converter for the Military
Application Fuel Cell‖ IEEE Appl., World Academy of Science,
VI. CONCLUSION Engineering and Technology 47 2010.
[11] W.Tabisz and F.Lee, ―Zero Voltage-Switching multiresonant
This work presents a resonant SEPIC converter suit- technique: A novel approach to improve performance of High
able for extremely high-frequency operation and for oper- frequency quasi resonant converters,‖ IEEE
ating across a wide input and output voltage range. Here Trans.PowerElectron., vol.4no.4, pp.450-458, Oct 1989.
[12] Wei Gu, Dongbing Zhang, ―Designing a SEPIC Converter‖,
we experimentally set up a SEPIC converter with switch- Excellent Design Guidelines, National Semiconductor in Applica-
ing frequency MHz.This work uses an ON-OFF control tion Note, April, 2008, pp. 1-6.
with fixed frequency. It is possible for resonant SEPIC [13] Y. Han and D. J. Perreault, ―Analysis and design of high effi-
converters to achieve a wide operating range, a small size, ciency matching networks,‖ IEEE Trans. Power Electron., vol.
21, no. 5, pp. 1484–1491, Sep. 2006.
and excellent transient response while maintaining good [14] Y.Lee and Y.Cheng, ―A580KHz switching regulator using on off
efficiency. It provides fast transient response and good control,‖J.Inst.Electron. RadioEng. vol.57, no.5pp.221 -226,
control over wide input and output ranges. In this we can Sep/Oct.1987.

Copyright to IJIRSET www.ijirset.com 322

M.R. Thansekhar and N. Balaji (Eds.): ICIET’14