August 26, 2016 8:51 WSPC/S0218-1274 1650145

International Journal of Bifurcation and Chaos, Vol. 26, No. 9 (2016) 1650145 (11 pages)

c World Scientific Publishing Company
DOI: 10.1142/S0218127416501455

A New Simple Chaotic Circuit Based on Memristor

Renping Wu∗ and Chunhua Wang†

College of Information Science and Engineering,
Hunan University, Changsha 410082, P. R China
∗[email protected]
†[email protected]

Received January 29, 2015; Revised May 4, 2016

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In this paper, a new memristor is proposed, and then an emulator built from off-the-shelf solid
by UNIVERSITY OF WATERLOO on 11/08/16. For personal use only.

state components imitating the behavior of the proposed memristor is presented. Multisim sim-
ulation and breadboard experiment are done on the emulator, exhibiting a pinched hysteresis
loop in the voltage–current plane when the emulator is driven by a periodic excitation voltage.
In addition, a new simple chaotic circuit is designed by using the proposed memristor and other
circuit elements. It is exciting that this circuit with only a linear negative resistor, a capacitor,
an inductor and a memristor can generate a chaotic attractor. The dynamical behaviors of the
proposed chaotic system are analyzed by Lyapunov exponents, phase portraits and bifurcation
diagrams. Finally, an electronic circuit is designed to implement the chaotic system. For the sake
of simple circuit topology, the proposed chaotic circuit can be easily manufactured at low cost.

Keywords: Memristor; chaotic circuit; breadboard experiment.

1. Introduction material [Strukov et al., 2008]. Thus the status of

Memristor as the fourth fundamental circuit ele- memristor as the fourth fundamental circuit ele-
ment besides resistor, inductor and capacitor, was ment was consolidated. From then on, more and
first postulated in 1971 by Chua [1971] and later the more researchers show great interest in the research
concept was extended to a kind of dynamical sys- of circuits containing memristor. Different applica-
tem called generalized memristor in 1976 by Chua tion circuits based on memristor were proposed,
and Kang [1976]. Both the memristor and gener- such as memristor-based ReRAM [Seok et al., 2014],
alized memristor have the common fingerprints of memristor-based synapses for neuromorphic circuits
pinched hysteresis loop in the current versus volt- [Prezioso et al., 2015], and memristor-based pro-
age plane under periodic excitation signal condition. grammable logic circuits [Georgios et al., 2014].
The pinched hysteresis loop shrinks as the frequency Apart from these, the research of chaotic circuits
of excitation signal is increased (the pinched hys- based on memristor has also become a hot topic.
teresis loop shrinks to a single-valued function when For example, Lin and Wang proposed a new image
the frequency of the excitation signal is increased encryption algorithm based on chaos with PWL
high enough) [Adhikari et al., 2013]. Though the memristor in Chua’s circuit [Lin & Wang, 2009].
device was postulated theoretically, an actual phys- In 2015, the knowm memristor invented by
ical device was not discovered. Until 2008, Strukov Dr. Kris Campbell in Boise State University
and others in HP lab using nanoscale technol- was made available as a commercial component,
ogy first fabricated a physical memristor, which which is developed specifically for neuromemristive
is a two-terminal electrical device based on TiO2 applications [Campbell, 2015]. Different from the

†
Author for correspondence

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R. Wu & C. Wang

TiO2 memristor, the knowm memristor is formed Meanwhile, the memristor’s memductance function
by metal W, Ag and Chalcogenide. However, the only contains a quadratic nonlinearity term with-
cost of fabricating knowm memristor is high, and out constant term, which can make the memris-
the price is high. Therefore, it is still very neces- tor’s mathematical model simpler compared with
sary to research and design the memristor mod- the abovementioned smooth continuous nonlin-
els and emulators. In order to study the dynamic ear memristor [Muthuswamy, 2010]. And unlike
behaviors of memristive circuit, a lot of memris- the emulator circuit proposed by Muthuswamy
tor models were proposed. For example, piecewise- [2010] who used the Op-amp AD711KN to real-
linear models [Itoh & Chua, 2008; Muthuswamy & ize the current-inverter, we use the current feed-
Kokate, 2009], and SPICE macromodels [Benderli & back operational amplifier AD844 to realize the
Wey, 2009; Rak & Cserey, 2010; Batas & Fiedler, current-inverter, which makes the design of emu-
2011] were proposed to emulate the memristor’s lator more easy. Compared to the recent memris-
behaviors. Although those models are useful for tor emulator proposed by Yang [Yang et al., 2015],
simulating memristor, they cannot be used to phys- which is a completed current (or charge)-controlled
ically build real-world application circuits based on memristor emulator based on the HP memristor
memristor. Therefore, designing a memristor emula- mathematical model, our realized memristor emu-
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tor would be very useful for experimentally explor- lator is a generalized voltage-controlled memristor
ing the dynamic behaviors of a memristive circuit. emulator based on the proposed new memristor
In 1971, Chua proposed the first memristor emu- mathematical model. According to the simulation
lator based on active devices [Chua, 1971]. How- and experimental results we confirm our proposed
ever, this emulator circuit is relatively complex and emulator can still show a pinched hysteresis loop
bulky. After that, Pershin and Di Ventra proposed when the frequency of the sinusoidal input applied
another emulator, which is based on microcontroller to the emulator is equal to 1.5 kHz, so the emulator’s
[Pershin & Di Ventra, 2010]. Nonetheless, the fre- operation frequency is larger than 1.5 kHz, which
quency range of this emulator circuit is limited to shows a higher frequency range than the microcon-
approximately 50 Hz. Besides, a smooth continu- troller emulator proposed by Pershin and Di Ventra
ous nonlinear memristor emulator formed by opera- [2010], the abovementioned smooth continuous non-
tional amplifiers (Op-amps) and analog multipliers linear emulator proposed by Muthuswamy [2010]
was proposed by Muthuswamy [2010], which has and the emulator proposed by Yang [Yang et al.,
frequency content in the 0.5 kHz range. Recently, 2015].
Yang proposed a HP memristor emulator that con- In addition, due to the nonlinearity of mem-
tains most features found in real memristor, such as ristor, memristor-based circuits can easily generate
a sufficiently wide range of memristance, bimodal a chaotic signal [Bao et al., 2011a]. Using mem-
operability of pulse and continuous signal inputs, ristor to construct chaotic system has attracted
a long period of nonvolatility, floating operation, a lot of interest. More and more chaotic circuits
operability with other devices, and the ability to based on memristor were proposed [Barboza &
be implemented with off-the-shelf devices. Specif- Chua, 2008; Muthuswamy & Kokate, 2009; Li et al.,
ically, the proposed emulator has a wide memris- 2009; Wang et al., 2009; Muthuswamy & Chua,
tance range [Yang et al., 2015]. However, when the 2010; Muthuswamy, 2010; Bao et al., 2011a; Bao
frequency of the sinusoidal input applied to this et al., 2011b; Hrubos, 2012; Wang et al., 2012;
emulator is equal to 1 kHz, the pinched hystere- Buscarino et al., 2012a, 2012b; McCullough et al.,
sis loop of this emulator shrinks to a single-valued 2013; Setoudeh et al., 2014; Li et al., 2014] since
function, which means this emulator’s operation fre- the first memristor-based chaotic circuit was pro-
quency is no larger than 1 kHz. posed by Itoh and Chua [2008]. A variety of chaotic
In this paper, a new memristor is proposed circuits based on HP memristor were proposed [Li
and an emulator is also presented. Different et al., 2014; Wang et al., 2012; Buscarino et al.,
from these piecewise-linear memristors proposed 2012a, 2012b; Setoudeh et al., 2014]. For exam-
by Muthuswamy and Kokate [2009], Itoh and ple, Buscarino et al. [2012b] proposed a memristor-
Chua [2008], our proposed memristor is a smooth based chaotic circuit by making use of two HP
continuous nonlinearity memristor, which makes memristors in antiparallel to substitute the Chua’s
the physical realization of this memristor easy. diode in the canonical Chua’s oscillator. However,

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A New Simple Chaotic Circuit Based on Memristor

the above proposed chaotic systems based on HP 2. The Memristor and Emulator
memristor only made computer verification and
According to Chua and Kang [1976], a generalized
did not make experimental verification. Besides,
memristor is defined by
chaotic circuits based on piecewise-linear memris-

tor were proposed [Muthuswamy & Kokate, 2009; y = g(z, u)u
McCullough et al., 2013; Li et al., 2009; Wang (1)
ż = f (z, u)
et al., 2009]. For example, Muthuswamy and Kokate
[2009] proposed memristor-based chaotic circuits where u and y denote the input and output of
with the memductance mathematically defined as the system respectively, z denotes the state of the
piecewise-linear discontinuous function W (ϕ) = system. The g is a continuous n-dimensional vec-
dq(ϕ)/dϕ. These memristor-based chaotic circuits tor function and f is a continuous scalar function.
can generate various chaotic attractors. However, The output y is zero whenever the input u is zero,
the constitutive relations of these memristors are regardless of the state z which incorporates the
nonsmooth piecewise-linear functions, resulting in memory effect. This property manifests that the
discontinuous nonlinear characteristics of the mem- pinched hysteresis loop always passes through
ristance M (ϕ) and memductance W (ϕ), which the origin. A generalized current-controlled mem-
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makes the physical realization of such nonsmooth ristor is defined by

memristors impossible [Bao et al., 2011a]. Chaotic

circuits based on smooth continuous nonlinear- v = M (z1 , z2 , . . . , zn )i
(2)
ity memristor were proposed [Bao et al., 2011a; żk = fk (z1 , z2 , . . . , zn ; i), k = 1, 2, . . . , n
Muthuswamy, 2010; Bao et al., 2011b; Hrubos,
2012; Muthuswamy & Chua, 2010]. For example, where the memristance M is a continuous func-
Bao designed a simple memristor-based chaotic cir- tion of z1 , z1 , . . . , zn , and z1 , z1 , . . . , zn are the state
cuit using a negative inductor, a negative resistor variables defined by n-order system of differen-
and a negative capacitor in series with a parallel tial equations. Alternatively, a generalized voltage-
combination of a memristor and a capacitor [Bao controlled memristor is defined by
et al., 2011a].

i = W (z1 , z2 , . . . , zn )v
By using the memristor proposed in this paper, (3)
we designed a new simple memristor-based chaotic żk = fk (z1 , z2 , . . . , zn ; v), k = 1, 2, . . . , n
circuit. The memristor-based chaotic circuit con-
where the memductance W is a continuous function
sists of an inductor and a negative resistor in series
of the state variables z1 , z1 , . . . , zn .
with a parallel combination of a memristor and
Now, we define a generalized voltage-controlled
a capacitor, which is simpler compared to those
memristor as
memristor-based chaotic circuits reported in the

abovementioned papers. Compared to circuit in i = αz 2 v
paper [Bao et al., 2011a], our proposed memristor- (4)
ż = −βv − λz + κvz
based chaotic circuit requires only one negative ele-
ment, which is advantageous because it reduces the where α, β, λ, κ are parameters and α > 0 (the
number of active elements and reduces power con- intention for this choice is to keep the memristor
sumption accordingly. a passive one). z is the internal state of the memris-
This paper is organized as follows. In Sec. 2, tor. Compared with those memristors proposed by
some fundamentals of memristor are illustrated, a Muthuswamy [2010] and Bao [Bao et al., 2011a], the
new memristor is proposed, and an emulator built proposed memristor’s memductance W = αz 2 only
from off-the-shelf solid state components which imi- contains a quadratic nonlinearity term and does not
tates the behavior of the proposed memristor is contain constant term. The intention is to make the
presented. In Sec. 3, the memristor-based chaotic mathematical model simpler and its emulator easier
circuit topology, system equations are described and to be implemented.
then the dynamics of chaos are confirmed by numer- Now, an emulator built from off-the-shelf solid
ical computation. In Sec. 4, an electronic circuit is state components which imitates the behavior of the
designed to implement the chaotic system. Finally, above proposed memristor is designed, as shown in
conclusions are given in Sec. 5. Fig. 1.

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R. Wu & C. Wang

Multiplier U4 implements
R7 + R8
w4 (t) = w3 (t) · v2 (t). (7)
10R7
Op-amp U1 implements
v1 (t) = vM (t). (8)
Op-amp U2 implements
dv2 (t) w3 (t) v1 (t) v2 (t)
=− − − . (9)
dt R1 C1 R2 C1 R3 C1
Fig. 1. Schematic of the emulator. Substituting for w3 from Eq. (6) into Eq. (7) and
then substituting w4 into Eq. (5) we can get the
With the properties of Op-amp TL082, mul- following Eq. (10) after simplification
tiplier AD633 and current feedback operational (R5 + R6 )(R7 + R8 )
amplifier AD844 (refer to the datasheet for further iM (t) = v2 (t)2 · v1 (t). (10)
100R4 R5 R7
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information), we can see that U5 is the current-

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inverter that implements Substituting for v1 from Eq. (8) into Eq. (10) we
can get
w4 (t)
iM (t) = i(t) = i1 (t) = − . (5) (R5 + R6 )(R7 + R8 )
R4 iM (t) = v2 (t)2 · vM (t). (11)
100R4 R5 R7
Multiplier U3 implements
Finally, substituting for w3 and v1 from Eqs. (6)
R5 + R6 and (8) into Eq. (9) we can get the following differ-
w3 (t) = − v2 (t) · v1 (t). (6)
10R5 ential equation governing the internal state of the

(a) (b)

(c) (d)
Fig. 2. The iM –vM characteristics of memristor, the excitation signal is a sinusoid voltage with 1.5 V amplitude, (a) and (b)
are the Multisim simulation results with a frequency of 300 Hz and 1.5 kHz respectively, the scales are 2.0 V/div for w4 and
1.0 V/div for vM , (c) and (d) are the corresponding experimental results.

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A New Simple Chaotic Circuit Based on Memristor

emulator
dv2 (t) vM (t) v2 (t)
=− −
dt R2 C1 R3 C1
(R5 + R6 )vM (t) · v2 (t)
+ . (12)
10R1 R5 C1
Along with the above function Eqs. (11) and (12)
Fig. 3. Schematic of the proposed chaotic system.
we have


 (R5 + R6 )(R7 + R8 )

 iM (t) = v2 (t)2 · vM (t) bifurcation diagram, Lyapunov exponent spectrum,

 100R R R


4 5 7 equilibrium points and eigenvalues are described.


dv2 (t) vM (t) v2 (t)
=− −

 dt R C
2 1 R 3 C1 3.1. Circuit topology and system



 equations

 (R5 + R6 )vM (t) · v2 (t)

 + .
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10R1 R5 C1 By adding an inductor, a capacitor, a linear neg-

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(13) ative resistor to the above proposed memristor, a

new chaotic circuit is designed, as shown in Fig. 3.
Now, we consider the above proposed memris- Based on Fig. 3, we can see that vM = vC .
tor defined by Eq. (4). Comparing Eq. (13) with By applying Kirchhoff’s voltage law to the loop D
Eq. (4), and making i = iM (t), v = vM (t), z = and using the constitutive relations of the inductor,
v2 (t) (the internal state of the memristor), α = capacitor and linear negative resistor, we can get
(R5 +R6 )(R7 +R8 ) (R5 +R6 )
100R4 R5 R7 β = R21C1 , λ = R31C1 , κ = 10R
, 1 R5 C1
, the following equations
we can see that Fig. 1 indeed realizes the above pro- vL + v−G − vC = 0
posed memristor. And unlike Muthuswamy [2010]
who used the Op-amp AD711KN to realize the diL
⇒L = −v−G + vC
current-inverter, we use the current feedback oper- dt
ational amplifier AD844 to realize the current- (14)
diL 1
inverter, which makes the design more easy. ⇒ = (−v−G + vC )
When R1 = R4 = 10 KΩ, R2 = R3 = 25 KΩ, dt L
R5 = R7 = 1 KΩ, C1 = 300 nF, R6 = R8 = diL 1
⇒ = (G · iL + vC ).
9 KΩ, we can obtain the experimental results of dt L
the iM –vM characteristics, as shown in Figs. 2(c)
By applying Kirchhoff’s current law to the node A
and 2(d), which are entirely consistent with the
and using the constitutive relations of the inductor,
results obtained by Multisim simulation shown in
capacitor, memristor and linear negative resistor,
Figs. 2(a) and 2(b). From the simulation and exper-
we can get the following equations
imental results we know that our proposed emulator
shows a higher frequency range than the microcon- iC + iM + iL = 0
troller emulator proposed by Pershin and Di Ventra
[2010], the smooth continuous nonlinear emulator dvC
⇒C = −iL − iM
proposed by Muthuswamy [2010] and the emulator dt
proposed by Yang [Yang et al., 2015]. From Eq. (5) dvC 1
we know that iM (t) = −w4 (t)/R4 . In order to con- ⇒ = (−iL − iM ) (15)
dt C
veniently measure the current iM we use the voltage
w4 to substitute the current iM , which just makes dvC 1
⇒ = (−iL − α · z 2 · vM )
a transformation on a −1/R4 scale. dt C
dvC 1
⇒ = (−iL − α · z 2 · vC ).
3. Chaotic System dt C
In this section, the chaotic circuit topology, system Finally, according to Eq. (4) we get the equation
equations and dynamical characteristics including governing the internal state of the memristor as

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R. Wu & C. Wang

follows parameter values are L = 1, C = 3, G = 0.2, α =

dz κ = 1, β = λ = 0.4. The above circuit equations
= −β · vM − λ · z + κ · vM · z. (16) can be described as
dt 
Substituting vM = vC into Eq. (16) we can get the 

ẋ = 0.2x + y


following equation 1 1
ẏ = − x − yz 2 (19)
dz 
 3 3
= −β · vC − λ · z + κ · vC · z. (17) 

dt ż = −0.4y − 0.4z + yz.
By combining Eqs. (14), (15) and (17), a set of three The phase portraits of system (19) are investi-
first-order differential equations defining the rela- gated by numerical simulation with initial condi-
tion among the three variables are obtained tion x(0) = y(0) = z(0) = 0.1, as shown in

 Fig. 4. The projections of phase portrait on x–y,

 diL 1

 = (G · iL + vC ) x–z, y–z planes are shown in Figs. 4(a)–4(c), respec-

 dt L

 tively. The 3D view in the x–y–z space is shown in

dvC 1 Fig. 4(d). From the numerical simulation results we
= (−iL − α · vC · z 2 ) (18)
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
 dt C know system (19) can generate a chaotic attractor.

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





dz
= −β · vC − λ · z + κ · vC · z.
 3.2. Lyapunov exponents and
dt
bifurcation diagram
∆
We have x(t) = iL (current through inductor L) Lyapunov exponents provide empirical evidence of
∆
and y(t) = vC (voltage across capacitor C). The chaotic behavior. They characterize the rate of

(a) (b)

(c) (d)
Fig. 4. Chaotic phase portraits of system (19). (a) Projection on x–y plane, (b) projection on x–z plane, (c) projection on
y–z plane and (d) 3D view in the x–y–z space.

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A New Simple Chaotic Circuit Based on Memristor

(a) (b)
Fig. 5. (a) Lyapunov exponents versus parameter λ of system (18) and (b) bifurcation diagram for increasing parameter λ
of system (18).


separation of infinitesimally close trajectories in  0.2x + y = 0


state space [Eckmann & Ruelle, 1985; Wolf et al.,  1
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1
1985]. The rate of separation can be different for − x − yz 2 = 0 (20)
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
 3 3
different orientations of the initial separation vec- 

tor, hence the number of Lyapunov exponents is −0.4y − 0.4z + yz = 0.
equal to the number of dimensions in phase space.
By solving Eq. (20) we get three equilibrium points
So for a three-dimensional autonomous continuous
S0 = (0, 0, 0)T , S1 = (−2.4357, 0.4871, 2.2361)T ,
time system, we will have three Lyapunov expo-
S2 = (−1.6965, 0.3393, −2.2361)T . The stability of
nents. A positive Lyapunov exponent implies that
equilibrium point can be judged by the eigenval-
the trajectory of a system expands in phase space.
ues of the characteristic equation det(λI − J) = 0.
However, if the sum of Lyapunov exponents is neg-
Jacobian matrix of system (19) is shown in Eq. (21)
ative, then the trajectory of the system contracts
 
a little in phase space. These two seemingly con- 0.2 1 0
tradictory properties indicate chaotic behavior in a  1 
 1 2 
dynamical system. J = − − z2 − yz . (21)
 3 3 3 
To explore the dynamic behaviors of the
memristor-based chaotic circuit, the Lyapunov 0 −0.4 + z −0.4 + y
spectrum of system (18) is calculated, as shown For equilibrium point S0 , the characteristic equa-
in Fig. 5(a) (with the parameter values L = 1, tion is as follows,
C = 3, G = 0.2, α = κ = 1, β = 0.4 and  
λ = 0 ∼ 1). Notice that when λ = 0.4, the cor- λ − 0.2 −1 0 
 
responding Lyapunov exponents are: LE 1 = 0.046,  1 
 
LE 2 = 0, LE 3 = −0.397. There is a positive Lya- det(λI − J) =  λ 0 
 3 
punov exponent and the sum of the Lyapunov expo-  
 0 0.4 λ + 0.4
nents is negative, which indicate chaotic behavior
of system (18). Figure 5(b) shows the bifurcation = λ3 + 0.2λ2 + 0.2533λ + 0.1333
diagram of system (18) with the parameter values
L = 1, C = 3, G = 0.2, α = κ = 1, β = 0.4 and = 0. (22)
λ = 0 ∼ 1. It can be observed that system (18)
evolves into chaos through double-period bifurca- The solutions (also called as eigenvalues) of the
tion route. above equation are λ1,2 = 0.1 ± 0.5686i, λ3 = −0.4.
The stability of system (19) near the equilibrium
point S0 is uniquely determined by these eigenval-
ues. From the solutions, we know there are one real
3.3. Equilibrium points and eigenvalue and a pair of complex conjugate eigen-
stability analysis values (a so-called index-2 saddle-focus), which are
According to system (19), let ẋ = ẏ = ż = 0, the the criteria to generate chaotic attractor. Similarly,
equilibrium point equations can be expressed as the stability of system (19) near the equilibrium

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R. Wu & C. Wang

generate chaotic attractor) and two index-1 saddle-

focus, which provide the possibility to generate
chaotic attractor [Yu, 2011].

4. Circuit Implementation
In this section, the system (19) is realized by an
electronic circuit, as shown in Fig. 6.
The corresponding circuit equations can be
described as
 
Fig. 6. The schematic of the chaotic circuit based on mem- 
 diL 1 R9 R11
ristor. The power supplies for the ICs are ±15 V. The circuit 
 = vC + · iL

 dt L R10
in the N1 is a linear negative resistor and N2 is the proposed 

memristor. 
 
dvC 1 (R5 + R6 )(R7 + R8 ) 2
 = −iL − · vC · v2

 dt C 100R4 R5 R7
points S1 and S2 are determined by the eigen- 
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

values λ1,2 = −0.7796 ± 0.9368i, λ3 = 0.1795 (a 

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 dv2 vC v2 R5 + R6
 =− − + · vC · v2
so-called index-1 saddle-focus) and the eigenvalues dt R2 C1 R3 C1 10R1 R5 C1
λ1,2 = −0.8427 ± 0.9892i, λ3 = 0.1579 (a so-called (23)
index-1 saddle-focus) respectively. From the equi-
librium point analysis, we know the system (19) where G = (R9 R11 )/R10 , α = (R5 + R6 )(R7 +
contains one index-2 saddle-focus (the premise to R8 )/(100R4 R5 R7 ), β = 1/(R2 C1 ), λ = 1/(R3 C1 ),

(a) (b)

(c) (d)
Fig. 7. Phase portraits of system (19) obtained by Multisim simulation. (a) x–y plane, (b) x–z plane, (c) y–z plane and
(d) time-domain waveform of x.

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A New Simple Chaotic Circuit Based on Memristor

(a) (b)
Int. J. Bifurcation Chaos 2016.26. Downloaded from www.worldscientific.com
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(c) (d)
Fig. 8. Phase portraits of system (19) observed from an oscilloscope. (a) x–y plane, (b) x–z plane, (c) y–z plane and (d) the
physical implementation of circuit.

κ = (R5 +R6 )/(10R1 R5 C1 ). Thus in order to get the to the proposed memristor, a new simple chaotic
parameter values L = 1, C = 3, G = 0.2, α = κ = 1, circuit is proposed. The new constructed system
β = λ = 0.4, we set R9 = 200 Ω, R10 = 100 KΩ, can generate an attractor with the unusual fea-
R11 = 100 Ω, R4 = R5 = R7 = 100 Ω, R6 = ture of having three equilibrium points, which is
R8 = 9.9 KΩ, R2 = R3 = 25 KΩ, R1 = 100 KΩ, unlike the reported memristive systems having a
C1 = 100 nF, C = 3 F, L = 1 H. The experimental line of equilibrium points. Some basic properties
results of Fig. 6 are shown in Figs. 8(a)–8(d), which of the new system are investigated including phase
are entirely consistent with the results obtained by portraits, equilibrium, Lyapunov exponent spec-
Multisim simulation shown in Figs. 7(a)–7(d). trum and bifurcation diagram. Moreover, a practi-
cal equivalent circuit of the memristor is presented.
Based on the equivalent circuit of memristor, the
5. Conclusions new chaotic circuit can be easily designed, and
In this paper, in order to design and realize a sim- the experimental results of the chaotic circuit are
ple memristor-based chaotic circuit, a memristor entirely consistent with the simulation results. The-
with a simple mathematical model is proposed, and oretical analysis, numerical simulation and experi-
then its emulator is also presented. By adding an mental results have confirmed the effectiveness of
inductor, a capacitor, and a linear negative resistor this approach.

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R. Wu & C. Wang

Acknowledgments Li, C., Wei, M. & Yu, J. [2009] “Chaos generator based
on a PWL memristor,” Int. Conf. Communications,
This work is supported by the grants from the Circuits and Systems, ICCCAS, pp. 944–947.
National Natural Science Foundation of China (No. Li, H. F., Wang, L. D. & Duan, S. K. [2014] “A
61571185), and the Open Fund Project of Key Lab- memristor-based scroll chaotic system design, anal-
oratory in Hunan Universities (No. 15K027). ysis and circuit implementation,” Int. J. Bifurcation
and Chaos 24, 1450099-1–10.
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