Technical Note

TN_158

What is the Camera Parallel

Interface?

Version 1.0

Issue Date: 2015-03-23

This technical note explains the basics of the Camera Parallel Interface, a
feature of FTDI MCUs.

Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the
user agrees to defend, indemnify and hold FTDI harmless from any and all damages, claims, suits
or expense resulting from such use.

Future Technology Devices International Limited (FTDI)

Unit 1, 2 Seaward Place, Glasgow G41 1HH, United Kingdom
Tel.: +44 (0) 141 429 2777 Fax: + 44 (0) 141 429 2758
Web Site: http://ftdichip.com
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

Table of Contents
1 Introduction .................................................................................................................................... 2
2 Camera Parallel Interface................................................................................................................ 3
2.1 Signals ..................................................................................................................................... 3
2.1.1 I2C Control Signals ........................................................................................................... 3
2.1.2 Parallel Data Signals ........................................................................................................ 4
2.2 Typical Interconnect................................................................................................................ 5
2.3 Data Format ............................................................................................................................ 6
2.4 Other Image Sensor and Camera Interfaces ........................................................................... 7
3 Typical Applications ........................................................................................................................ 8
4 What FTDI Offer .............................................................................................................................. 9
5 Contact Information...................................................................................................................... 10
Appendix A – References ...................................................................................................................... 11
Document References....................................................................................................................... 11
Acronyms and Abbreviations ............................................................................................................ 11
Appendix B – List of Tables & Figures ................................................................................................... 12
List of Tables ..................................................................................................................................... 12
List of Figures .................................................................................................................................... 12
Appendix C – Revision History .............................................................................................................. 13

1
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

1 Introduction
Many embedded systems benefit from the use of a camera. An embedded camera is typically
comprised of three parts: lens assembly, image sensor(s) and the digital interface.
Over the years, the MIPI Alliance have specified successive camera digital interfaces: Camera
Parallel Interface (CPI), Camera Serial Interface 1 (CSI-1), Camera Serial Interface 2 (CSI-2), and
Camera Serial Interface 3 (CSI-3). This technical note focuses on the CPI.
Although the MIPI Alliance (www.mipi.org) claims there is no acronym associated with “MIPI”, it is
often referred to as the “Mobile Industry Processor Interface”.
The MIPI Specification is a set of standards adopted by the MIPI Alliance for various mobile
product functions.

2
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

2 Camera Parallel Interface

An image sensor captures images at a particular rate and makes the corresponding data available
through one of several digital interfaces. Shown here is the OmniVision OV7675 VGA sensor:

Figure 2.1 - Typical Image Sensor

Image sensors are coupled with a lens to become a camera module. The camera modules can
then be mounted in an assembly.
Shown here is the OmniVision OVM7692 CameraCubeChip™ – a complete camera module with the
Camera Parallel Interface:

Figure 2.2 - Typical Camera Module

The CPI is one of the original image sensor interfaces specified by the MIPI Alliance. It consists of
two portions: an I2C bus to control the interface and a parallel bus for the image data itself.

2.1 Signals

2.1.1 I2C Control Signals

The I2C bus is used in many applications, such as a personal computer System Management Bus to
identify and control various features of the system. It is also used for monitoring and control of
different devices. In this case, the I2C bus is used to control the various registers of the camera
module.
The I2C bus consists of two signals: SDA (data) and SCK (clock). The I2C signals are connected in
a daisy-chain multi-drop configuration. An MCU provides the I2C master used to communicate
with the camera configuration interface. The typical interface voltage of a camera module is 1.5V
to 2.8V. Each signal is driven in an open-drain configuration where only logic zeroes are
transmitted. A logic 1 relies on the pull-up resistor on the bus. Multiple devices can be connected
to a single bus in a daisy-chain, multi-drop configuration.

3
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

Image from www.i2c-bus.org

Figure 2.3 - Typical I2C connection

A common 7-bit or 10-bit addressing scheme is used by the I2C master to identify and select a
particular I2C slave for communication.

Image from www.i2c-bus.org

Figure 2.4 - I2C signaling

2.1.2 Parallel Data Signals

An 8-bit parallel link connects to the video data bus from an image sensor. The sensor also
provides Vertical SYNC (VSYNC), Horizontal Reference (HREF) and Pixel clock (PCLK) timing
signals. The parallel interface is unidirectional. All parallel signals are transmitted by the camera
module and received by the controlling MCU.
Image data is output for each rising edge of PCLK. HREF is high while clocking out active image
data for each scan line. VSYNC is pulsed high at the start of each frame. Refer to the camera
module datasheet for timing specifications for these signals.

4
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

VSYNC
VREF
VREF (For Illustration Only)

Active Sensing
492 Rows

480 Lines Region

640 Pixels

656 Columns

Image CLK
HSYNC
HREF
RGB555 or RGB565
RGB Pixel Data

Figure 2.5 - Typical Parallel Interface Timing

The figure above shows how the signals are related. A “VREF” signal is shown for illustration,
though it is not an actual signal output from the sensor. The image clock is one clock per pixel.
The actual PCLK is 2x the frequency since the data for each pixel consists of 16-bits being clocked
on an 8-bit interface. The actual number of columns and rows will vary with each different sensor
or camera module. Refer to the device’s datasheet for the actual values.

2.2 Typical Interconnect

Both I2C and parallel portions of the CPI will connect to a MCU that supports the interface (SDA,
SCL, D7:0, PCLK, VSYNC, and HREF). The voltage levels required at each end of the interface may
indicate the need for level shifters. The image below shows the connections.

5
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

Image from OmniVision OVM7692 Product Brief

Figure 2.6 - Typical Image Sensor Block Diagram

The MCP, MCN, MDP and MDN signals are not used in the case of the CPI. SIOC and SIOD are the
I2C SCL and SDA, respectively.

2.3 Data Format

There are several ways that camera modules format the data. One common method is to output
the data in a packed pixel 2-byte format. RGB565 (16-bit) and RGB555 (15-bit) modes are shown
here:

Mode Byte D7 D6 D5 D4 D3 D2 D1 D0

RGB565 First R4 R3 R2 R1 R0 G5 G4 G3

Second G2 G1 G0 B4 B2 B2 B1 B0

RGB555 First X R4 R3 R2 R1 R0 G4 G3

Second G2 G1 G0 B4 B2 B2 B1 B0

Table 2.1 - Color Encoding on Pixel Data

Each image point takes two clocks to send the full pixel data to the MCU. For 16-bit encoding,
65,536 colors can be represented. For 15-bit encoding, 32,768 colors can be represented.
Other formats may be available as well. Some only require one byte per pixel; however, the color
depth will be limited. YUV422 is one of these formats. Data information is conveyed in luminance
and chrominance rather than direct red, green and blue.

2.4 Frame rates

A single scan of a frame can take a snapshot or still image. When looking at streaming video, the
frame rate becomes important. A full frame consists of the entire image including the leading and

6
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

trailing sections beyond the active image area – the “front porch” and “back porch” in analog video
terminology. Referring to Figure 2.5, the overall frame is 656x492 for the 640x480 image. Each
pixel takes two PCLK cycles – one for each byte – so the number of pixel clocks to capture a full
frame is:
2 𝑏𝑦𝑡𝑒𝑠
656 (ℎ𝑜𝑟𝑖𝑧𝑜𝑛𝑡𝑎𝑙) ∗ 492 (𝑣𝑒𝑟𝑡𝑖𝑐𝑎𝑙) ∗ = 645504 𝑃𝐶𝐿𝐾 𝑐𝑦𝑐𝑙𝑒𝑠 𝑝𝑒𝑟 𝑓𝑟𝑎𝑚𝑒
𝑝𝑖𝑥𝑒𝑙
For a theoretical maximum PCLK rate of 25MHz, the maximum number of frames per second is:
25𝑀𝐻𝑧
= 38.7 𝑓𝑟𝑎𝑚𝑒𝑠 𝑝𝑒𝑟 𝑠𝑒𝑐𝑜𝑛𝑑 (𝑓𝑝𝑠)
645504 𝑃𝐶𝐿𝐾 𝑝𝑒𝑟 𝑓𝑟𝑎𝑚𝑒
In generic terms:
𝑀𝑎𝑥𝑖𝑚𝑢𝑚 𝑠𝑢𝑝𝑝𝑜𝑟𝑡𝑒𝑑 𝑃𝐶𝐿𝐾
𝑇ℎ𝑒𝑜𝑟𝑒𝑡𝑖𝑐𝑎𝑙 𝐹𝑟𝑎𝑚𝑒 𝑅𝑎𝑡𝑒 =
𝐵𝑦𝑡𝑒𝑠
𝐻𝑜𝑟𝑖𝑧𝑜𝑛𝑡𝑎𝑙 𝑠𝑖𝑧𝑒 ∗ 𝑉𝑒𝑟𝑡𝑖𝑐𝑎𝑙 𝑠𝑖𝑧𝑒 ∗
𝑝𝑖𝑥𝑒𝑙
In practice, the actual frame rate is usually slower due to the MCU processing of the incoming
data.

2.5 Other Image Sensor and Camera Interfaces

The CPI is not unlike a parallel LCD interface. Both have a pixel clock, pixel data, and horizontal
and vertical reference signals. Data direction is the primary difference. The image sensor/camera
module sends data to the MCU while the LCD displays data from the MCU (or video controller).
The MIPI Alliance also have defined Camera Serial Interfaces, denoted CSI-1, CSI-2, or CSI-3.
The I2C portion remains. The parallel portion is replaced differential clock and data signals. CSI-1
has a single data pair and a single clock pair. CSI-2 can provide multiple data pairs. CSI-3 is an
extension of CSI-2 and accounts for additional protocol specifications and EMI concerns.

7
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

3 Typical Applications
There are many applications for embedded cameras and image sensors. The CPI and CSI
interfaces provide a well-defined interface for connection of these image devices to a MCU. Some
examples of where camera data is useful include:
 Security systems and surveillance
 Child monitors
 Production inspection systems
 Image recognition
 Mobile phones
 Internet connected camera
 Manned or unmanned aircraft
 Police & fire (vehicle dash-cam or on-person video recording)

8
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

4 What FTDI Offer

FTDI now offers the FT900 series microcontrollers that provide a connection for image sensors
over the industry standard MIPI Camera Parallel Interface (CPI). Full VGA (640x480) at up to
15fps can be achieved with the FT900 series camera interface. Higher rates are possible with
smaller images.

9
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

5 Contact Information

Head Office – Glasgow, UK Branch Office – Tigard, Oregon, USA

Future Technology Devices International Limited Future Technology Devices International Limited
Unit 1, 2 Seaward Place, Centurion Business Park (USA)
Glasgow G41 1HH 7130 SW Fir Loop
United Kingdom Tigard, OR 97223-8160
Tel: +44 (0) 141 429 2777 USA
Fax: +44 (0) 141 429 2758 Tel: +1 (503) 547 0988
Fax: +1 (503) 547 0987
E-mail (Sales) [email protected]
E-mail (Support) [email protected] E-Mail (Sales) [email protected]
E-mail (General Enquiries) [email protected] E-Mail (Support) [email protected]
E-Mail (General Enquiries) [email protected]

Branch Office – Taipei, Taiwan Branch Office – Shanghai, China

Future Technology Devices International Limited Future Technology Devices International Limited
(Taiwan) (China)
2F, No. 516, Sec. 1, NeiHu Road Room 1103, No. 666 West Huaihai Road,
Taipei 114 Shanghai, 200052
Taiwan , R.O.C. China
Tel: +886 (0) 2 8791 3570 Tel: +86 21 62351596
Fax: +886 (0) 2 8791 3576 Fax: +86 21 62351595

E-mail (Sales) [email protected] E-mail (Sales) [email protected]

E-mail (Support) [email protected] E-mail (Support) [email protected]
E-mail (General Enquiries) [email protected] E-mail (General Enquiries) [email protected]

Web Site

http://ftdichip.com

System and equipment manufacturers and designers are responsible to ensure that their systems, and any Future Technology
Devices International Ltd (FTDI) devices incorporated in their systems, meet all applicable safety, regulatory and system-level
performance requirements. All application-related information in this document (including application descriptions, suggested
FTDI devices and other materials) is provided for reference only. While FTDI has taken care to assure it is accurate, this
information is subject to customer confirmation, and FTDI disclaims all liability for system designs and for any applications
assistance provided by FTDI. Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the
user agrees to defend, indemnify and hold harmless FTDI from any and all damages, claims, suits or expense resulting from
such use. This document is subject to change without notice. No freedom to use patents or other intellectual property rights is
implied by the publication of this document. Neither the whole nor any part of the information contained in, or the product
described in this document, may be adapted or reproduced in any material or electronic form without the prior written consent
of the copyright holder. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park,
Glasgow G41 1HH, United Kingdom. Scotland Registered Company Number: SC136640

10
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

Appendix A – References

Document References
FT900 Datasheet
I2C bus
MIPI Alliance
MIPI Camera Interfaces
OmniVision sensor with parallel interface (OV7675)
OmniVision CameraCubeChip camera module with parallel interface (OVM7962)

Acronyms and Abbreviations

Terms Description

CPI Camera Parallel Interface

CSI Camera Serial Interface

HREF Horizontal Reference

MIPI MIPI Alliance (MIPI itself is not an acronym)

PCLK Pixel Clock

VSYNC Vertical Sync

11
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

Appendix B – List of Tables & Figures

List of Tables
Table 2.1 - Color Encoding on Pixel Data ................................................................................ 6

List of Figures
Figure 2.1 - Typical Image Sensor ......................................................................................... 3
Figure 2.2 - Typical Camera Module ...................................................................................... 3
Figure 2.3 - Typical I2C connection ........................................................................................ 4
Figure 2.4 - I2C signaling ..................................................................................................... 4
Figure 2.5 - Typical Image Sensor Block Diagram ................................................................... 6

12
Copyright © 2015 Future Technology Devices International Limited
 Technical Note
TN_158 What is the Camera Parallel Interface?
Version 1.0

Document Reference No.: FT_001110 Clearance No.: FTDI# 443

Appendix C – Revision History

Document Title: TN_158 What is the Camera Parallel Interface?
Document Reference No.: FT_001110
Clearance No.: FTDI# 443
Product Page: http://www.ftdichip.com/MCU.html
Document Feedback: Send Feedback

Revision Changes Date

1.0 Initial Release 2015-03-23

13
Copyright © 2015 Future Technology Devices International Limited