Question 1

Use the table you will see below the questions or statements that follow, to fill in the most correct
answer.

1.1 A reverse biased diode acts like a(n)

a) Closed switch.
b) Open switch
c) Small resistance.
d) None of the above.

1.2. In an n-type semiconductor, the minority current carriers are

a) Free electrons
b) Protons.
c) Valence electrons
d) Holes.

1.3 To a First approximation, a forward biased diode is treated like a(n)

a) Open switch with infinite resistance.
b) Closed switch with a voltage of 0 V.
c) Closed switch in series with a battery voltage of 0.7 V.
d) Closed switch in series with a small resistance and a battery.

1.4 What is the approximate DC output voltage from a filtered bridge rectifier whose peak output
voltage is 30 V?
a) 19.1 V.
b) 30 V.
c) 9.5 V.
d) None of the above.

1.5. The output from an unfiltered half wave or full wave rectifier is a
a) Pulsating DC voltage.
b) Steady Dc voltage.
c) Smooth DC voltage.
d) None of the above.

1.6. The electrons in the n-type material migrate across the p-n junction to the p-type material
(electron flow).
a) The few conduction-band electrons on the n-type side being attracted to the valence-band holes
on the p-type side.
b) The excess conduction-band holes on the n-type side being attracted to the valence-band
electrons on the p-type side.
c) The excess conduction-band electrons on the n-type side being attracted to the valence-band
holes on the p-type side.
d) None of the above.

1
1.7 In a forward biased diode
a) The depletion region will widen.
b) The electrons in the n-type material are attracted toward the positive terminal of the voltage
source.
c) The holes in the p-type material are attracted toward the negative terminal of the voltage source.
d) None of the above.

1.8 As temperature increases it adds energy to the diode.

a) It increases maximum reverse bias avalanche voltage.
b) It reduces the required forward bias voltage for reverse-bias conduction.
c) It increases the amount of forward current in the reverse-bias condition.
d) None of the above.

1.9 In the circuit below

a) VD1 = 0.3 V.
b) VD2 = 0.7 V
c) VD1 = VD2 = 0.7 V.
d) VD1 = VD2 = 0.3 V.

1.10 In the circuit below

a) VD1 = 0.3 V.
b) VD2 = 0.7 V
c) VD1 = VD2 = 0.7 V.
d) VD1 = VD2 = 0.3 V.

2
1.11 Assuming a sine wave input in the diagrams below, Figure 2 can be appropriately associated
only with

a) Figure 3 and figure 5.

b) Figure 4 and figure 6.
c) Figure 3 and figure 6
d) Figure 4 and figure 5.

1.12 In the circuit below, the output voltage is given by

a) VOUT = 12 V
b) VOUT = 0 V
c) VOUT = 11.3 V
d) VOUT = 10.6 V

1.13 Which of the following biasing techniques has the most unstable Q-point?
a) Emitter biasing.
b) Base biasing.
c) Collector biasing.
d) Voltage division biasing

1.14 Emitter bias with two power supplies provides a

a) Very stable Q-point.
b) Very unstable Q-point.

3
c) Large base voltage.
d) None of the above.

1.15 For a transistor operating in the active region

a) IC = βdc х IB.
b) VCC has little or no effect on the value of IC.
c) IC is controlled solely by VCC.
d) Both a) and b).

1.16 With voltage divider bias, how much is the collector-emitter voltage, VCE when the transistor is
cut-off?
a) VCE = ½ VCC.
b) VCE = VCC.
c) VCE = 0 V.
d) None of the above.

1.17 In the active region the collector-base junction is reverse-biased,

a) While the base-emitter junction is forward-biased.
b) While the emitter-collector junction is forward-biased.
c) While the base-collector junction is forward-biased.
d) While the base-collector junction is unbiased

1.18 A relationship can be developed between βdc and αdc based on IE= IC + IB that can result in
1
a) 𝛽 = 1− 𝛼.
𝛼
b). 𝛽 = 𝛼− 1
.
𝛼
c) 𝛽 = 1− 𝛼
.
𝛼
d) 𝛽 = 1+ 𝛼
.

1.19 A relationship can be developed between βdc and αdc based on IE= IC + IB that can result in
a) 𝐼𝐸 = (𝜷 + 𝟏)𝑰𝑩.
b). 𝐼𝐸 = (𝜶 + 𝟏)𝑰𝑩.
c) 𝐼𝐸 = (𝜶𝜷 + 𝟏)𝑰𝑩.
d) 𝐼𝐸 = (𝜷 + 𝜶)𝑰𝑩.

1.20 The circuit shown below is an example of a biasing technique called

a) Base Bias.
b) Emitter Bias.
c) Collector bias.
d) Voltage divider bias.

4
1.21 The diagram below represents the load line for a fixed bias circuit.

From the diagram, the IC at saturation, of the circuit is therefore

a) 10 μA.
b) 10 mA.
c) Zero.
d) None of the above.

Q No. a b c d

e.g. x

1.

2.
3.

5
4.
5.

6.
7.

8.
9.

10.
11

12
13

14

15
16

17
18

19
20

21
22

6
Question 2 [21]

The transformer shown in the figure below has a turn’s ratio of NP =4: NS =1. Assume the 2nd diode
approximation. Determine:
a) The name of this type of circuit [2]
b) The peak secondary voltage for each transformer section (VS). [2]
c) Which diodes conduct during the (+)ve cycles and which ones during the (-)ve cycles. [2]
d) The drawing of the output signal based on the present circuit connections for the positive cycles
only. Show at least 3 cycles. [2]
e) Repeat the above for the negative cycles only. Show at least 3 cycles. [2]
f) The peak output voltage (Vout (pk)) across RL if the components D1 to D4 are to be taken into
consideration. [2]
g) The drawing of the final signal when displayed on the oscilloscope from RL [3]
h) The average output voltage (DC output voltage) (VDC) across RL.
i) The peak inverse voltage (PIV) for each diode. [2]
j) The peak to peak ripple voltage (Vp-p) and the ripple factor (rf) if a 1000µF and a load of 220Ω
were connected after the D components. [4]

a)

Bridge rectifier.

b)
𝑁𝑆 1
𝑉𝐶𝐷(S) = 𝑉𝐴𝐵(𝑃) × 𝑁𝑃
= 230 𝑉 × 4
= 57.5 𝑉

c)

Positive: D2 and D4 Negative: DI and D3

d)

7
e) Repeat the above for the negative cycles only. Show at least 3 cycles. (2)

f)

Centre-Tap Voltage:
𝑉𝑆 57.5 𝑉
𝑉𝑆1 = 𝑉𝑆2 = = = 28.75 𝑉
2 2
Secondary peak voltage:
𝑉𝑆
𝑉𝑆1(𝑝𝑘) = 𝑉𝑆2(𝑝𝑘) = √2 × = √2 × 28.75𝑉 = 40.65 𝑉
2
Peak output voltage across RL:

𝑉𝑜𝑢𝑡(𝑝𝑘) = 𝑉𝑆1(𝑝𝑘) − 2 × 𝑉𝐷 = 40.65𝑉 − (2 × 0.7𝑉) = 39.25 𝑉

g)

h)

𝑉𝐷𝐶 = 0.636 × 𝑉𝑜𝑢𝑡(𝑝𝑘) = 0.636 × 39.25 𝑉 = 24.96 𝑉

I)

8
 𝑃𝐼𝑉 = −𝑉𝑆1(𝑝𝑘) + 𝑉𝐷 = −40.65 𝑉 + 0.7𝑉 = −39.95 𝑉

J) Calculate the peak-to-peak ripple voltage of the signal produced if a 1000µF and a load of
220Ω were connected after the D components. (6)

Discharge time t for the capacitor:

𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 = 2 ∗ 60 𝐻𝑧 = 120 𝐻𝑧
1
𝑃𝑒𝑟𝑖𝑜𝑑 = 120 𝐻𝑧 = 8.33 𝑚𝑠=t (Discharge time t for the capacitor)

Peak-to-peak ripple voltage:

−𝑡 −8.33 𝑚𝑠
( )
𝑉𝑟𝑖𝑝𝑝𝑙𝑒 = 𝑉𝑜𝑢𝑡(𝑝𝑘) × (1 − 𝑒 𝑅𝐿 𝐶 ) = (1 − 𝑒 220𝛺∗1000𝑢𝐹 ) × 39.25 𝑉 = 1.46 𝑉𝑝−𝑝

Ripple Factor:
𝑉𝑟𝑖𝑝𝑝𝑙𝑒 1.46
𝑟= 𝑉𝑑𝑐
= 24.96 = 0.059

9
Question 3 [10]

The diagram below represents the characteristic of a Common Emitter configuration. Suppose (a) =
0µA , (b) = 10µA and (c) = 50µA. Answer the questions that follow below:

a) What regions are represented by (1), (2) and (3). [3]

b) What information or name is represented by (a) = 0µA , (b) = 10µA and (c) = 50µA. [1]
c) Name the axis marked (4) and (5). [2]
d) The graphs plotted, what information are they representing? [2]
e) What effect does the change in values marked from (a), to (b) and to (c) have on the operation of
this transistor? [2]

a)

(1): Cut-Off
(2): Saturation
(3): Active

b)
Constant Base Currents, IB

c)
(4): IC
(5): VCE

d)

Transistor Output Characteristics: Ic vs VCE for constant IB values.

e)

As the IB increases, the more (or higher) the Collector Current flows.

10
Question 4 [6]

From the circuit shown below. Determine:

a) The maximum current through the Zener diode. [2]
b) The current passing through the camera if it has a load resistance of 100Ω. [2]
c) The rated Zener current. [2]

9.1

𝑉𝐼𝑁 − 𝑉𝑍 12𝑉 − 7.5𝑉

𝐼𝑍 = = = 136.3𝑚𝐴
𝑅 33
9.2

𝑉𝑍 7.5 𝑉
𝐼𝑅𝐿 = = = 75𝑚𝐴
𝑅𝐿 100

9.3

𝑃𝑍𝑀 2𝑊
𝐼𝑍𝑀 = = = 266.7𝑚𝐴
𝑉𝑍 7.5 𝑉

11
Question 5 [4]

With the aid of diagrams show how the N-channel differs from a P-channel J-Fet. (4)

Question 6 [4]

Draw the full block diagram of a power supply and show the shape of the outputs for each section [4]

12
Question 7 [23]

The transformer shown in the figure below has a turn’s ratio of NP =4: NS =1. Assume the 2nd
diode approximation. Determine:
a) The name of this type of circuit and its purpose. [2]
b) The peak secondary voltage for each transformer section (VS1 (pk) and VS2 (pk)). [6]
c) The peak output voltage (Vout (pk)) and the average output voltage (DC output voltage) (VDC)
across RL. [4]
d) The drawing of the output wave form of this circuit. [3]
e) The DC load current (IL). [2]
f) The peak to peak ripple voltage (Vp-p) and the ripple factor (rf). [4]
g) The peak inverse voltage (PIV) for D1. [2]

a)
Type: Centre-Tapped Full-wave Rectifier.
Purpose: Rectification.

b)

Secondary Transformer Voltage:

𝑁𝑆 1
𝑉𝑆 = × 𝑉𝑃 = × 220𝑉 = 55𝑉
𝑁𝑃 4
Centre-Tap Voltage:
𝑉𝑆 55𝑉
𝑉𝑆1 = 𝑉𝑆2 = = = 27.5𝑉
2 2
Secondary peak voltage:
𝑉𝑆
𝑉𝑆1(𝑝𝑘) = 𝑉𝑆2(𝑝𝑘) = √2 × = √2 × 27.5𝑉 = 38.89𝑉
2

c)

Peak output voltage across R1:

𝑉𝑜𝑢𝑡(𝑝𝑘) = 𝑉𝑆1(𝑝𝑘) − 𝑉𝐷 = 38.89 𝑉 − 0.7 𝑉 = 38.19 𝑉

With 2nd diode approximation considered, the average output voltage (DC output voltage) across
R1:
𝑉𝑎𝑣𝑒 = 𝑉𝐷𝐶 = 0.636 × 𝑉𝑜𝑢𝑡(𝑝𝑘) = 0.636 × 38.19𝑉 = 24.29 𝑉

d)
Drawing of the output wave form of this circuit:

13
e)
The DC load current:
𝑉𝐷𝐶 23.73𝑉
𝐼𝐿 = = = 237.3 𝑚𝐴
𝑅𝐿 100

f)

Peak-to-peak ripple voltage:

−𝑡
𝑉𝑟𝑖𝑝𝑝𝑙𝑒 = 𝑉𝑠1(𝑝𝑘) ( 1 − 𝑒 𝑅𝐿 𝐶 ) = 0.32 𝑉𝑝−𝑝
Ripple Factor:

𝑉𝑟𝑖𝑝𝑝𝑙𝑒 0.32
𝑟𝑓 = == = 0.013
𝑉𝑑𝑐 24.73

g)

Peak Inverse Voltage:

𝑉𝑃𝐼𝑉 = −𝑉𝑆1(𝑝𝑘) + 𝑉𝐷 = −38.89 𝑉 + 0.7 𝑉 = −38.19 𝑉

14
Question 8 [6]

a) Draw the circuit of a Full-wave Bridge Rectifier with primary protection and smoothing action. [3]
b) Draw the resultant signal after of the circuit in question (a) [3]

a)

b)

15
Question 9 [18]

The transformer shown in the Figure below has a turn’s ratio of NP =5: NS =1. Assume the 2nd
diode approximation. Calculate:
a) The peak secondary voltage for each transformer section (VS1 (pk) and VS2 (pk)). [6]
b) The peak output voltage (Vout (pk)) and the average output voltage (DC output voltage) (VDC)
across RL. [4]
c) The DC load current (IL). [2]
d) The peak inverse voltage (PIV) for D1 and [2]
e) The frequency (f) and the period (T) of the output waveform. [4]

a)

Secondary Transformer Voltage:

𝑁𝑆 1
𝑉𝑆 = × 𝑉𝑃 = × 120 𝑉 = 24 𝑉
𝑁𝑃 5

Centre-Tap Voltage:
𝑉𝑆 24 𝑉
𝑉𝑆1 = 𝑉𝑆2 = = = 12 𝑉
2 2
Secondary peak voltage:
𝑉𝑆 24
𝑉𝑆1(𝑝𝑘) = 𝑉𝑆2(𝑝𝑘) = √2 × = √2 × = √2 × 12 = 16.97 𝑉
2 2
b)

Peak output voltage across RL:

𝑉𝑜𝑢𝑡(𝑝𝑘) = 𝑉𝑆1(𝑝𝑘) − 𝑉𝐷 = 16.97 − 0.7 = 16.27 𝑉

The average output voltage (DC output voltage) across RL:

𝑉𝑎𝑣𝑒 = 𝑉𝐷𝐶 = 0.636 × 𝑉𝑜𝑢𝑡(𝑝𝑘) = 0.636 × 16.27 𝑉 = 10.35 𝑉

c)

The DC load current:

16
 𝑉𝐷𝐶 10.35𝑉
𝐼𝐿 = = = 103.5 𝑚𝐴
𝑅𝐿 100

d)

Peak Inverse Voltage:

𝑉𝑃𝐼𝑉 = −𝑉𝑆(𝑝𝑘) + 𝑉𝐷 = −33.94 + 0.7 = −33.24 𝑉

e)

The frequency:

𝑓𝑜𝑢𝑡 = 2 ∗ 𝑓𝑖𝑛 = 2 × 60 = 120 𝐻𝑧

The period:

1 1
𝑇= = = 8.33 𝑚𝑠
𝑓𝑜𝑢𝑡 120

17
Question 10 [13]

The drawing below represents one of the transistor biasing configurations. By writing inside the diagram,
indicate what transistor type, voltage biasing and the charge flow indicated by the arrows. [3]

a) What configuration is shown by this device should it be placed in an electronic circuit? [2]
COMMON COLLECTOR
b) What stand-out effect does the voltage VBB have on the charge carriers? [2]
BASE-COLLECTOR FORWARD BIASING
c) What stand-out effect does the voltage VCC have on the charge carriers? [2]
BASE-COLLECTOR JUNCTION FORWARD BIASING
d) Name the charge carriers indicated by the big arrow that will be responsible for the device to function
properly. [2]
HOLES
e) Draw the symbol of this device showing also the direction of charge flow into each terminal. [2]

18
Question 11 [23]

8.1 What is the combined purpose of R1 and R2 in the circuit below? [2]
To provide a fixed/stable biasing voltage at the base of the transistor

+VCC
+15 V

R1 RC
27 kW 1.2 kW

βDC = 200

R2 RE
12 kW 680 W

8.2 Calculate the following quantities:

VB: [2]
𝑅2 12000 Ω
𝑉𝐵 ≈ ( ) × 𝑉𝐶𝐶 = ( ) × 15 𝑉 = 4.62 𝑉
𝑅1 + 𝑅2 27000 Ω + 12000 Ω

VE: [2]
𝑉𝐸 = 𝑉𝐵 − 𝑉𝐵𝐸 = 4.62 𝑉 − 0.7 𝑉 = 3.92 𝑉

IE: [2]
𝑉𝐸 3.92 𝑉
𝐼𝐸 = = = 5.76 𝑚𝐴
𝑅𝐸 680 Ω

IC: [2]
𝐼𝐸 ≈ 𝐼𝐶 = 5.76 𝑚𝐴

IB: [2]
𝐼𝐶 0.00576 𝐴
𝐼𝐵 = = = 28.8 µ𝐴
𝛽 200

V C: [2]
𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 × 𝑅𝐶 = 15 𝑉 − 0.00576 𝐴 × 1200 Ω = 8.1 𝑉

VCE: [2]
𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸 = 8.1 𝑉 − 3.92 𝑉 = 4.18 𝑉 

IC(SAT): [2]
𝑉𝐶𝐶 15
𝐼𝐶(𝑆𝐴𝑇) = = = 7.97𝑚𝐴
𝑅𝐶 + 𝑅𝐸 1200 Ω + 680 Ω

19
VCE(CUT-OFF): [2]

𝑉𝐶𝐸(𝐶𝑈𝑇−𝑂𝐹𝐹) = 𝑉𝐶𝐶 = 15 𝑉

Draw the DC-load-line [3]

20
Question 9 [6]

a) Draw a circuit of a High-Pass Filter using an op-amp given that Vin = 2mV, Capacitor = 0.05µF, Rin = 1
kΩ and RF =20 kΩ. [3]
b) Calculate the Cut-Off frequency of this circuit. [3]

Drawing:

9.2 [3]

1 1
𝑓𝑐 = = = 3.183 𝑘𝐻𝑧
2𝜋𝑅𝑖 𝐶𝑖 2𝜋 × 1000 Ω × 0.05 × 10−6 𝐹

21
Question 9 [12]

a) Draw a circuit of a Low-Pass Filter using an op-amp given that Vin = 2mV, Capacitor = 0.05µF, Rin = 1
kΩ and RF =20 kΩ. [3]
b) Calculate the Cut-Off frequency of this circuit. [3]
c) Calculate the voltage gain, ACL at the Cut-Off frequency. [6]

Drawing:

b)

1 1
𝑓𝑐 = = = 1.591 𝑘𝐻𝑧
2𝜋𝑅𝐹 𝐶𝐹 2 × 𝜋 × 10000 Ω × 0.01 × 10−6 𝐹

c)

1 1
𝑋𝐶𝐹 = = = 15.9 Ω
2𝜋𝑓𝑐 𝐶𝑓 2 × 𝜋 × 1591𝐻𝑧 × 0.01 × 10−6 𝐹

𝑋𝐶𝐹 𝑅𝐹 15.9 Ω × 10000 Ω

𝑍𝐹 = = = 15.9 Ω
√𝑋 2 𝐶𝐹 +𝑅2 𝐹 √(15.9 Ω)2 𝐶𝐹 +(10000 Ω)2 𝐹

𝑍𝐹 15.9 Ω
𝐴𝐶𝐿 = − = = −0.0159
𝑅𝑖 1000 Ω

22