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Assignment 2 and 3

This document contains two assignments related to digital electronics. Assignment II contains 7 questions about flip flops, latches, adders, counters and VHDL modeling. Assignment III contains 5 questions about logic gates, memory cells, RAM cells, read/write operations and analog-digital converters. The assignments require circuit diagrams, truth tables, explanations and short notes on various digital electronics concepts and components.

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Varun
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17 views

Assignment 2 and 3

This document contains two assignments related to digital electronics. Assignment II contains 7 questions about flip flops, latches, adders, counters and VHDL modeling. Assignment III contains 5 questions about logic gates, memory cells, RAM cells, read/write operations and analog-digital converters. The assignments require circuit diagrams, truth tables, explanations and short notes on various digital electronics concepts and components.

Uploaded by

Varun
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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ASSIGNMENT II

Course Code: EP-207 Branch: Engineering Physics


Course Name: Digital Electronics Semester: IIIrd
(Engineering Analysis and Design) Academic Session: 2022-23
Submission Date: Nov 15, 2022
Ques. 1 Write a short note on SR, JK, D, and T flip flop. Design its circuit diagram, truth
table, and excitation tables.
Ques. 2 Explain how the addition of a propagation-delay-based one-shot circuit in Fig. 1 to
the enable input of an S-R latch changes its behaviour. Specifically, reference your answer to
a truth table for this circuit.

Fig. 1 Circuit diagram


Ques. 3 Answer the following questions:
(a) Why the latches have negative hold time?
(b) What is the difference between latch/ flip-flop and SRAM?
(c) What is setup and hold time in NAND gate based D flip flop?
(d) What is the required flip flop in T to D flip flop conversion?
Ques. 4 Discuss a carry look ahead adder. Explain its working, advantages and disadvantages
with appropriate diagrams and truth table.
Ques. 5 Design a simple 4-bit ring counter by using D flip flops. The counter should count in
the following order: 1000, 0100, 0010, 0001, 1000, 0100, 0010, 0001, 1000, 01000….
Ques. 6 Using J-K flip flops design a synchronous counter to count cyclically in the
following sequence 5, 7, 1, 6, 4, 0.
Ques. 7 Discuss the differences between structural, dataflow and behavioural modelling in
VHDL.
ASSIGNMENT III
Course Code: EP-207 Branch: Engineering Physics
Course Name: Digital Electronics Semester: IIIrd
(Engineering Analysis and Design) Academic Session: 2022-23
Submission Date: Nov 15, 2022

Ques. 1 Write a short note on DTL, TTL, ECL, I2L logic gates, CMOS Gates and their
important parameters along with comparisons.
Ques. 2 How are memory cells classified? Discuss the organization of a ROM cell.
Ques. 3 What are MOSFET RAM cell, dynamic RAM cell, Bipolar RAM cell? How are they
different from a conventional RAM cell? Discuss with block diagrams/ flow diagram/
figures.
Ques. 4 Discuss the read and write operation of a RAM cell. What are the advantages and
disadvantages of a memory expansion process?
Ques. 5 Write a note on digital to analog and analog to digital converters with their
significance, advantages and disadvantages in VLSI industry.

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