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Digital Backend The Role and Creation of Track

The document discusses the role and creation of routing tracks in digital backend design. It defines a track as a continuous routing path generated by EDA tools based on metal pitch. Tracks are used to describe cell height and ensure pins align with routing resources. The document provides an example script that removes and recreates ME2 tracks within a core bounding box to achieve pin-on-track alignment for a 6P5T cell during placement.

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RAZ
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52 views

Digital Backend The Role and Creation of Track

The document discusses the role and creation of routing tracks in digital backend design. It defines a track as a continuous routing path generated by EDA tools based on metal pitch. Tracks are used to describe cell height and ensure pins align with routing resources. The document provides an example script that removes and recreates ME2 tracks within a core bounding box to achieve pin-on-track alignment for a 6P5T cell during placement.

Uploaded by

RAZ
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Digital backend: the role and creation of track

blog.csdn.net/m0_61544122/article/details/128218896

1. Definition of track

According to the pitch size of each layer of metal in the LEF (or tech file), the EDA tool
automatically generates a continuous and regular routing track (routing track) for each
layer of metal inside the chip. The routing track refers to the routing path.

 tech lef example

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 tech file example

The TRACK information saved in DEF is as follows:

TRACKS Y 9000 DO 187 STEP 9000 LAYER M5 

Y: direction of TRACK

9000: start position of TRACK

DO: Number of TRACKs

STEP: Adjacent interval

LAYER: the number of layers used

2. The role of track


Use 6T, 7T, 9T, etc. to describe the height of the standard cell. For example, 7T is equal to
the height of 7 tracks (here is generally the horizontal track of M1 and M2). In general, the
pitch of the metal layer track involved in the winding (Spacing) is equal to min
spacing+min width (as shown below).

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 track icon

For the same process, the higher the cell (the more tracks), the faster the library, and the
larger the corresponding power consumption and area.

In order to reduce the winding length as much as possible when the standard cell comes
out of the pin, the track position is generally calibrated so that the pin on track of the
standard cell (that is, the center line of the pin shape coincides with the gold routing track
of the same layer, otherwise it is a waste of time to go out of the pin and turn to the track)
winding resources).

3. track creation

For example, in the case of 6P5T (6.5 track), the distribution of the track in each ROW is
different. In order to meet the pin on track, the following script (ICC2) is used to recreate
the track.

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1. #track pitch 0.1，core row高度0.65

2. remove_track -layer ME2

3. set height 0.65

4. set core_bbox [get_attribute [get_core_area] bbox]

5. set p [lindex [lindex $core_bbox 0] 0]

6. set q [lindex [lindex $core_bbox 0] 1]

7. set r [lindex [lindex $core_bbox 1] 0]

8. set s [lindex [lindex $core_bbox 1] 1]

9. set coord [expr $q + 0.025]

10. for {set i $q} {$i < $s} {set i [expr $i+$height]} {

11. lapped test $i

12. }

13. foreach j $test {

14. set coord1 [expr $j+0.025]

15. set y2 [expr $j+$height]

16. set bound_bbox "{$p $j} {$r $y2}"

17. create_track -bbox $bound_bbox -layer ME2 -space 0.1 -dir Y -coord $coord1

18. }

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  before fixing

 adjusted 

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