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8254 Timer

The document discusses the Intel 8253/8254 programmable timer/counter chip. It provides 3 key points: 1) The 8253/8254 is a timer IC that contains 3 independent 16-bit counters that can be programmed to generate delays and waveforms, offloading this task from the microprocessor. 2) Each counter on the chip can be independently programmed to operate in one of 6 modes to control the output signal, and can divide the input clock signal from 1-65,536 times. 3) The chip allows precise timing to be generated through software, freeing up the processor for other tasks, and was commonly used in early computer systems for functions like delay loops.

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Harisankar R N R 21BRS1524
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47 views

8254 Timer

The document discusses the Intel 8253/8254 programmable timer/counter chip. It provides 3 key points: 1) The 8253/8254 is a timer IC that contains 3 independent 16-bit counters that can be programmed to generate delays and waveforms, offloading this task from the microprocessor. 2) Each counter on the chip can be independently programmed to operate in one of 6 modes to control the output signal, and can divide the input clock signal from 1-65,536 times. 3) The chip allows precise timing to be generated through software, freeing up the processor for other tasks, and was commonly used in early computer systems for functions like delay loops.

Uploaded by

Harisankar R N R 21BRS1524
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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09-01-2023

Why do you need a dedicated Timer IC?


When a specialized IC is used for the generation of
delays and waveforms of different frequencies,
microprocessor becomes free from these tasks and this
minimizes the software overhead of the processor.
Computer systems usually have at least one hardware
timer.
These are typically digital counters that either increment
or decrement at a fixed frequency, which is often
configurable, and which interrupt the processor on
reaching zero.
8253 is one such hardware timer.

What is 8253 Timer?


Intel 8253 programmable Timer/ counter is a specially designed
chip for Intel microcomputer applications which require timing
and counting operations.
Designed for being compatible with INTEL microprocessors like
8085,8086, 80X86..
8254 is an advanced version of 8253.
8253/8254 are programmable using three 16-bit counters.
Each counter has 2 input pins, Clock & Gate, and 1 pin for
“OUT” output.
To operate a counter, a 16-bit count is loaded in its register.
On command, it begins to decrement the count until it reaches
0, then it generates a pulse that can be used to interrupt the
CPU.

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09-01-2023

Features of 8253 / 54
It has three independent 16-bit down counters.
It can handle inputs clocks from DC to 10 MHz.
These three counters can be programmed for either
hexadecimal or BCD count.
It is compatible with almost all microprocessors.
8254 has a powerful command called READ BACK command,
which allows the user to check the count value, the
programmed mode, the current mode, and the current status of
the counter.
Each timer may be programmed to operate in one of the six
modes, independent of the mode of operation of the other two
timers.
The timers are software programmable.
Each counter can be programmed separately to divide the
input frequency by a number from 1 to 65536 (216)

Functional Block Diagram of 8253

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09-01-2023

Pin Diagram and Address Decoding

Data Bus Buffer


Data Bus buffer is a tri-state bidirectional buffer that
communicates with CPU whenever (Chip Select) is
low.
Data is transmitted or received by executing the OUT
PORT and IN PORT instructions.
The functions of data bus buffer are
1. Programming the counters through the control
words
2. Writing count to the counters
3. Reading the count value from timers.

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09-01-2023

Control Register
The control word register is used to program the timers in
different modes and control their operations.
It is selected when A0 and A1 pins are 1,1. If
are low, it accepts information from the data bus buffer
and stores it in control word register.
The word stored in CR controls the operation mode of
each counter, selection of hexadecimal or BCD counting
and loading of each count register.
This register can be written into only; no read operation of
this content is available

Counters
Each of the timers has three pins associated with it. Clock
(CLK) input, gate (GATE) control input and output (OUT).
CLK - This clock input causes the timer to decrement.
Counters operate at HIGH to LOW transition (the negative
edge) of this clock input.
GATE - The gate input pin is used to initiate or enable
counting. The exact effect of the gate signal depends on
which of the six modes of operation is chosen.
OUTPUT- The output pin provides an output from the
timer. Its actual use depends on the mode of operation of
the timer. The counter can be read “on the fly” without
inhibiting gate pulse or clock input.

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09-01-2023

Operations for Various Control Inputs

Control Word Format

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09-01-2023

Modes of 8253
1. Mode 0 – Interrupt on Terminal Count
2. Mode 1 – Programmable Mono shot
3. Mode 2 – Rate Generator
4. Mode 3 – Square wave Generator
5. Mode 4 – S/w triggered Strobe
6. Mode 5 – H/w triggered Strobe

Mode 0: Interrupt on Terminal Count


Output is initially low after the mode is set.
Counter starts decrementing after the falling edge of the
clock, if the GATE input is high.
Output will remain low until the Counter reaches zero.
OUT then goes high and remains high until a new count
or a new Mode 0 Control Word is written into the Counter.

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Mode 1: Programmable one Shot


OUT is high until the count is loaded and the trigger is
applied (rising edge of the gate).
OUT will go low on the CLK pulse following a trigger and
will remain low until the Counter reaches zero.
OUT will then go high and remain high until the next count
is loaded or a trigger is applied.
If the gate is retriggered, the count value is reloaded
again

Mode 2: Rate Generator


 This Mode functions like a divide-by-N counter. (Gate is always high)
 OUT will initially be high. When the initial count has decremented to 1,
OUT goes low for one CLK pulse.
 OUT then goes high again, the Counter reloads the initial count and
the process is repeated.
 Mode 2 is periodic; the same sequence is repeated indefinitely. For
an initial count of N, the sequence repeats every N CLK cycles.

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Mode 3: Square Wave Generator


 Mode 3 is similar to Mode 2 except for the duty cycle of OUT signal.
 OUT will initially be high. When half the initial count has expired, OUT
goes low for the remainder of the count.
 Mode 3 is periodic; the sequence above is repeated indefinitely. An
initial count of N results in a square wave with a period of N CLK
cycles.
 If the loaded count value N is odd, for (N+1)/2 pulses, OUT remains
high and for (N-1)/2 pulses, it is low.

Mode 4: Software Triggered Strobe


OUT will be initially high. When the initial count expires,
OUT will go low for one CLK pulse and then go high
again.
Similar to Mode 2, except that the counter is not reloaded
automatically, count has to be reloaded.

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09-01-2023

Mode 5: Hardware Triggered Strobe


 OUT will initially be high.
 Counting is triggered by a rising edge of GATE.
 When the initial count has expired, OUT will go low for one CLK pulse
and then go high again.
 After writing the Control Word and initial count, the counter will not be
loaded until the CLK pulse after a trigger.

Engr 4862 Microprocessors

Example 1

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