Force XXI Battlefield Command Brigade and Below (FBCB2) Performance Specification for FBCB2 Appliqué+ JV5 (Dual Core) Computer System Government Document No.:_|_FBCB2-JV$-0001 1.0 12 June 2008 Prepared F. Project Manager Force XXI Battlefield Command Brigade and Below (FBCB2) (PM-FBCB2) SFAE-C3T-FB-TMD Ft. Monmouth, NJ 07703 Distribution Limited Further Distribution only as by PM-FECB2Version 1,0, FBCB2-IV5-0001 12 June 2008 ANGE RECORD Version Date Change Description Draft 10] 11 SEP 2007 | Spec 3.3 Draft for CDR, based upon v3.2 (later renamed EVA) Draft 1.1 in process copy as of 8/28/07 Draft 1.1 | 17 SEP 2007 | Incorporate some CDR action items, Added requirements fom program SOW. Completed some TBD and TBR items Draft 12] 19SEP 2007 | Incorporate comments fram limited review. Send out for broader Draft 3 40CT 2007 | Change from V4 version 3.3 to JV5 Version 1.0. Incorporate review comments as appropriate. Close more TBDs and TBRs. Make additional improvements based upon inform discoveries, Draft 14] 17 OCT 2007 | Change “shall” to guidance verbs for items that direct test activities and donot affect equipment performance, Added missing RVCRM reference paragraph numbers. Updated some RVCRM methods, 1.0 | 12JUN2008 | Update requirements for discoveries of qualification test preparations, Close out TBDs and TBRs, Formatting and limited wording clean up. Incorporate internal and customer comments, Increase KUMDL USB connector power/ground pin length to 0.1". Update Acceptranee Test methods. Incorporated review comments, 2of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 TABLE OF CONTENTS 1 scoPl 2 APPLICABLE DOCUMENTS. 2.1 Precedence of Specifications... ssitinnntnsnnnsinsessnnnsees 1B 2.2 Government Documents. 3 224° Specifications. 22.2 Standards. 223° Other Publications 22d Drawings ono 2.3 Non-Government Documents 1s 3. REQUIREMENTS. 3.1 Appliqué+JV3 Computer System Definitions 3.2. Characteristics, 1 Peformance Characteristics 3.2.1.1 Processor Unit (PU). 3.2.L.1.1 Central Processing Unit (CPU), 3.2.1.1. Basic Input/Output System (BIOS) 3.2.1.1.2 Operating System & Application Software Support 3.21.13 Removable Hard Disk Drive Cartridge (RHDDC) Interfaces .....20 3.21.14 Display Unit Interface (14), 2 3.21.15 Keyboard Interface. 2 3.2.1.1.6 Serial Input/Output Interfaces (13/4)... 321A Audio Interfaces JB. sennen 3.2.1.1.8 Expansion Interfaces IS)... 3.21.19 SVGA Interface (J6) 3.21110 Power Interface (J1). 3.2.1.141 Power Control 3.2.14.12 Processor Unit Thermal Management 3.2.1.113 Battery Power, 3.21114 Hour Meter... 3.21115 Year 2000 Compliance 3.2.1.146 PATAVUtility (DB32) Bay. B3.2QUAAT SATA (DB20) Bay css sssnnssnnnnnnsn sn BLAIR LAN PFS. occecnnnnnnnnnnn sennenninennnnsnninnae 36 3.2.1.119 TacLink/LAN Interface (J7) 36 3.2.1.1.20, RF Interfaces (J8-J10) 36 3.2AA.21 External SATA Interface (II) .acssnsstsnsssnnsinas I 3of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 3.2.1.1.22, Health, Status, and Logistics (HSL) Suppott...sssnmneen 37 3.2.1.2 Display Unit (DU) 3.21.24 Display Panel 3.21.22 Touch Screen sna USB Hub & Keyboard Interface (I2)....0:ennsmnnennnsin 39 3.2.1.2. 3.2.1.24 Bezel Function Keys 39 3.21.25 Bezel Control Keys 40 32 Indicat0P8. sess seonnninnniinncinnnsnnes A 3.2.1.2.7 DU Thermal Management .....c.ns:msinmsnsnnnnnnsnn 43 3.21.28 Processor Unit Interface (II)... seein 45 3.2.1.2.9 DU Night Vision (NVIS) Control, 45 3.2.1.3 Touch Screen Stylus with Tether 46 3.2.14 Keyboard Unit (KU 3.2.1.8 — Removable Hard Disk Drive Cartridge (RHDDC) 3.2.15. PATAJEIDE (DB32) Cartridges, 3.2.15.2 SATA (DB20) Cartridges 3.2.1.6 Appliqué+ IVS “Headless” Mode 3.2.2 Physical Characteristics .. 3.2.2.1 Mounting Constraints... 3.2.21. LRU Dimensions and Weights... 3.2.2.2 PU Mounting Provisions 32.221 PU Access, Ventilation and Sway Space Clearances 59 3 PATA RHDDC and Utility Tray Mounting Provisions within PU 6 3.2.2.2.3 SATA RHDDC Mounting Provisions within PU. 61 3.2.2.3 DU Mounting Provisions.......ecseun revvveresersersvone SP 3.2.2.3.1 DU Access, Ventilation and Sway Space c Clearances 66 3.2.2.4 KU Mounting Provision: 3.2.2.5 Physical Security Provisions ....0s0snsunnnnnenensensasanes OF 3.2.2.6 Sealed Design 70 3.2.2.7 Orientation 7 3.2.2.8 Interface Connectors. 71 3.2281 PU (1): Power Input eee TL 3.2.2.8.2 PU (J2): External Audio Interface ..cuunnnnnnnsnnsnsnnnne TE 32.283 PU (J3): COM Interface. abd 3.22.84 PU (J4): Display Unit Interface 7B 3.2.2.8.5 PU (15): Expansion Interface ...ucsscssssessessnssanssesassssansi 4 3.2.2.8.6 PU (J6): SVGA Interface 3.2.2.8.7 DU UI): PU Interface 3.2.2.8.8 DU (2): KU Interface wensVersion 1.0 3.2.2.8.9 KU (1): DU Interfitee wee 3.2.2.8.10 PATA RHDDCIUtih 3.2.2.8.11 Utility Tray: PU Multiple Pin Interface 3.22812. Utility Tray: PU RF Interface 3.22813 SATA RHDDC: PU Interface... 3.22814 PU (J7): TacLink/LAN Interface FBCB2-JV3-0001 12 June 2008 ‘Tray: PU Interface. 76 3.2.28.15 PU (J8-J10): Utility (DB32) Bay RF Interface 81 3.2.2.8.16 PU (J11): External SATA Interface .coucsonnnnnnsnsnnns 82 3.2.2.9 User Removal & Replacement of Components... nnn 82 323 Reserved. - - ap 324 Reliability........ - 3.24.1 MTBF Requirements and Analysis, 82 3.24.2 Reserved 243 3.2.5 Maintainability 3.2.5.1 3.252 3.2.6 Environmental Conditions, Reserved Repair . sen Diagnostics & Built-In-Tests. 83 3.2.6.1 Temperattre. cousins secant, 8 3.2.6.1 Operating Temperature... nesses BA 3.2.6.1.2 Storage Temperature. 84 3.2.6.1.3 Temperature Shock 84 3.2.6.1.4 Operational in the Temperature Range... cence BS 3.26.2 Vibration. cocemmnnnnnnnnnn 3.2.6.2.1 Aggravated Vibration, 3.2.6.2 Operational Vibration 3.26.3 Shock ‘Water Tightness Solar Radiation ATUIUEE. sss Opetating Humidity. Blowing Dust. Biological and Chemical Contamination. Explosive Atmospheres... Salt Fog Atmosphere Fungus 91 Electromagnetic Effects. 91 Electrostatic Discharge (ESD) .o..csscssensnnnnnnnsnnnn 91 Electromagnetic Radiation Sof 150Version 1.0 FBCB2-JV3-0001 12 June 2008 3.3 Design and Construction.uveue 331 Materials, Processes and Parts 33.11 Finish 33.1.2 Nuclear, Biological and Chemical (NBC)... 332 Reserved. 3.33 detentification and Marking... oF 3.33.1 Labels: Human Readable Information. 93 3.3.3.2 Labels: Machine Readable Bar Code Field... 9 3.3.3.3 Labels: Machine Readable Unique Item Identification (UID) Field..... 94 3.33.4 Sample Label... 294 334 Reserved. 95 3.3.5 Imerehungeabitity 95 3.3.6 Safer 95 BRT ReserVET scones on 96 4 QUALITY ASSURANCE PROVISIONS. 97 4.1 GENERAL. 97 414 Reliability for Quality Assurance. 7 4.1.2 Special Tests & Examinations... 97 AA21 Temperatiren ssn 97 41.2.2 Vibration... cnc sonmnninannnnnnnnnmnenmnesnmnnae OT 41.23 Shock 97 4.1.24 — Water Tightness 98 4.1.2.5 Electromagnetic Interference / Electromagnetic Compatibility (EMVEMC)... 4.1.2.6 Drop Test 98 4.1.2.7 Electroma; 98 4.128 — Reliability Demonstrations. 99 4.1.2.8.1 Reliability Demonstration Test... 299 A282 Reserved. svnsnninnnnninnnnsnnsnsnesnnses LOO 4.1.2.9 Solar Radiation 100 4.12.10 Altitude. 100 4.1.2.1 Explosive Atmosphere. 101 Salt Fog Atmosphere . 101 ElectroStatic Discharge (ESD) . 101 Power [email protected] somes LOL Biological and Chemical Contaminations ....0se:esmsnennnenon LOL Operating Humidity. 101 Blowing Dust, 102 102 Fault Coverage... 6 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 8 CARTRIDGE (RSSHDC) 9 4.2. FIRST ARTICLE TEST/QUALITY CONFORMANCE INSPECTIONS suse 103, 4.21 Verification Environmental Conditions 4.2.2 Failure and Retest PREPARATIONS FOR DELIVERY ..ccsnnnennneinnnnnnnnennnnnesninee 130 5.1 Packaging Requirements ..0...cocnnnn nnn ss nsnnnninininnnsniee 130 APPENDIX-A: ACRONYM AND ABBREVIATION LISTING .cssensenesneene 131 APPENDIX-B: PU — DU INTERFACE DEFINITIONS... 7.1 Signal Assignments . 7.2 Video Interface 7.3 Touch Screen Interface... sesseneeensenscunessnnsan svn 74 USB Interface 7.5 Power Interface 7.6 Indicator Link ..........cecsseccseesesesssesssecsessseunnseesseece 7.6.1 Poll Response Message Structure APPENDIX-C: OPTION - REMOVABLE SOLID STATE HARD DRIVE APPENDIX-D: OPTION - TACLINK MODEM. 91 SCOPE a nnnnnninininneesinineininn 9.2 Applicable Documents. ....e:eenninnnnin 93° Requirements o.cucounnnnnsnsnsnnininnnnnn 93.1 TacLink Modem Option Definition 9.3.2 Characteristics... 2.1 Performanee.. 9. Physical Requirements . 93.2.3 Reserved 9.3.24 Maintainability .oesennnnnnnsnen sen 93.2.5 Environmental Requirements 149 9.3.3 Design ane! Consiruction. 9.4 Quality Assurance. 941 Reliability for Quality Assurance 9.4.2 Special Tests & Examinations 9.4.2.1 TacLink Funtionality 9.4.3 First Article Tess/Quaitty Conformance Inspections . Fof 150Version 1,0, FBCB2-IV5-0001 12 June 2008 vr OF FIGURES Figure |: Appliqué+ JV Computer System Block Diagram 7 Figure 2: RHDDC Clearance in front of the PU svnnnsnnnnsnnvntsnnsnn 2 Figure 3: EIA~422 and EIA~423 Interface Circtits Joo esssnseninsnntnninnnsnninsnsinnnn sn Py Figure 4: Synchronous Port Interface Details... unuunnnnnsnnnsnnninnnnnnnnnsn 26 Figure 5: Audio Control Circuitry 27 Figure 6: In-Rush Current Profile of Extemal Protection Circ Figure 7: PU Circuit Breaker o.com Figure & DU Power (PWR) Buttor Figure 9; Battery BB-388A/U (Top View). Figure 10: Display Unit (DU) Block Diagram vss Figure Li: DU Front Bezel Function Keys ssn Figure 12: Bezel Control Keys & Indicators Layout Figure 15: Touch Sereen Stylus with Tether Figure 16: DU Installation Mount Assembly Top Plate. Figuié 17: Keyboard Unit (KU) Block Diagram. Figure 18: DU-KU Cable Orientation. Figure 19: RHDDC Block Diagram... Figure 20: Processor Unit Tap View Dimensions... Figure 21: Processor Unit Front View Dimensions, Figure 22: Processor Unit Left View Dimensions Figure 23: Processor Unit Right View Dimensions, Figure 24: Processor Unit Bottom Dimensions Figure 25: PU Mounting Brackets (881250-21 & -31).. Figure 26: PU Isolation Kit (872826- 1} and Top Plate (88 1250-1 Figure 27: PU Clearance far RHDDC Access & Rear Ventilation aso Figure 28: PU Clearance for 1/0 Connectors Access & Ventilation Figure 29: PU Isolation Mount Vibration Clearances in X-¥ dimension: Figure 30: PU Isolation Mount Vibration Clearances in 2 dimension onsen Figure 31: PATA RHDDC Physical Dimensions Figure 32: SATA RHDDC Side View. Figure 33: SATA RHDDC Top View 62 Figure 34: SATA RHDDC End View cocoon 263 Figure 35: Display Unit Top View Dimensions jc. mom 63 Figure 36: Display Unit Front View Dimensions 64. Figure 37: Display Unit Right View Dimensions, 65 Figure 38: Display Unit Mounting Plate with Stylus Holder (872879) 66 Figure 39: DU Clearances for /O Connectors Access & Ventil Figure 40: DU Isolation Mount Vibration Clearances in X-¥ dimensions ,Version 1,0, FBCB2-IV5-0001 12 June 2008 Figure 41: DU Isolation Mount Vibration Clearances in Z dimension... OT Figure 42: Keyboard Unit Top View Dimensions Figuré-43: Keyboard Unit Front View Dimension: Figure 44: Keyboard Unit Bottom View Dimensions, Figure 45: Keyboard Unit Handle Mounting Dimensions........ Figure 46: Keyboard Unit Stowage Box (872845) Figure 47: PU Locking Block Mount Holes on Front Face. Figure 48: DU Locking Block Mount Holes on Right Pace... Figure 49: RHDDC Interface Conmeet0r sess so Figure $0: Sample Label for 40. GB PATA Solid State Hard Drive... Table 25: Requirements Verification Cross Reference Matrix. Figure 51: Poll Response Message Structure. Figure $2: RHDDC utilizing a solid state driv Figure $3: PU Orientation Definition for Bradicy Instalation.. TABLE OF TABLES Table 1: DU Indicators Usage. 43 ‘Table 2: LRU Dimensions and Weights 32 Table 3: PU JI Pinout ...csssssisnsinasuivesnsatsonin sees ee Tabled: PU 32 Pinout... Table $: PU J3 Pinow Table 6: PU JS Pinout 4 Table 7: PU 36 Pinout oss Table 8: DU J2 Pinow Table 9: PU PATA Pinout Table 10: PU Utility (DB32) Bay Multiple Pin Connector Pinout... ‘Table 11: PU Utility Bay RF Connector #1 Pin Out ‘Table 12: PU Utility Bay RF Connector #2 Pin Out Bay RF Connector #3 Pin Oub sce Table 14: PU SATA (DB20) Bay Pinout.,....eseneseen ene Table 15: PU JT Pinout Table 16: 18 RF Connector Pin Out. ‘Table 17: 19 RF Connector Pin Gut, 81 ‘Table 18: 10 RF Connector Pim Out.,..j.esisniesinnnenseen sontnnntniinnsnnesnnn see 81 Table 19: PU Ji1 Pinout Table 20: Aggravated Vibrat 85 Table 21: Wheeled Vehicle Vibration Levels sss sssisinessnnsnnvnnnnnsee BT ‘Table 22: Alternative Shock Profile ..ussssususeinnnsnnusnsninasninnininnisienne 89 Table °$116 Maximum Currents 9 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 Table 24: Reliability Demonstration Environmental Profiles j.jssussenessieenssenaies 9F ‘Table 25: Requirements Verification Cross Reference Matrix. 104, Table 26: PU (4) and DU (JL) Connector Signal Assignment UIDU LVDS Timing soos eres Poll Response Message Fi€ldS.....cecosnn nnn ‘Table 29: Bradley Transverse Axis Vibration Profile ‘Table 30: Bradley Longitudinal Axis Vibration Profile Table 31: Bradley Vertical Axis Vibration Profile oo... onsen Table 32: RSSHDC Requirements Verification Cross Reference Matix ss. ss0nen 148 Table 3 : TacLink Modem Requirements Verification Cross Reference Matrix......cc0c0:e 150, 10 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 1 SCOPE ‘This specification establishes the performance requirements for the Force XXI Battle Command Brigade-and-Below (FBCB2) Appliqué+ JV'5 Computer System, designated AN/UYK-128(V). The Appligué+ JV5 computer is a subsystem within the FBCB2, installed within certain tactical ground vehicles and weapons platforms to provide Situational Awareness (SA) and Command and Control (C”) at the lowest levels of Army tactical forces. The system includes the Appliqué + JVS computer, interconnecting cables and installation kits appropriate to the host vehicle types; as well as external communications equipment such as radios, ete, The inclusions of interconnecting cables, installation kits as well as external communications equipment in this document are for reference only and are not parts of this specification, These items are not delivered (provided) with the Appliqué+ IVS computer systems, The Appliqué+ JVS computer subsystem is rugged for use in the military operational environments and is capable of continuous operation over the full set of environmental eonditions specified within this document. Exceptions to the operational requirements for stressing environments are deseribed in the appropriate paragraphs, The Appliqué+ JVS computer is comprised of the following four (4) Line Replaceable Units (LRUS}: (a) A Processor Unit (PU), without the Removable Hard Disk Drive Cartridge (b) A Removable Hard Disk Drive Cartridge (RHDDC) (PATA/EIDE andlor SATA interface) (©) A Display Unit (DU) with flat-panel color display and touch-sereen input capability, with tethered-remote operating capability up to 25 feet; and a touch screen stylus INFORMATIONAL: The touch screen stylus ix detivered untethered to the DU. The stylus is tethered to the Government furnished Appliqué Installation Kit display mount when a DU is installed into a vehicular plaaform, (d) A Keyboard Unit (KU) with backlit keypad which connects to the Display Unit, ‘The PATA and SATA drive bays are named after their primary disk drive interface. These bays are also known as DB32 and DB20 respectively. DBxx is a rarely used term that indicates the size of the drive bay by the number attached. In this case, 32 mm and 20 mm high bays are implied, This document uses the drive technology rather than size nomenclature as. the technology terms are in much wider circulation, The PATA technology is becoming absalete at the time the IVS PU was under development. The large installed base of PATA drives requires the IVS PU to be backwards compatible and contain a PATA (DB32) Bay. The impending PATA obsolescence requires the JV5 PU also to be compatible with SATA technology. Furthermore the PU has expansion capacity that ean be filled with various capability enabling circuitry. Examples of possible expansion functions are (but nat limited to) the following: (e} TacLink Radio Interface (f) SAASM receiver (a) Wireless LAN (802.11) Access Point ‘The Appliqué+ JV5 computer meets the requirements of the FBCB2 Program when installed ‘with an appropriate installation kit in the designated platform environment in “full configuration” as well as stand-alone “headless” applications, as defined later in section 3.2.1.6. The PU to DU interface cable is not delivered (provided) with the Appliqué+ IVS computer but is part of the IL of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 FBCB2 Installation Kit. Additionally, the following apply to all Appliqué* IVS. computer systems delivered compliant to these specifications. (h) The PU is backwards compatible with all previously fielded Display Units and Keyboard Units, (i) The DU is backwards compatible with all previously fielded Processor Units and Keyboard Units. () The KU is backwards compatible with all previously fielded Processor Units and Display Units. Note: The specifications may not be arranged in the most logical groupings. This is due to an effort to keep the numbering in alignment with previous revisions in order to maximize reuse of test and other documentation that call out this specification. 12 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 2 APPLICABLE DOCUMENTS ‘The following documents of the exact issue shown form a part of this document, to the extent specified herein. 2.1 Precedence of Specifications Where conflicts occur between the requirements specified in this document and that of any of the listed applicable documents in the following sections, the following precedence shall take place: (a) Customer supplied documentation (Contracts, Specifications, SOWs, etc.) (b) Requirements specified in this document. (c) Military Standards and Government Documents, (a) Non-Government & Industry Standards 2.2 Government Documents 2.2.1 Specifications Document Document Revision Issue Number Title Date FBCB2-IK-0001 | FBCB2, Performance Specifications for | 15.1 ‘05 November the FBCB2 Appliqué Installation Kits 2003, TVIFOIOIT FBCB? Platform ICD (Version 64) K 30 August 2004 PBCB2ICDHSL. | !etfuce Control Document for FBCB2 | —__1.0 TBD-37 00 ~ Appliqué Health, Status & Logistics Reporting 22.2. Standards Document Document Revision Issue Number ‘Title Date FED-STD-595 | Colors Used in Government BC) TT January Procurements 1994 General Specification for Connector, KD) 17 December (For Reference Only) | Electrical Circular, Miniature, High 1999 Density Quick Disconnect (Bayonet, Threaded and Breech Coupling), Environment Resistant, Removable Crimp and Hermetic Solder Contacts MIL-DTL-64159 | Coating, Water Dispersible Aliphatic a 6 MAR 2007 Polyurethane, Chemical Agent mn MIL-STD-1275 ical Circuit 28 Volt DC Transient D 29 August 2006 Characteristics for Military Vehicles MIL-STD-129___| Military Marking For Shipment and PB 29 October Storage 2004 MIL-STD-130 | Identification Marking of U.S, Military Mw TS June 2007 Property Change 1 13 of 150Version 1.0, FBCB2-IV5-0001 12 June 2008 Document Document Revi Tssue Number ithe Date MIL-STD-188-114 | Electrical Characteristics of Digital ACD) 13 December Interface Circuits 2001 MIL-STD-461___| Requirements for the Control of E 20 August 1959 Electromagnetic Interference Characteristics of Subsystems and Equipment MIL-STD-464 | Electromagnetic Environmental Effects a T8 March 1997 Requirements for systems MIL-STD-810 Environmental Test Methods & Engineering Guidelines E (Notice 1) 9 February 90) MIL-STD-2169 | High Altitude Electromagnetic Pulse B Environment 2.2.3 Other Publications Document Document Revision Issue Number Title Date 2OCFRI910.1000 | The Code of Federal Regulations, Title TJuly 1996 29, Section 19101000, Labor OCERITI.18S _ | Code of Federal Regulations, Tile 49, T October 1956 Section 173.185, Transportation AR 70-38 Research, Development, Test and TS September Evaluation of Materiel for Extreme 79 Climatic Conditions FM 3-115 Multiservice Tacties, Techniques, and ‘4 April 2006 Procedures for Chemical, Biolo Radiological, and Ni Decontamination MIL-HBDK-781__| Reliability Test Methods, Plans, and a T April 1996 (Reference only) | Environments for Engineering, Development, Qualification, and Production MIL-HDBK-183 _ | Chemical and Biological (CB) 13 October Contamination Avoidance and 990 Decontamination SEL Form 1183 | System Safety Design Verification 30 September Checklist (CECOM Supplement | to 1994 AR 385-16) 2.24 Drawings Document Document Revision Issue Number Title Date PN 861865 “Assembly, CPU Look c PN 861869 Keyboard Handle With Stiain Reliet B PN 861871 CPU Locking Bracket A PN 872826 CPU Isolation Kit Assembly H 14of 150Version 1.0 FBCB2-IV5.0001 12 June 2008 Document Document Revi Issue Number tle Date PN 872843 isplay Locking Provisions ¢ PN 872845 | Keyboard Stowage Box. Version Three F PN'872879 | Display Top Plate - RANI G PN.881250___| Assembly, Top CPU Mounting Plate D ON e127 | Dewing: Cable, Hamess Wiring B PN BBLS Document, W2 Cable Non-Government Documents Document Document Tssue Number Title Date 3M 16710 | SCA Touch Sereen Controller Users 2.0 | November 2003 ide ACPI ‘Advanced Configuration and Pawer RevI06 | 02 February Interface Specifications, (Intel- 999) Microsaft-Toshiba) Compact lash = and CompactFlash Specitwaion | Revsion | 16 February Association _| CF* 8nd CompactFlash Specificay 41 2007 CompactPCI 2.0 | Compact PCI Specifications Rev.0_) 01 October 1999 13951 -OX ASTM Standard Practice for 2004 Commercial Packaging TATTTA-D32-E | Interface between Data Terminal T0July 109T Equipment and Data Communications Equipment Employing Serial Binary Data Interchange EIA-422-B-94 | Electrical Characteristics of Balanced T3 April 1994 Voltage Digital Interface Circuits Electrical Chara Unbalanced Voltage Circuits December 1978 TEC 1000-4-2 Electromagnetic Compai Part 4: Testing and Measurement July 1999 ‘Techniques Section 2: ESD Immunity Test TEEE Std C62.38- | IEEE Guide on Flectrostatic Discharge 24 April 1995 1994 (ESD): ESD Withstand Capability Evaluation Methods (for Fleetror Equipment Subassemblies) 15 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 ‘Document Number ‘Document ‘Title Revi Tse Date TEEE 802.3 TEEE Standard for Information technology-Telecornmunications and information exchange between systems- Local and metropolitan area nenworks-- Specific requirements Part 3: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications 2005 IEEE P1386.1 IEEE Standard Physical and Environmental Layers for PCL Mezzanine Cards (PMC) 2001 INCITS 397:2005 Information Technology - AT Attachment with Packet Interface-7 (ATAVATAPE-7) [13 ] Intel 307017-001 Intel” 70 Controller Hub 7 (ICH?) 7 Intel High Definition Audio / AC’97 April 2005 ISOMEC 16022:2006 Information technology -- Automatic identification and data captur techniques -- Data Matrix: bar code symbology specification 2” Edition 15 September 2006 ISOMEC 16388 Information Technology — Automatic Identification and Data Capture Techniques — Code 39 Bar Code Symbology Specification 2™ Edition 15 May 2007 TSO-9001-2000 Quality systems - Model for Quality Assurance in Design/Development, Production, Installation and Servicing 2000 SATA-Intemational Organization (SATA-IO) Serial ATA Specifications Rev 2.5 UL 1950 Safety of Information Technology Equipment, Including Electrical Business Equipment 3" Edition USB HID VII Universal Serial Bus (USB) Device Class Definition for Human Interface Devices (HID) Finmvare Specification Final 27 June 2001 USB Specifications 2.0 sal Serial Bus (USB) ifieations 7 Apr 2000 VESA FPDM Flat Panel Display Measurement ‘Standard Version 1.0, Video Electronic Standards Association Ver 10 May 15, 199% 16 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 3 REQUIREMENTS 3.1 Appliquét JVS Computer System Definitions This section includes the physical and configuration characteristics of the Appliqué+ JVS computer system. The detailed specifications and performance characteristics of the system are defined in later sex +svoaucn Appliqué+ JV5; * Touch Screen: ! * USB 2.01Hub USB 2.0, +28 Vde 10/100 BascT (LAN) Power In * a? * Mouse 15] Ll TacLink SUS x vi 1 eo eh RE Ponts =+48-10] (al PU) 2} is, Ext... sata **} Core Duo Processor = * HDD Comtollers i = + Power Supplies * Temp Sensors i *UsB208u Figure 1: Appliqué+ JVS Computer System Block Diagram (b) A IVS computer consists of four (4) major Line Replaceable Units (LRUs); a Processor Unit (PU), a Display Unit (DU), a Keyboard Unit (KU) and one or more Removable Hard Disk Drive Cartridge (RHDDC). The Battery Tray, Utility Tray, and TacLink modem are Shop Replaceable Units (SRUs). (¢) The JV5 computer boundary is depicted via the red dash-dotted box. (d) The external devices, shown via dotted lines outside of the JVS computer boundary, are shawn here for reference only and do not constitute a part of these specifications, (@) The PU to DU cable and the extemal platform interface cables, shown via blue dashed lines are components af the FBCB2 Installation Kits and ate shown here for reference only, These cables do not constitute « part of these specifications, 17 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 (0) A standalone or “headless” configuration of the Appligué+ JVS computer system consists of a Processor Unit (PU) and a Removable Hard Disk Drive Cartridge (RHDDC) only. ‘The Display Unit (DU) and a Keyboard Unit (KU) are not included in this configuration. (See section 3.2.1.6.) (g) The PU and the RHDDC units are form, fit & functionally identical and interchangeable between the “full” and the “headless” configurations of the JVS computer systems. (See seetion 3.2.1.6.) (h) The operations for both configurations of the Appliqué+ JV5 computer systems are defined per the FBCB2 Platform Interface Control Document (JVIFIO1 1), Version 3.5 or later. (@) The PU also contains provisions for installation of a BB-388A/U or equivalent internal backup battery, (See section 3.2.1.1.13.) G) Pictures and line drawings in this specification depicting actual hardware are included for the purpose of describing the form, fit & functional requirements. 18 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 3.2 Characteristics This section provides the detailed physical requirements and operational performance characteristics of each of the four (4) LRUs of the Appliqué+ JVS computer system. Additionally, all environmental, reliability & maintainability, etc. requirements are also defined in these sections, Note; Optional functions specifications are provided in appendices for reference, 3.2.1 Performance Characteristics 3.2.1.1 Processor Unit (PU) ‘This section includes the performance and configuration characteristics af the Appliqué+ JVS computer system Processor Unit (PU), Detailed requirements for the LRUs are defined in later sections. Some of the LRUs within the PU can be accessed through a latched front door, The physical characteristics of the Appligué+ JVS5 computer system and its LRUs are also included in later sections. 3.2111 Central Processing Unit (CPU) The CPU meets the following requirements: (a) The CPU shall utilize a microprocessor and associated support chipsets compatible with the Intel Corp. x86 instruction set architecture (also known as the “Intel” Architecture”). (b) Processing performance of the CPU shall equal or exceed the processing performance of the Intel L2400 Core Duo™ processor operating at a clock rate of 1.66 GHz when thermal management permits full performance. (e) The CPU and support chipset architecture and configuration shall support an upgeade path, so that greater processing speed can be retrofitted into the Processor Unit at minimal or no incremental cost, (a) The architecture of the CPU shall use the Peripheral Component Interconnest (PC!) bus. (e) Reserved. (f) The video graphics control interface on the CPU board shall be provided via the microprocessor support chipset or a PCT bus interface. (2) The video graphic controller and associated video graphics _memory shall. support resolutions up to at least 1280 x 1024 pixels with a minimum of 256 colors (8 bits/pixe!). (h) The CPU board shall contain a minimum of 2 GB of suitable Random Access Memory as the main system memory, with provisions to increase the total system memory size to at least 4 GB. The microprocessor shall contain a minimum of 2 MB of Level 2 (L2) cache memory. 4G) Moved to seetion 3,2, 1.1. LA. (k) Maved to seetion 3.2.1.1.1.1. (1) The CPU shall provide PC compatible real time clock (time, day & date) functions, to support OS software. See section 3.2.1.1.2. (njThe RTC functions shall be battery-backed by an internal hold up battery installed om th CPU board, (n) The CPU board battery shall have a minimum life expectancy of three (3) years. (0) Moved to section 3.2.1.1.1.1. 19 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 3.2.1.LL1 Basie Input/Output System (BIOS) (a) The Basie Input Output System (BIOS) for the CPU board shall be stored in suitable non- volatile memory on the board, (b) The BIOS memory shall be reprogrammuble in-cireuit through an executable software application program (@) Hardware configuration parameters set through the BIOS shall also be stored on the CPU board in non-volatile (battery-backed) CMOS memory (or equivalent). (d) The selection of the CPU temperature limit settings and corresponding CPU clock throttle values shall be done via BIOS settings, See section 3.2.1, 1,12 far further information, {@) The BIOS shall be common for the “full-up” or the “headless” configurations of the computer system. (f) The BIOS shall support the Advanced Configuration Power Interface (ACPI) functionality. (2) The BIOS shall support selection of the OS boot device between the two RHDDC Bays with the internal SATA RHDDC being the default when both are installed, (h) The BIOS shall only permit booting from PU bay installed RHDDCs, (i) The BIOS shall implement a 10-character password based protection scheme for accessing and making changes to the BIOS. G) During Linux OS operation, a IVS vendor provided BIOS Update Utility (if called by the host SW) [1] shall evaluate if the RHDDC contains a newer BIOS version than that executing. If the RHDDC BIOS version is newer, the BIOS Update Utility [2] shall update the BIOS executable non-volatile memory to the newer BIOS, properly load default settings, and reboot the system without the need for user intervention, 3.2.1.1.2 Operating System & Application Software Support (a) The PU shall function with and support the following Operating Systems (OS) and application software packages at a minimum, (Note: Linux Kemel Version 2.4 and Red Hat Version 3 are legacy support only. Newer versions may be required to access some of the features added for V5.) 1} Microsoft Windows: XP (minimum) 2) Red Hat Linux: Enterprise Desktop WS Versions 3, 4, and 5 (minimum) 3) FRCB2 Software: Deleted Version 6.4.x (Linux Enterprise WS Version 3) 4) ICR Battle Command Product Line System (When available) (b) Each Appliqué JVS PU shall be delivered with all the COTS software licenses, HID software licenses and any other hardware specific software drivers and licenses. 3.2.1.3 Removable Hard Disk Drive Cartridge (RHDDC) Interfaces This section details the characteristic requirements for the RHDDC interfaces within the PU. The RHDDCs are located in internal compartments of the PU with access from the latched frant door of the PU i ii, 20 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 (a) The FECB2 sofware application image shall be maintained on and operated out of a Removable Hard Disk Drive Cartridge (RHDDC), within the PU, as defined in section 3.2.15. (b) The RHDDC cartridges) [1] shall be installed inte the PU via the front aceess door. The access door, when latched, [2] shall provide a positive mechanical indication that it is properly closed and [3] shall not inhibit the processor from meeting the environmental conditions of seetion 3.2.6. (¢) The removal and replacement of the RHDDCs must be possible, through the front access door while the PU is installed in the platform environment. To assure platform access is possible, the RHDDC shall be capable of being removed and installed when clearance space of 7.0 inches (measured as shown in Figure 2) in front of the Processor Unit is available. See section 3.2.2.2.1 RHDDC access clearance with the PU front door closed weemgasr Figure 2: RHDDC Clearance in front of the PU INFORMATIONAL: The 7.0” acess space is measured from the front most part of the front daar latches with the door clased and latches properly engaged. (d) RHDDC removal is controlled by the same mechanism that provides physical security for the PU per section 3.2.2.5. (@) The RHDDCs shall be removable from the Processor Unit without the use of tools in one minute or less (measured with only one RHDDC installed), (0) One RHDDC interface to the CPU board in the PU shall be compatible with the 16-bits, Parallel ATA (PATA) standards for hard disk drives. This interface may also be alternatively called an Enhanced IDE (EIDE) interface. (g} The RHDDC bays shall interface to the CPU board via the bay interface connectors. RHDDC bay interface connector requirements and the interface signal definitions are provided later in section 3.2.2.8.10. {h) One RHDDC interface to the CPU board in the PU shall be compatible with the Serial ATA (SATA) I standard for hard disk drives. SATA Il compatibility is a goal. (i) The PU shall operate with either or both RHDDC units installed. 21 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 3.21.14 Display Unit Interface (J4) (a) Deleted. (b) The PU to DU interface shall support the following functionality incorporated into the DU: 1) Power (PU tw DU) 2) Video Display Signals (PU to DU) 3) Touch Screen (see 3.2.1.1.6) (DU to PU) 4) USB (Bi-Directional) 5) Indicators and Bezel Control Buttons (Bi-Direetional) (©) The PU to DU interface connections are specified generally in section 3.2.2.8 and detailed for the PL (designated J) in section 3.2.2.8.4 and the BU (designated J1) in section 3.2.2.8.7. (@) The PU to DU interface shall enable tethered operation of the DU through government furnished cables (considered a part of the installation kit) with lengths up to 25 feet, ‘maximum INFORMATIONAL: The PU to DU interface is significantly dependent upon the qiuetlity of the government furnished cables. The cables nust be built in aceordance with the USB 2.0 standards ancl rust have USB repeaters (hubs) at appropriate distances within the cables for lengths exceeding eight (8) feet. {@) The PU to DU interface signal names and characteristies shall be as defined in section 3.2.1.2 and Appendix-B: PU — DU Interface Definitions later in this document () The PU to DU interface cable is not provided with the Appliqué* JVS computer system. (g) Deleted. (h) The DU indicator status shall be available to the main CPU per the Health, Status, and Logistics interface as defined in FBCB2-ICDHSL-0001. 22115 Keyboard Interface (a) The PU shall provide appropriate USB interface connections to the Keyboard Unit (KU), specified in section 3.2.1.4, via the Keyboard interface port (12) on the DU. (0) The Appliqué+ JVS computer system shall support “hot” attachment of the KU to the USB port of the BU. (ec) The Appliqué® IVS computer system shall be capable of startup (booting) with or without the KU attached to the DU. (a) Deleted. (@) The interface connector is specified generally in section 3.2.2.8, (0) The DU to KU interface connector is detailed in sections 3.2.2.8.8 and 3,2.2.8.9. 3.21.16 Serial Input/Output Interfaces (33/04) This section provides the detailed requirements for the following serial interface ports on the Appliqué+ JVS computer systems: * One (1) internal asynchronous serial port (COM-A) for toueh screen interface Five (5) Asynchronous serial ports (COM-B and COM-C through COM-F) © Two(2) Synchronous serial ports (SYNC-1 & SYNC-2) ‘The following defines the individual interface characteristics for these serial interface parts 22 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 (a) COM-A; 1) Shall be compatible with 16550 compatible UART devices. 2) Shall be internally mapped to the PC compatible COMI serial port in the PU, 3). Shall be used for communications with the touch screen controller. 4) Shall utilize ELA-422 compatible driver and receiver for interface 5) Shall support data rates up to 115.2 Kbits/sec (min.). 6) Thi ize any handshake signals, 7) The interface signals are provided via J4 on the PU. 8) The protocol used shall be 3M/DynaPro SC4 compatible. interface shall not ut (b) COMB: (¢) COM-C through COM-| 1) Shall be compatible with 16550 compatible UART devices. 2) Shall be internally mapped to the PC compatible COM2 serial port in the PU. 3) Shall be used for communications with external, asynchronous devices. 4) Shall utilize ELA-232-C compatible driver and receiver for interface, 5) Shall support data rates up to 115.2 Kbits/sec (min.). 6) TI terface shall not utilize any handshake signal 7) The interface signals are provided via J3 on the PU. 1) Shall be compatible with 14550 compatible UART devices. 2) Shall be used for communications with external, asynchronous devie 3) Shall support data rates up to 115.2 Kbits/sec (min). 4) Shall utilize the following drivers (TxD) and receivers (RxD) for interface (see Figure 3): i, COM-C: — ETA422. TxD and RxD + EIA-425 TxD only (COM-C ‘may be routed to the Utility (DB32) Bay instead of the Serial I/O interface as described in section 3.2.1.1.16). COM-D: — EIA-422 TxD and RxD + EIA-423 TxD only. COME; EIA-422 TXD and RxD + ELA-d23 TxD only. iv. COM, EIA-422 TxD and RxD + EIA-423 TxD only, 23 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 422_TxD+ TxD from UART. EIA-A22 422_TxD- EIA-A23 423_TxD + 422_RxD+ RxD to UART 422_RxD- Figure 3: ElA-422.and EJA-423 Interface Circuits 5) The following operational characteristics of the COM-C through COM-F ports shalll be supported via low level operating system drivers: i, The VO addresses for the four COM ports shall be a contiguous block of addresses, starting at address OE20h, See below. ii, Within the address block, each COM port shall be assigned a contiguous block of eight addresses starting with COM-C: = COM-C: 0E20h to 0E27h + COM-D: OE28h to OF2Fh *COM-E: OE30h to OE37h + COM-F: OE38h to OE3Fh 6) The ports shall use the following interrupt request lines: * COM-C: IRQS * COMD: — IRQS + COME IRQ? + COMP: — IRQII 7) The CPU [1] shall have a status register, located at address OE40h, to indicate the COM port causing the interrupt. The status register [2] shall have the following bit definitions: Bit; [=> COM-C Interrupt Pending; No COM-C Interrupt Bit 1: [=> COM-D Interrupt Pending: 0 => No-COM-D Interrupt iii, Bit2: I=> COM-E Interrupt Pending; 0 => No-COM-E Interrupt iy, Bit3: 1=> COM-F Interrupt Pending; 0 => NoCOM-F Interrupt 24 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 ¥. Bit4-7: Ox0000 (Alw: 8) The interface signals for the COM ports C-F pass through J3 on the PU as specified generally in section 3.2.2.8. The connector type and signals are detailed in section 3.2.2.8.3, (a) SYNC-1 and SYNC-2: 1) The SYNC ports shall be used for communications with extemal, synchronous and asynehronous devices. 2) The SYNC ports shall utilize an 85¢30 Enhanced Serial Communications Controller (ESCC) or a register compatible device to provide the required ports, 3) When appropriately configured, the SYNC ports from the 85¢30 ESCC shall provide Conditioned Di-Phase (CDP) and MIL-STD-188-114 Non-Retum-to- Zero (NRZ) communications interfaces using balanced and unbalanced cireuits per Figure 4, 4) Software drivers for the ESCC device will not be provided by the Appliqué+ IVS computer system supplier. (NOTE: The Government plans to utilize a commercially available driver to support the SYNC ports) 5) The interface signals for the SYNC ports pass through J3 on the PU as specified generally in section 3.2.2.8. The connector type and signals are detailed in section 3.2.2.8.3. 6) Figure 4 depicts the configuration of the 85¢30 ESCC device and the interface characteristies 7) The SYNC-1 receive signals (Data & Clock) shall utilize receiver devices that provide hysteresis against low level signal noise and slower rise times of external radio (SINCGARS) devices that may be connected to this port. INFORMATIONAL: Staw rise times and 200 mV of naise have beee observed on the receive clack line generated by the SINCGARS radios; therefore ue Jystervsis In the receive clock line circuitry is necessary. An EPM#22/423 receiver is typically not sufficient. 8) The following addressing shall be used for the synchronous port interfaces: i, SYNC-I: OD60h= Control; — OD6Ih = Data ii, SYNC-2: 0D62h=Control; — 9D63h = Data 9) Interrupt requests will not be supported for these ports. The main CPU software must poll for status information. 10) The RTS_A* output of the SYNC-1 port may be used as “Push-To-Talk” control with the following eharneteristies: i, When, RTSA* (Low) == PTT* (Low) == Enable Transmit ii, When, RTSA® (High) = PTT* (High) == Enable Receive 11) The PTT* interface circuit shall have the following characteristics: i, When PTT® = Low (Transmit mode} + Sink 500 microamps min + Present less than 400 olims resistive load + Output =0 volts, +0.25 / «0.5 valts ii, When PTT® = High or Open (Receive mode): 25 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 + Source 100 microamps max + Present 25 kohms (min) resistance fo signal ground «Withstand externally applied voltages of 5.8 V min SYNCI_ReD SvNCLTxD SYNCI_RYCLK SYNC_RADH SYNCE_TeDS SYNC2_RaD- SYNC_TaD- Figure 4; Synchronous Port interface Detaits 3.2.11.7 Audio Interfaces (J2) ‘The Appliqué+ JV5 computer system provides the following audio interface functionalities: {a} The PU shall contain a AC97 compatible audio controller device (b) The audio device shall be compatible with the commercially available AC*97 or equivalent sound driver, configurable under OS control (¢) Where supported by the operating system, the volume of the audio controller device shall be capable of being set by application software. (d) The PU shall contain an internal speaker which shall be driven by the lefi channel of the audio controller, as shown in Figure 5. (e} The right channel of the audio controller device in parallel with the PC speaker port output shail be used to drive the extemal headset speaker, as shown in the Figure 5. INFORMATIONAL: To prevent unwarranted “heeps” from the internal PC speaker during the hoot process, without custom BIOS and applications modifications, this implementation prevents the PC speaker port auiput from driving the internal PC speaker but yet stil makes the audio available to external speakers () Deleted. (g) The audio interface signals pass through J2 on the PU as specified generally in section 3.2.2.8, The conneetor type and signals are detailed in section 3.2.2.8.2, 26 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 L Internal PU AC'S7, —— Compatible R ‘Speaker Audio Controller PUJ2 ‘Connector PC Speaker Port Figure 5: Audio Comrol Circuitry 3.2.1.1.8 Expansion Interfaces (JS) ‘The PU provides a dedicated VO connector, designated JS, for expansion capabilities via connections to external devices and/or peripherals. The following capabilities are provided: (a) The expansion port provides # USB interface port: 1) The USB port shall be compatible with the functional requinements of the Universal Serial Bus (USB) Specifications, Revision 2.4 2) The Appliqué+ V5 computer systems shall provide a minimum of 1.0 Amp of continuous current at +5 Vde for external USB device(s) connected to this interface, 3). Reserved {(b) The expansion port provides a 10/100 Base-T Ethemet LAN interface port as described im seetion 3.2.1.1.18 {e) DC power output: 1) The Appliqué+ JVS computer system port shall provide +12 Vde power ‘output for use by the external devices attached to the Expansion Interface, 2) Three Amps (minimum) of continuous current shall be provided via the +12 Vde Expansion Interface output 3) The power output on the Expansion Interface shall have the following characteris i, Load Regulation: 45% ji, Line Regulation: 41% iii, Ripple: 1% Peak to Peak 4) To prevent accidental damage to the system, the DC power output from the Appliqué* JVS computer system on the Expansion Interface shall be protected by suitably rated, self-resetting circuit protective devices. (d) The expansion interface signals pass through J5 on the PU as specified generally in section 3.2.2.8, The connector type and signals are detailed in section 3.2.2.8.5 27 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 3.2119 SVGA Interface (J6) In addition to the video interface tothe Display Unit (DU), the PU [1] shall also provide a Super Video Graphies Array (SVG) video interface for connection to an extemal video display. The SVG interface has the following characteristics (a) The SVGA interface shall operate simultaneously with the BU, (b) The SVGA interface shall normally be setup with the same pixel resolution, color depth and output image as the connected DU. {¢) The SVGA interface shall also be configurable to pixel resolutions and color depth values different than the DU. When the SVGA interface exceeds the DU resolution (sce 3,2,1,2.1), the DU interface may be “blanked” or otherwise unusable, (d) It shall be possible to continue to operate the SVGA interface even when the DU interface must be “blanked” out. (e) The SVGA interface shall be configurable to support pixel resolutions up to and including 1280 x 1024 at a minimum, () The SVGA interface signals pass through J6 on the PU as specified generally in section 3.2.2.8, The connector type and signals are detailed in section 3.2.2.8.6. 3.2.1.1.10 Power Interface (J1) ‘The Appliqué JV computer system will have the following power interface characteristics: (@) The Appliqué+ JVS computer system shall be capable of operating from military vehick power with the following characteristi 1) Nominal: 28 Wde 2) Minimum: — 20 Vde (Battery) 3) Maximum: — 33 Vde (Altemator) (h) The Anpliqué+ JVS computer system shall he capable of operating from military vehicle power in accordance with the MIL-STD-I27SD, Paragraphs 5.1.3.1 and 5.1.4.1 steady state over the range specified above (¢) Operations from voltage sources other than the military vehicle power require use of suitable, external power converters (c.g. operations with 120 Vac}. Extemal power converters are not provided with the Appliquét JVS computer system, (d) The Appliqué+ JVS Computer shall operate through the 6V Initial Engagement Surge (IES) and 16V Cranking as specified in MIL-STD-127SD, Paragraphs 5.1.2.2 and 5.1.2.3 with the internal backup battery installed. (e) When operating without the internal backup battery, the DU shall be permitted to go “dark™ or “dim” and the system reboot when exposed to the IES and Cranking conditions specified above, (f) The Appliqué+ JVS Computer shall withstand and operate through the input power ripple, surges, and spikes as specified in MIL-STD-1275D, Paragraphs 5.1.4.2, 5.1.4.3, and 3.1.4.4. (g) The Appliqué JVS computer system shall have built-in protection against reverse polarity connections tothe external power source. (h) The Appliqué+ IVS computer system shall have built-in protection against sustained input voltage of +36 Vdc minimum. 28 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 (i) The measured power consumption of an Appliqué JVS computer system shall be less than or equal to 80 Watts under the following configuration: 1) RHDDC installed in PU SATA (DB20) Bay. 2) DU connected to PU with brightness set to maximum. 3) KU connected to the DU. 4) No power provided to any external devices (e.g., USB or Expansion Port) during the power measurements. 5). System operating in 20° - 25° C (68°— 77° F) ambient air, 6) No optional or expansion features populated (¢.g., TacLink or Utility (DB32) Bay). G) The input voltage will be monitored and compared to a programmable low-voltage threshold limit (nominal value of +22 Vde). If the input voltage falls below this threshold, the processor unit shall cause an appropriate indication to be displayed on the DU as identified in a table in section 3.2.1.2.6 (k) The processor unit shall support the ACPI Battery State (BST) object to provide reporting of Battery Present Voltage for the Vehicle battery (Battery 1) to the operating, system and application software in accordance with ACPI 11.2.2.2 (1) The processor unit shall support the ACPI Battery State (BST) object to provide reporting of Battery Present Voltage for the Backup battery (Battery 2), as described in seetion 3.2.1.1.13, ta the operating system and application software in accordance with ACPI 1.2.2.2. (n)The Appliqué+ JVS computer system shall meet the relative tip characteristics of the external protection circuit as a percentage of maximum current (see Figure 6) where the protection circuits provide for a maximum current of 7 amps when configured in headless mode, solid state RHDDC installed, no peripherals installed, and in 20-28 °C (68 - 77 °F) ambient enviranment, INFORMATIONAL: Figure 6 shows the In-Rush current profile and trip characteristics, as a percentage of the maximum current, of the external protection circuit employed with the Appliqué computer system The external protection circuit is pieally rated for a maxinum current of 7 Amps, 29 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 10.000, 4200 Pn, TRIP LIM ves es 0 Figure 6: In-Rush Current Profile of External Protection Circuit (n) The power interface signals pass through JI on the PU as specified generally in section 3.2.2.8, The connector type and signals are detailed in section 3.2.2.8.1 3.2.1.1. Power Contral This section defines the requirements for conirolling the application (ON) and removal (OFF) of the power ta the Appliqué+ JVS computer system, The power ON/OFF process involves the use of the circuit breaker on the front panel of the PU and the “PWR” button on the front bezel of the DU. {a) The lower left quadrant of the PU front panel shall contain a suitably rated cireuit breaker ‘whieh can be manually operated. Sec Figure 7, 30 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 Figure 7. PU Cireuit Breaker (b) The circuit breaker shall disconnect the Appliqué+ JVS Computer internal electronics from the external power input when the breaker is in the OFF or tripped (open) position, INFORMATIONAL; Provides @ separate safety switch 10 allow Unit Maintainers a positive means to remave ing! pawer to the computer systema during traubleshaoting and remavelreinstall actions. (c} The PU circuit breaker positions shall be labeled with ON/OFF markings as shown in Figure 7. Note: the left position is the OFF position and the right position is the ON position in Figure 7. {d) The PU shall incorporate a guard which completely surrounds the circuit breaker to preclude the circuit breaker from being accidentally tripped from it's ON or OFF position, (¢) The front bezel of the DU [1] shall contain a momentary pushbutton labeled “PWR”, as shown in Figure 8. The following specifications [2] shall apply to the PWR pushbutton switch: 1) Rated Current: 10 mA {min} 2) Open Circuit Voltage: 36 Volts (min) 3} Closed Circuit Resistance: 600 Ohms (max) of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 Figure 8° DU Power (PIR) Burton () The Appliqué JVS computer system power shall be controlled by the following sequence of steps: 1) Power ON sequence: © Toggle the PU cireuit breaker to the ON position Press and hold the PWR button on the DU for approximately 2-4 seeonds 2) Power OFF sequence: © Press and hold the PWR button on the DU for approximately 2-4 seconds Toggle the PU circuit breaker to the OFF position (g) While in the power OFF state, but with the PU circuit breaker in the ON position and with no backup battery installed in the PU, the total curnent draw into the Appliqué> JVS computer system shall be less than 15 mA to avoid discharging the platform's batteries, ‘{h) Power shall be remotely toggled on/offas follows: PU circuit breaker in the ON position, © Connect the Expansion connector (JS) Remote Power Control pin to the Remote Power Control Return pin through no more than 600 ohms for approximately 2-4 secands. © Note: the power on pin to power return pin may have up to a 36 Volt difference when open, 3.2.1.1.12 Processor Unit Thermal Management This section defines requirements for the thermal management of the Appliqué IVS computer system to enable damage free operations in the “hot climate” operating conditions. The thermal management functions include the abilities to reduce the processor throughput. via. processor clock management as well as power shutdown control. (a) The PU shall be capable of sustaining its maximum computational throughput at ambient air operating temperatures up to and including at least 52° C (125° F). INFORMATIONAL: The maximum computational throughput of the CPU is defined as the performance at or above the mininurm level specified in section 3.2.1.1.2 (b) For operating temperatures between the processor reduced throughput threshold (see prior paragraph) and the maximum Operational Ambient temperature (per section 32 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 3.2.6.1.1), the PU shall be capable of “throttling” the CPU clock down to at least half its nominal computational rate, for a period of nat less than 6 hours. (c} The selection of the temperature limit settings and corresponding clock throttle values are established via BIOS settings per section 3.2.1-1.1.1, (d) The CPU shall return to its normal operating clock rate when the operating (PU internal) air temperature returns to pre-determined lower values, set under BIOS settings {@) Provisions shall be made in the PU to stop the CPU clock completely (to reduce the power dissipation) when environmental conditions raise the PU temperature beyond pre- determined limits that ean cause catastrophic damage to the CPU, (0) The PU thermal management status shall be indicated on the DU front panel as described in seetion 3.2.1.2.6. 3.2.1.113 Battery Power ‘This section defines requirements for an intemal backup battery within the Appliqué+ JVS computer system. The purpose of the backup battery is to provide graceful degradation of the operations and shutdown of the computer system during the input vehicle power outages. (a) The backup battery shall be a US Army standard battery, such as BB-388A/U (NSN: 6140-01-490-4313) or equivalent ‘(b) The backup battery shall have the following key characteristics: 1) Rechargeable 2) Sealed design 3) Nickel Metal Hydride chemistry (alternate support for Lithium-Ion chemistry) 4) Output: 12 Volts at 1.5 Amps (minimum, at room temperature) 5) Wisible state of charge indicator (¢}) When operating under the backup battery power, the Appliqué+ JV5 computer shall mect all the requirements identified in this specifications document. (4) The Appliqué JVS Computer shall be capable of a minimum of 10 minutes of continuous operation from a fully charged backup battery following removal of primary power from the power input at 20° to 25° € (68° — 77° F) ambient air temperature and. configured for power consumption measurement as called out in section 3,2.1.1.10 plus the battery installed INFORMATIONAL: The operating times may be degraded at lower temperature limits specified in this specifications document, due to the limitations of the battery technatogies at temperatures belaw -20°C (-4" F). {e) When the computer is operating from backup power, the power control circuits (ner section 3.2.1.1.11) shall be capable of switching the computer to the power-OFF state. () In absence of the primary power input to the computer, the power control circuits (per section 3.2.1.1.11) shall be inhibited from switching the computer to the power-ON state ‘and operating the computer from the backup battery (g) The rechargeable backup battery: 1) Shall be installable oF replaceable by the user through the front door of the PU. 2) The environmental integrity of the Processor Unit shall be maintained following installation or removal of the battery by the user. (hy The backup battery shall be charged whenever: 33 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 1} The backup battery is installed within the PU 2) AND. the primary power is applied to the PU 3) AND, the PU circuit breaker is in ON position 4) AND, the battery temperature is within its operating limits i) The battery charging capacity of the PU shall be sufficient to place a full charge on the backup battery over 8 hours of charging at 20° to 25° C (68° — 77° Fy ambient air temperature. G) The PU shall prevent the incorrect insertion and connection of a primary (non rechargeable) version of the backup battery ta the internal battery charging terminals by incorporation of a male post-style pin which mates with the corresponding female pin socket located on the rechargeable backup battery connector. See Figure 9 for a pictorial representation. Figure 9: Battery BB-388A/U (Top View) (k) The PU shall provide a low battery status to the main CPU via the Health, Status, and Logistics interface per FBCB2-ICDHSL-0001. () The PU shall send a waming via HSL when the battery capacity is critically low and the system is operating off of intemal battery power, The host should immediately begin a shutdown procedure to avoid software corruption 3.2.1.1.14 Hour Meter (a) To support the hardware reliability requirements specified in section 324.1, the Processor Unit shall incorporate an hour-meter. (>) The hour meter shall be used to monitor and record the number of hours, the PU is powered ON and in operation. (©) The hour meter shall be located in a dedicated, internal compartment of the PU, with access from the latched front door of the PU. (d) The hour meter shall be visible to the user via the front face of the unit wit disassembly of the PU. 32.1115 Year 2000 Compliance (a) The Appliqué JVS computer system shall be “Year 2000" compliant, wat requiring 34 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 {(b) The “Year 2000 Problem” BIOS and the computer hardware compliance is tw be measured by the National Software Testing Laboratories’ YMtark2000_ program (2000exe) (¢) The YMark2000 program tests for the packed, Binary Coded Decimal (BCD) representation of the date in the computer hardware, carreet rollover of the date fram 12/31/1999 to 01/01/2000 and the correct recognition of the year 2000 as the leap year. 3.2.1.116 PATA/Utility (DB32) Bay ‘The PATAVUtility (DB32) Bay (also known as the DB32 Bay) is a multifunction, user accessible bay. Qne of the funetions is to hold a PATA RHBDC. If the PU is operating without a PATA RHDDC, a utility tray may be installed, To support a variety of functions being able to be carried out on a tray, the PU provides access to internal interconnections as required below. (a) The PATA/Ltility (DB32) Bay shall be capable of containing an operational PATA/EIDE RHDDC with interface as specified in section 3.2.1.1.3. (b) “Hot swap” capability is not required for this bay (¢) The RF interconnections to the external connectors shall use 50 ohm nominal impedance cous. {d} Serial port COM-C routing: 1} COMLC shall be routed to the Utility (DB32) Bay when routing COM-C Select pin is pulled toa TTL low state by the utility tray. 2) COM-C shall be routed to the Serial I/O connector when the Utility (DB32) Bay COMLC Select pin is Left open. 3} The COM-C Select pin shall be pulled up to the PU intemal $V supply rail by greater than 5 kohms, 4) All COM-E fines at the Utility (DB32) Bay connector shall be at valid steady state levels when COM-C is not routed to the Utility (DB32) Bay. 5) COML-C data lines shall be BLA-232 compatible at the Utility (DB32) Bay. 6) See section 3.2.1.1.6 for further COM-C specifications. (e) The PATA connector type and signals are detailed in section 3.2.2.8.10. (6) The Utility Tray multiple pin connector type and signals are detailed in seetion 3.2.2.8.11 (g) The Utility Tray RF connector type and signals are detailed in section 3.2.2.8.12, \(h) The Utility (DB32) Bay shall provide the connections necessary for installed peripherals to report status via the Health, Status, and Logistics interface described in FBCB2- ICDHSL-0001. 3.21117 SATA (DB20) Bay ‘The SATA Bay (also known as the DB20 Bay) is a single function, user accessible bay that is to hold a SATA RHDDC. {a} The SATA (DB20) Bay shall be capable of containing an operational SATA RHDDC with interface as specified in section 3.2.1.1. (b) “Hot swap” capability is not required for this bay. (c} The SATA (DB20) Bay connector type and signals are detailed in section 3.2.2.8.13. 35 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 (d) The SATA (DB20} Bay shall provide the connections necessary for installed peripherals to report status via the Health, Status, and Logisties interface described in FBCB2- ICDHSL-0001. 3.2.1.1.18 LAN Ports (a) The PU LAN ports shall be compatible with the functional requirements of the IEEE 802.3, 10/100 Base-T Ethernet Specifications. (b) There shall be no power provided from the Appliqué+ JVS computer system to the external LAN devices. {@) AILLAN ports shall be accessible by the main CPU. (qd) The PU shall support one 10/100 BASE-T LAN port Expansion (J5) external interface connector (see section 3.2.2.8.5 for connector information) (@) The PU shall support two 10/100 BASE-T LAN ports to the PATAV/Utility (DB32) Bay (see section 3.2.2.8.11 for connector information). (f) The PU shall support three 10/100 BASE-T LAN ports to the TacLink/LAN (17) external interface connector (see section 3.2.2.8. 4 for cannector information). 3.2.1.1.19 TacLink/LAN Interface (J7) ‘The TacLink/LAN Interface provides a connection from J7 to circuitry wit the PU. See sections 3.2.1.1.18, 3.2.2.8.14, and Appendix-D: Option ~"TacLink for further details. 3.2.1.1.20 RF Interfaces (J8-J10) The RF Interfaces provides a coaxial connection from J8-J10 to the PATA/Utility (DB32) Bay. See sections 3.2.1.1.16 and 3.2.2.8.15 for further details. 3.2.1.1.21 Extermal SATA Interface (J11) ‘The Extemal SATA Interface provides an external mass storage access port to the PU. The interface has the following characteristics: (a) The External SATA interface to the CPU board in the PU shall be compatible with the Serial ATA (SATA) standard for hard disk drives. SATA II compatibility is a goal (0) The Extemal SATA interface shall be “hot swap” capable. 46) DC power output: 1} The Appliqué+ JVS$ computer Extemal SATA interface shall provide +$ Vae power ouput for use by the external devices attached to the port. 2) The External SATA port shall be capable of providing, 1.0 Amps (minimum) of continuous current via the +5 Vde output. 3) The power output on the Extemal SATA interface shall have the following voltage characteristics: i, Load Regulation: 45% Line Regulation: 41% iii, Ripple: 1% Peak to Peak 4) To prevent accidental damage to the system, the DC power output from the Appliqué+ IVS computer system on the External SATA interface shall be protected by suitably rated, self resetting citeuit protective devices. (d) The connector type and signals are detailed in section 3.2.2.8.16. 36 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 3.2.1.1.22 Health, Status, and Logistics (HSL) Support ‘The Health, Status, and Logistics Support feature is a mechanism allowing the main CPU to poll various embedded devices that are part of the Appliqué+ JV computer system for information. ‘This support requires the following clements: (a) The Appliqué+ JVS computer system vendor shall provide an interface to allow main CPU access to the HSL information per FBCB2-ICDHSL-0001. (b} The Appliqué+ JVS computer system peripherals shall be ready to receive HSL requests ‘a8 soon as 120 seconds alter boat. “Boot” is defined to be the release of the system reset line. 3.2.1.2 Display Unit (DU) ‘This section includes the physical and configuration characteristics of the Appliqué+ IVS computer system Display Unit (DU). Figure 10 depicts a logical block diagram of the DU, consisting of the following major functional components. J2 (KU Interface) anv ssy sav Figure 10: Display Unit (DU) Block Diagram 3.2.1.2. Display Panel {a} The display panel shall be compatible with the PU to DU interface requirements detailed in “Appendix-B: PU ~ DU Interface Definitions” in this specification decument, The key characteristics of the interface shall include the following: 1}, The display panel shall support 18 bit video data corresponding to 262,144 colars, 2) The display panel shall support a minimum resolution of 800x600 pixels (SVGA). 3) The display panel shall be an Active Matrix TFT LCD. 4) The PU to DU interface shall support 5-pairs of LVDS signaling interface. \(b) Reserved. 37 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 (@) The LCD panel size shall be 12 inches (min) when measured diagonally. (4) When illuminated with 50,000 lux of light at 45° angle, fiom perpendicular to the viewing surface, the display panel shall have a contrast ratio of 2.8:1 (min). INFORMATIONAL: This is simulated sunlight readabilisy, (e} When subjected to low light (darkness) conditions and with its backlight set to the level, the luminance (brightness) of the display panel (i) shall be 750 nits (219 foot- Lambert, 750 candelaimeter’) minimum and the contrast ratio (ii) shall be 50:1 (min) when measured normal (perpendicular) to the viewing surface. 1) When the computer is operating from back-up battery power, the maximum luminance shall be reduced 1 one-half (nominal) of the 750 nits specified above. (f) When subjected to low light (darkness) conditions and with the NVIS mode selected, the DU shall demonstrate the following approximate characteristics when measured. normal (perpendicular) to the viewing surface, = 2 nits (0.58 Foot Lambert 2) Minimum Luminance 0.1 nits (0.03 Foot- Lambert") Dark 3) Minimum Contrast Ratio = 150:1 INFORMATIONAL: The control of the display panel in the Night Vision (NVIS) mode, via the BRT+/BRT» buttons, ix defined in section 3.2.1.2.9. Approximate values are defined here because the luminance performance at this level of brightness is typically not consistent and it is hard to predict the tuminance of the last step. The step up/down values (in nits) under Brighiness conirol buttons will vary slightly. The dark arrow is used to indicate that she display may or may not go dark ow the mext ART- press after reaching the minimum defitied luminance, (g) The side-to-side viewing angles for display panel shall be +60 degrees (minimum) from a line perpendicular to the display. (h) The top-to-bottom viewing angles for display panel shall be +10 degrees to -30 degrees (minimum) froma line perpendicular to the display. ‘@) The display panel shall incorporate a glare-reducing finish or filter, Gj) All display measurements are to be done in accordance with VESA FPDM version 1,0 specifications, 3.2.1.2.2 Touch Sereen 1) Maximum Luminance un ‘The DU incorporates a touch screen device and an appropriate controller device, as a human machine interface device. (a) The Display Unit shall incorporate a pressure-sensitive touch sereen overlay on the display panel functioning as a Soldier-Machine Interface pointing device. (b) The touch sereen shall have sufficiently high resolution to allow the user to locate a cursor to within a nominal radius of 5 pixels of the intended target location using the stylus device supplied with the Appliqué+ JV5 computer system. See section 3.2.1.3 for further requirements for the touch stylus. (6) The touch sereen shall be compatible with the requirements of the PU — DU interface requirements defined in Appendix-B: PU ~ DU Interface Definitions. 38 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 3.21.23 USB Hub & Keyboard Interface (12) ‘The section details the requirements for the Keyboard Unit (KU) interface to the Appliqué JVS computer system (a) The DU shall have a USB hub and a USB port for interface to the KU {b) The DU’s USB hub and the KU interface port (12) shall be compatible with the functional requirements of the Universal Serial Bus Specifications, Revision 2.0, (¢} The USB Host Controller in the Processor Unit shall communicate with the USB Hub in the Display Unit, in accordance with the PU to DU interface defined in Appendix-B: PU = BU Interface Definitions. (d) The USB hub in the DU shall connect toa USB compatible keypad controller (as defined in USB HID V1.11) for the DU front panel control keypad and the bezel funetion keys. (e) The USB interface from the hub shall enable connection of extemal devices such as a KU, a Mission Data Loader (MDL), ete to the Appliqué+ JVS computer system through the BU connector J2 INFORMATIONAL: The use of such external USB devices may require loading the Appliqué conynuer with appropriate drivers and/or application software. (8) The Appliqué+ JVS Computer shall support “hot-conneetion” of the KL ta the port while the PU and DU are operational such that following such a “hot-connection” the Keyboard Unit will be fully operational (see seetion 3.2.1.4 for further connection details), (g) The Appliqué+ JVS Computer power supply shall provide a maximum of 1,0 Amps continuous current at +5 Vde power (5 W maximum) for external USB deviees or unit loads connected to Display unit J2 (hy The +3 Vde power output on the J2 connector af the DU shall have the following characteristics: 1) Load Regulation: 45% 2} Line Regulation; 41% 3} Ripple: 1% peak to peak (i) The DU to KU interface signals pass through J2, on the DU as specified generally in section 3.2.2.8, The connector type and signals are detailed in section 3.2.2.8.8 3.21.24 Bere! Fu This section details the requirements for bezel function keypad for the DU. (a) The DU shall include an 8-position, momentary pushbuttons, keypad located on the front panel, horizontally, underneath the display panel. (b) The bezel keypad buttons shall be mapped to the “PC compatible” keyboard codes corresponding t Alt-FI through Alt-F8 key combinations, 1) The system and application software are responsible for mapping the keyboard codes to application functionality. 2) Example: Depression of “Alt-F1 “Alt” key and the Fi function key. (c) The bezel keypad buttons shall be labeled AJt-FI (left-most button) through AILFS (right-most button). See Figure 11 m Keys the equivalent of keyboard depression of thi 39 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 Figure 11: DU Fromt Bezel Function Keys 3.2.1.2.5 Bezel Control Keys This section det keypad for the DU. The control keypad [1] shall be located on the DU front bezel, vertically, to the left of the display panel, See Figure 12 for control keypad layout. the requirements for the I0-position, momentary pushbuttons, bezel control Some of the pushbutton keys are defined as dual function keys, as explained below. ‘The secondary functions of the dual function keys [2] shall be activated upon simultaneous pressing af the FCN key, also defined as a SHIFT funetion, 40 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 Figure 12: Bezel Contral Keys & Indicators Layout (@) The DU shall provide the following functions to the user via the control keypad. Primary Functions 1} Power (PWR) 2) DU Brightness Up (BRT*) 3} DU Brightness Down (BRT- 4) BlackOut Mode (BLK OUT) / 5) Escape(ESC) 6) TAB Right 7) Cursor Control Up 8} Cursor Control Down 9) ENTER 10) FON (Shift Func mn) ‘Sceondary Funetions LED Brighiness Up (LED+) LED Brightness Down (LED-) Lamp test (LAMP) Function | (FI) ‘TAB Left ‘Cursor Control Left ‘Cursor Control Right i SPACE 41 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 (b) Power (PWR) control will be as deseribed in section 3.2.1.1.11, where each press and hold cycle of the pushbutton toggles the Applique IVS computer system between the ON and OFF states. INFORMATIONAL; For the purposes of the following requirements, dark is defined as a light measurement with suitable instrumentation to determine that na illumination is human visible when the DU is viewed in a dark room. (c) The BRT+ and BRT- functions shall be used to adjust display panel from dark to ‘maximum brightness, (al) Onee set, the DU shall have provisions to maintain the display panel brightness Ievel settings, through the system power OFF or power lost conditions, for a minimum period of 12 hours. (e) The LED+ and LED- funetions shall be used to adjust bezel indicators from dark to ‘maximum brightness, (f) One set, the BU shall have provisions to maintain the indicator brightness level settings, through the system power OFF or power lost conditions, for a minimum periad of 12 hours. (2) The blackout (BLK OUT) contol, when activated, shall cause both the display panel brightness and indicator brightness to be sct to dark, See section 3.2.1.2.9 for further details on operations of the blackout key. (hy The keypad shall generate inputs to the PU utilizing the standard PC compatible keyboard sean codes. 3.21.26 Indicators ‘The DU [1] shall have three seis of LED indicators on the BU front bezel, next to the control keypad keys (see Figure 12). This section defines the functional requirements for these LEDs. The control of the LEDs during operations [2] shall be under the system software and/or application programs to display the information as shown in Table 1 (a) The DU shall have the following three status groups of color LED indicators: 1) Power (PWR) Status 2} Display (DISP) Status 3) Processor (CPU) Status (b} Each status group [1] shall include three, individual color LED indicators. These [2] shall be Green (top), Yellow (middle) and Red (bottom). ‘The functionality of these LEDs are defined in the table shown below. (e) The brightness of the LEDs shall be controlled via the LED+ and LED- buttons, in accordance with section 3.2.1.2.5. (d) The operations of the indicator LEDs are in accordance with the “Indicator Link” operations defined in the PU to DU interface in Appendix-B: PU - DU Interface Definitions (section 7,6), ‘The LED indicators thus controlled shall be updated at least 2 times per second (e) When required, the blinking indicators [1] shall blink at the rate of 2 Hz + 10%. When multiple LEDs blink together, their blinking [2| shall be synchronized. 42 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 Table 1: DU Indicators Usage Characteristics Status Processor Unit Status Indicators Off (all LEDs in group) | Undefined Red (Solid) CPU shutdown or failure Blinking Red Power On Self Test (POST) Problem. Amber Degraded CPU Operation ~ Temperature Warning Blinking Amber Communication Error (No Message From CPU) Green CPU OK Blinking Green Heater On Display Unit Status Indicator Off (all LEDs in group) |_ Undefined Red Overheat, Display Shutdown or Failure Blinking Red Built-in Test (BIT) Failure detected Amber Degraded Display Operation - Temperature Warning Blinking Amber Communication Error (Problem at Display Unit) Green Display OK Blinking Green Heater On Power Status Indicator. Off (all LEDs in group) | Undefined Red Loss of vehicle power, running on internal battery. DU will operate at reduced brightness Blinking Red Input Power Out of Acceptable Range (vehicle power) Amber Power Supply output voltage out of acceptable range (PU Power) Blinking Amber Undefined Geen Pawer On, no problem detected Blinking Green Heater On 3.2.1.2.7 DU Thermal Management INFORMATIONAL: The following rationale (in lalic) is used to explain requirements for the thermal management of the Bisplay units. UL-1950, section 5.1, cited as the applicable safety specification, allows a temperature rise of 30° C (54° F) (metal) to 40° C (72° F) fglass) above a 25° C (77° F) ambient temperature, corresponding to a high-temperature limit of 55° - 65° C (13F° ~ 149° F) for objects 43 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 continuously held (touched by humans) in normal use, For objects held ar touched for short periods anly (suck as touch screens) the allawable rises are 35° C (63° F) (metal) to 45° C (81° F) (glass), vielding short period, maximum touch temperatures of 60° - 70° C (140° » 158° F). With ambient air of 60° C (140° F) fin the Abrams tank, for example), it is not possible to limit the maxinuem temperature rise of the DU metal components to within the safety range specified ahove and still be able to-aperate the display, However, the touch sereen surface temperature of the DU can be limited to 71° € (160° F), for short periad touches, by reducing the backlight hrighiness and relaxing the sunlight readability requirements at high temperatures. Thiv implies that the BU must remain usable at 60° C (140° F) ambient temperature when shiekded from the direct) effects of the sien, The following specificatians specifi a temperature af 65° C (149° F) as the paint at which the display backlight brightness should be reduced to the miniouum usable level when the display is shaded from the direct effecis of the Sun, when operating at high temperatures, This limit is selected based-on the 65° C (149° F) continuous touch limit for glass. If the display can not be protected from she direct effects of sun toading at higher ambient temperatures (up to 60° C (140° F)) then the display temperature could threaten te exeeed 71° C (160° F) aud risk permanent damage to the display. Therefore, requirements are added ta shutdown the display before incurring permanent damage at some temperature not to exceed 71° C (160° F), determined by the UL-1950 safety limit for glass, ‘The DU shall meet the luminance requirements specified in section 3.2.1.2.1 over the operating temperature range specified in section 3.2.6.1.1, unfess limited by the DU’s thermal management functionality, as defined below. The DU thermal management functionality includes provisions to reduce the backlight intensity and associated heat dissipation. ‘The DU thermal management capabilities are invoked t protect the display against damage in high ambient temperature environments and to ensure that the display remains safely useable under the effects of sun loading. (a) The minimum brightness level under the thermal management conditions shalll be 75 nits, (>) The maximum temperature rise, measured relative to the ambient temperature, of the DU"s front panel surfaces including the touch screen, due t the internal power dissipation shall be less than or equal to 20° € (36° F) while mainiaining the highest brightness level specified in section 3.2.1.2.1 (e) The DU shall be capable of maintaining the maximum brightness level specified in section 3.2.1.2.1, whem the highest temperature of the DU is less than 57°C (135° F). (d) When the highest temperature of the DU is between 57° C to 65° C (135° F to 149° F), the DU shall be capable of scaling the available backlight power from full brightness at 57°C (135° F) to minimum brightness (75 nits) at 6S" C (149° F), (6) At the maximum specified ambient temperature specified in section 3.2.6.1.1, without the effects of direet sun loading, the DU shall be capable of maintaining the minimum brightness level (75 nits) for a period of four (4) hours minimum, without exceeding the maximum front panel temperatures specified below. (8) The DU shall tum off the backlight when the temperature of the front panel, including the touch sereen, exceeds 68" C (154° F) (maximum temperature). 44 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 (g) Following an over temperature shut down condition, the backlight power shall be restored to appropriate levels without user intervention, when the front panel temperature falls below 60” € (140° F). (h) The status of the DU thermal management operations shall be indicated on the front panel LED indicators, in accordance with the table in section 3.2.1.2.6. 3.21.28 Processor Unit Interface (1) (a) The DU to PU interface shall support operations with a Processor Unit as described in section 3.2.1.1.4. (b) The DU to PU interface signals pass through J1, on the DU as specified generally in section . The connector type and signals are detailed in section 3.2,2.8,7, 3.2.1.2.9 DU Night Vision (NVIS) Control ‘The DU shall support a Night Vision (NVIS) mode of operation with the characteristics defined below. In NVIS mode the DU is operated under low light or darkness conditions and viewed with Night Vision Goggles (NVG). The brightness of the DU is limited to prevent “blooming” of the NVG equipment. (a) For the purposes of these requirements, the following NWG (Gen II technology) characteristies are assumed: 1) For luminance below 0,600 nits, there should be no blooming of the NVG. 2). For luminance between 0.600 to 2 nits, the NVG may start to bloom, 3} For luminance greater than 2 nits, the NVG may be in full bloom, {b) For the purposes of this specifications document, the “blooming” of the NVG may be defined as detailed below. ‘The following characteristics are listed here for reference only and are not to be verified. 1} The spectral output (radiance) of the display panel for the color white will be less than 1.2 x 10* mAvem**steradian. 2) The spectral output (radiance) of the display panel for all other colors will be less than 2.3 x 10” mA/em?steradian. INFORMATIONAL: This information is derived fiom the USMC specifications for the M-DACT Replacement Computers and included here for reference only. (©) The viewing modes and characteristics defined in this section shall apply to both, display panel and the LED indicators, on the DU. (d) For the purposes of this specifications document, the following viewing mode definitions shall apply to the display panel and the front bezel LED indicators: 1) NORMAL: Human eye visible conditions with brightness adjustable from the dark to maximum (750 nits) as defined in section 3.2.1.2.1 2) BLACKOUT: The display panel and the LED indicators are completely tuned~ OFF (total dark), with no visible illuminations when viewed in a dark room. ‘This mode shall be entered upon a single push of the BLK QUT button from the Normal made. Sec below. 3) NVIS: Limited visibility mode with Night Vision Goggles (NVG) under darkness conditions. The display backlight brightness [a] shall be adjustable from dark to a maximum of 2 nits. LED indicators (b] shall be tumed-aff (total dark) in NVIS mode. This mode [c] shall be entered upon a single push of the BLK 45 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 QUT button from the Blackout mode as defined below. For DU characteristics in the NVIS mode, refer to section 3.2.1.2.1 (e} The operations of the viewing modes defined above shall be controlled by the operator via combinations of the BLK OUT, BRT+ and BRT- pushbuttons on the front bezel of the display units, as defined below, Also see section 3,2.1,2.5 for further definitions of the display controls. 1) For each push of the “BLK. GUT™ button, the display shall tran three modes, defined above, in a “round robin” fashion as follows; ‘Normal => BilnckOut => NVIS = Normal => BlackOut 2} For the Normal and the NVIS modes only, each push of the BRT+ and BRT- button shall increase or decrease, respectively, the luminance of the display panel within their predefined limits 3) In Blackout mode, the display shall remain dark, ignoring the pushes of the BRT+ and BRT- buttons, 3.2.1.3 Touch Screen Stylus with Tether a between the #6 Eyelet Stylus ~~ sh £05" Figure 15: Touch Screen Stylus with Tether Each DU shall be provided with a touch screen stylus with the following characteristics: {a} The stylus shall be a passive (non-active) device, suitable for operations with the touch sereen! (b} The stylus shall be a pencil shaped deviee, trip surface. {¢) The stylus shall have a tethered cord (lanyard) for attachment to the DU mount assembly top plate. 1) The tethered cord shall be at least 25" 0.5" long, terminated with a crimped, #6 eyelet for attachment to the DU mount assembly top plate with # #6 pan head screw. (d) The stylus shall fit into the 0315” (dia) x 2” (deep) hole in the stylus holder located in the lower right comer of the DU installation mount top plate. See figure below for reference, INFORMATIONAL: The DU installation mount top plate and te mounting hardware for the stylus will be provided as part of the installation kits. They are demonstrated here for reference only and do not constitute a part of these specifications. th 6 inches nominal length and. a non-skid 46 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 Stylus attachment Figure 16. DU Insiallation Mount Assenrbly Top Plaie 3.2.14 Keyboard Unit (KU) ‘This section includes the physical and configuration characteristies of the Appliqué* JVS computer system Keyboard Unit (KU). Figure 17 depicts a logical block diagram of the KU. DU-to-KU Interfice KU Festures * Mouse Controller * Keyboard Controller * Power from DU © Tethered Cable to DU Figure 17: Keyboard Unit (KU) Block Diagram (a) To minimize the effects of the tactical environments, the KU"s keypad shall have sealed, environmentally resistance construction in QWERTY configuration, (b) The KU shall provide the functionality of 84-keys, HID class USB boot keyboard, as defined in USB HID V1.11. The “Num Lock”, “Caps Lock” and “Seroll Lock” keys and indicators are not required. If these keys and/or indicators are present on the KU, they ‘must remain non-operational, {6} The KU shall have a USB hub for interfacing with the USB hub in the DU, compatible with the USB HID V1.1] specification. (d) The KU shall support the “hot-connection (e) The KU keys shall be backlit (f) The KU shall provide independent controls for adjusting the backlight brightness. ” requirement specified in section 3.2.1.2.3. 47 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 (g) The KU backlight brightness shall be adjustable from dark to maximum brightness, INFORMATIONAL: For the purposes of this requirement, dark is defined as a light measurement with suitable instrumentation to determine that no illumination is Auman visible when the KU is viewed in a dark room, {h) The KU shall include an embedded pointing device emulating a USB boot mouse device, compatible with the USB HID V1.11 specification, (i) The pointing device (mouse) shall be functionally operable following a “hot-conaection” of the KU. G) KU Cable 1) The KU shall include an internally tethered cable behind a suitable “access cover panel”. 2) The cable shall be removable and replaceable by maintenance personnel upon removal of the access cover panel. 3) The cable shall be 48" minimum im length (keyboard to connector as shown in Figure 42) with a connector which interfaces to the DU"s keyboard interface connector, J2. 4) The KU cable connector shall be designated 1 on the cable. 5) The connector type and signals are detailed in section 3.2.2.8.9. 6) The cable interface connector shall have a right-angle back shell for cable strain relief. 7) The connector pins and sockets supporting USB +S Vde and USB Signal Ground shall be 0.1 inches (nominal) longer than standard connector signal pins to implement the USB requirement for Make-First, Break-Last on the power pins The connector keying and the orientation of the back shell on the KU interface cable shall be such that when the connector is mated with a DU, the right-angle back shell projects outward from the side of the DU, e.g. not upward or toward the user. See Figure 18. Figure 18: DU-KU Cable Orientation \(e) The Keyboard Unit design shall be such that a damaged KU cable can easily be replaced, by a trained technician at the Direct Support (DS) level of maintenance, by using common tools without disassembly of the entire LRU. INFORMATIONAL; The Direct Support (DS) level of maintenance is performed in the field by a maintainer but in a shop enviroment. The DS maintainer will repair failed LRU using available support equipment and spare Shop Replaceable Units (SRU). SRUs, normally non-soldered items, commonly consist of circuit card assemblies, cables, hatieries, switches, etc. 48 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 3.2.1.5 Removable Hard Disk Drive Cartridge (RHDDC) INFORMATIONAL: This section describes the requirements for a removable hard disk drive cartridge for use within the Appligué+ JVS camputer system. The cartridge can be manufactured using eisher the traditional rotating media disk drive or she newer soltd stare memory based hard drives, Individual requirements for both tpes of cartridges are ofien the same. This section only addresses the common and rotating media requirements. Requirements specific (0 solid state devices can he found in APPENDIX-C: OPTION ~ REMOVABLE SOLID STATE HARD DRIVE CARTRIDGE (RSSHDC). Since both types of cartridges provide identical functionality, RHDDC és used as a common acronym throughout shiv decument except where differentiation is exsential Furthermore, there are two different date interfaces available for RHDDCs. The requirements listed in this section are common to both interfaces. The items specific to each interface are braken out in the sub-sections that follaw Figure 19 depicts a logical block diagram of the RHDDC. PU Interface Connector Figure [9 RHDBC Block Diagram {a) The RHDDC shall be employed to install a non-volatile, mass storage device in an internal compartment of the PU, accessible through the front access door. () The removal and replacement of the RHDDC shall be possible by the operator without any special tools while the PU is installed in a platform environment, unless restricted by the physical security restrictions of the installation, INFORMATIONAL: To avoid corruption, it is strongly advised to perform an orderly shutdown before removing the cartridge. {¢) The RHDDC enclosure shall be constructed of material suitable for withstanding an operator drop. ‘The drop requirements will be verified as described in section 4.1.2.6. (d) The RHDDC enclosure shall be reusable and not damaged if the cartridge is opened for repairs or replacement of the internal drive, (e) See sub-seetions below for cartridge interface specific requiremet (8) Deleted. (a) Deleted. h) Deleted 49 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 3.2.15. PATA/EIDE (DB32) Cartridges ‘The following requirements are specifie to RHDDCs that use the PATA/EIDE interface. Note that the rotating media itself may have PATA or SATA interfaces. When SATA media is used, internal conversion to PATA is required to meet the interface requitements. (a) The RHDDC interface within PU shall be functionally compatible with, the Enhanced Integrated Drive Electronics (EIDE) as well as the Parallel AT Attachment (PATA), standards for storage media devices within PC compatible computer systems. (b) Rotating media disk drives shall have an unformatted capacity of at least 40 GB. (cy When SATA media is used, the RHDDC shall: i, Have an unformatted capacity of at least 160:GB for rotating media, ii, Be backwards compatible with V4 and EV4 processor units. iii, Report status via the Health, Status, and Logistics interface described in FBCB2-ICDHSL-0001, () The PATA RHDDC connector type and signals are detailed in section 3.2.2.8.10. 3.2.1.5.2 SATA (DB20) Cartridges The following requirements are specific to RHDDCs that use the SATA interface. (a) The RHDD! terface within PU shall be compatible with the SATA I standards with a goal of compatibility with SATA II standards for storage media devices within PC compatible computer systems (b) Rotating media disk drives shall have an unformatted capacity of at least 160 GB. (ch The SATA RHDDC connector type and signals are detailed in section 3.2.2.8.13. (d) SATA RHDDC units shall report status via the Health, Status, and Logistics interface described in FBCB2-ICDHSL-0001, 32.1.6 Appliqué+JV5 “Headless” Mode INFORMATIONAL: The “headless” configuration of the Appliqué-+ JVS computer system is defined as the one with only the PU with the RHDDC defined in this specifications document. The Appliqué+ JVS DU and the KU are not provided far the headless configuration, Suitable video display and keyboard devices, from other equipment suppliers, mav be employed so support the requirenrents for the headless operations, The following requirements are included here to ensure that she farm, fit & function identical PU and RHDDC are capable of operating in both, headless & fully configured, modes of operations under software application control (a) A PU and RHDDC combination (without the DU & KU) is defined as the “headless” configuration, {b) The PU with a RHDDC in the “headless” mode shall operate the same as a fully configured system, with DU & KU, when connected to an external power source via the JI Power connectar. (c} In the headless mode, when operating under the FBCB2 software, the PU sballl be able to connect to the remote display and keyboard via the Ethernet connection from the Expansion Interface on connector IS 50 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 (d) The PU and the RHDDC units shall be form, fit & functionally identical and interchangeable between the “full” and the “headless” configurations of the JV5S computer systems with the following exceptions: i, HSL warning and/or error message may be generated since the DU and KU are not attached, ii, Use ofa loopback connector for the DU/KU interface (J4) shall eliminate HSL waming andlor error messages that are DU/KU related. of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 3.2.2 Physical Characteristi ‘This section details all the physical requirements of the Appliqué+ V5 computer systems, which shall be compliant with the physical characteristics of existing, installation kits including, mounting brackets, mounting plates, isolators, mounting holes, ete, 32.2.1 Mounting Constraints To remain compatible with the existing installation and installation/mounting kits, the Appliqué+ JVS computer system shall conform to the following characteristics of such items (except those marked “nominal” which are for reference only), (a) Maximum Dimensions (see Table 2) (b) Weights (see Table 2) (c) Mounting Provisions (see sections 3.2.2.2, 3.2.2.2.2, 3.2.2.2.3, 3.2.2.3, and 3.2.2.4) (d) Nominal Detailed Drawings (see sections 3.2.2.2, 3.22.22, 3.22.23, 3.2 3.2.2.4) 42.21.14 LRU Dimensions and Weights ‘The table below shows the dimensions and weights of the four (4) LRUs of the Appliqué? JVS computer system. Detailed dimensional drawings are also included below in the appropriate sections |. and Table 2: LRU Dimensions and Weights LRU Dimensions Weight (Hx W xD) inches (Ibs) 20% Processor Unit (PU) | 5.40” x 12.95" x 11.50" (Max, 17.40 hs including the front | Envelope, excluding mounting | (Including battery door laiches and iO brackets) and mounting conneciors with-eaps | ¢ ger ' a brackets, excluding $40" 8 13.90" 11.50" (Max. | epoca Lully Envelope, including mounting brackets) Try) 5.1" x 11.3" x 10.2" (Nominal, base box) Display Unit (DU) | 2.80" x 13.35"% 10.10" (Max. 7.25 lbs including the /O envelope, all features) connector block and oe 1153" % 9.30" 2,82" x 11.83" x 9.30 GND lug on bottom (Nominal, base box) Keyboard Unit (KU) 1.35" x 11.75" x 7.50” 2.15 Ibs (Max. all feat (Including cable) cable) 1.0" 115" x 7.25" (Nominal, excluding cable) 52 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 LRU Dimensions Weight (Hx W xD) inches (ibs) + 20% PATA (DB32 1.27" x 5.76"x 8.17" (Max. | RHDDC: 0.95 Ibs Removable Hard envelope) 7 Dik Drive Uae Tras Tepes Cartridge (RHDDC) {Utility Tray SATA (DB20) 0,752" x 5.256" x 7.375" 0.70 Ibs Removable Hard | (Max. envelope, exeluding Disk Drive handle and ejectors) Cartridge (RHDDC) 3.2.2.2, PU Mounting Provisions This section details the physical characteristics of the PU as well as the provisions required for mounting the PU into different installation configurations. ‘The figures below are included here for references to the requirements listed within this section. PP uuu ella Hl ek ii! i liu ln! i i lili ii! ic tia il! li iii iv Ps ye a 20 Figure 20: Processor Unit Top View Dimensions 53 of 150Version 1,0, FBCB2-IV5-0001 12 June 2008 Figure 22; Processor Unit Left View Dimensions 54 of 150Version 1.0 FBCB2-J¥3-0001 12 June 2008 1 Figure 23: Processor Unit Right View Dimensions 55 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 iu g re a iii 4 jai i its Figure 24; Processor Unit Bottom View Dimensions (a) The PU shall include detachable mounting brackets, in accordance with the Government furnished assembly drawing number 881250, See figure below. 1} Left bracket shall be configuration -21 2) Right bracket shall be configuration -31. 3} The brackets shall also include the “front lock down hook” similar to Barry Controls part number 439507-01901,, 56 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 Right Bracket 881250-31 Front Lockdown Hooks . LE Barry Controls # 439507-01901 KE 4 " gh ST Figure 25: PU Mounting Brackets (881250-21 & -31) (b) The PU shall be able to install on the CPU isolation kit top plate, in accordance with the Government furnished assembly drawing number ¥81250-1 (Top Plate) and 872826 (solation Kit), using the Barry Controls TT-A-1 silicone isolators or equivalent. See figures below. ST of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 O ‘Top Plate pee _ S BS1250-1 = Isolation Kit per 872826-1 Barry Controls ‘Mount TT-A-1 Figiere 26: PU Isolation Kit (8728261) and Top Plate (881.250-1) {c) The following critical features and dimensional characteristics of the Processor Unit are as shown in the PU dimensional drawings in this section: 1) Location of helicoils on top of PU housing, 4 places, 0,190-32 UNF-2B (#10-32 NF) shall be as shown in Figure 20. 2) Location of helicoils on the bottom of the PU housing, 4 places, 0.250-20 UNI 2B shall be-as shown in Figure 24, 3) Location of LO connectors, J1 through J10, [1] shall be within 0.25" of specified placement shown in in Figure 22, JI [2] shall be an the front in the approximate location shown in Figure 21 and accessible with the PU door closed. INFORMATIONAL: Exact placement of J} is not critical. 4) Connectors J4 & 16 [i] shall be on the same vertical centerline. Connectors 15 & J6 horizontal centerlines [ii] shall be within 0.25" of each other, 58 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 5) RHDDC access in the PU is via the latched front face of the unit as specified in sections 3.2.1.1.3. 6) The circuit breaker (power switch) is located on the lower left quadrant of the front face of the PU as specified in section 3,2,1,1.11, 7) A threaded Chassis Ground (GND) stud, designated E1, size 0,250-20 UNC-3B, 0.6" long, shall be provided next to connector JS on the left face of the PU. See Figure 3.2.2.2.1 PU Access, Ventil jon and Sway Space Clearances ‘The figures in this section detail the recommended clearance space around the PU for the following: (a) Adequate access to front door for RHDDC insertion and removal (b) Ventilation envelop for adequate air circulation around the PU at worst case ambient conditions, (@) Sway space clearance when the PU is mounted on the isolation mount shown in Figure 29-and Figure 30 at the highest specified shock and vibration levels (dl) Adequate left side cable interconnection space. ‘The clearance envelopes are defined with dashed lines. SERVICE HARD olsk SPACE ORE UNIT RHDDC access clearance with Wiig il i the PU front oe <1 door open. See 4 bee Figure 2 for ~ _ mH — VENTILATION ' SPACE. dimensions as0 - REQUIRED with door PROGESSOR UNIT SIDE VIEW WITH DOOR OPEN closed, Figure 27> PU Clearance for RHDDC Access & Rear Ventilation 59 of 150Version 1,0, FBCB2-1V5-0001 12 June 2008 VENTILATION | [ SPAGE REQUIRED ce -—4.00 CLEARANCE PROCESSOR UNIT REQUIREMENT. FRONT VIEW FOR CONNECTORS Figure 28; PU Clearance for lO Connectors Access & Ventilation Figure 29 PU isolation Mount Vibration Clearances in X-Y dimensions 60 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 Figure 30: PU isolation Mount Vibration Clearances in Z dimen 3.2.2.2.2 PATA RHDDC and Utility Tray Mounting Provisions within PU (a) PATA RHDDC and Utility Tray assemblies shall be able to be installed in the PATA / Utility (DB32) Bay of IVS Processor Units. (b) PATA RHDDC units shall able to be installed in the PATA (DB32) Bay of V4 and EV4 Processor Units. {e) Figure 31 details the nominal outline of the PATA RHDDC, Tolerances are +0.01 inches. The Litility Tray (not shown) uses the same outer dimensions with additional connectors, See section 3,2,2.1,1 for size requirements, 199 igure 31> PATA RHDDC Physical Dimensions 3.2.2.2.3 SATA RHDDC Mounting Provisions within PU {a) The SATA RHDDC shall be able to be installed in the SATA (DB20) Bay of JVS Processor Units. 61 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 (b) Figure 32 through Figure 34 details the nominal outline of the SATA RHDDC. Tolerances are #0,010 inches unless otherwise stated. See section 3.2.2.1.1 for size requirements. Figure $2: SATA RADDC Side View Figure 33; SATA RHDDC Top View 62 of 150Version 1,0, FBCB2-1V5-0001 12 June 2008 Figure 34: SATA RHDDC End View 3.2.2.3 DU Mounting Provisions This section details the physical characteristics of the Display Unit as well as the provisions required for mounting the DU into different installation configurations, The figures below are included here for references to the requirements listed within this section. 156 \_ocoroszrnuisTe ‘SCREW 250L0NG Figure 35: Display Unit Top View Dimensions 63 of 150Version 1,0, FBCB2-1V5-0001 12 June 2008 GND Lug, E1 Figure 36: Display Unit Front View Dimensions 64 of 150Version 1,0, FBCB2-1V5-0001 12 June 2008 Figure 37: Display Unit Right View Dimensions 65 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 a a Mounting Plate SN per 872879 Figure 387 Display Unit Mounting Plate with Stylus Holder (872879) (a) Mounting provisions for the Display Unit are as follows: 1} The DU shall mate with the mounting plate assembly, in accordance with the GFE drawing 872879, 2) The front face of the DU shall have four (4) captive screws, #10-32 NF, 2.50” long, in the four comers as shown in the figure above. 3) Location and orientation of connectors and housing shall be as shown in the figure above within + 0.25", 4) The ground lug shall be as follaws (See Figure 36 and Figure 37}: i, 0.250°-20 UNC ii, Protrude between 0.40" to 0.50" iii, Designated E1 iv. Located on the bottom of the BU 5} The bezel control keys and indicators shall be located as shown on the front face of the display unit. See section 3.2.1.2.5 (Controls) and section 3.2.1.2.6 (Indicators), 6) The bezel function keys shall be located as shown on the front face of the display unit, See section 3.2.1.2.4 7) The provisions for physical security of the DU are detailed in section 3.2.2.5 {Physical Security). (b) Reserved. 3.2.2.3.1 DU Access, Ventilation and Sway Space Clearances ‘The figures in this section detail the recommended clearance space around the DU for following: (a) Adequate aceess to 1/O connectors for cables attachment. 66 of 150Version 1,0, FBCB2-1V5-0001 12 June 2008 {(b) Ventilation envelop for adequate air circulation around the DU at worst ease ambient conditions, (c) Sway space clearance when the DU is mounted on the isolation mount shown in Figure 40-and Figure 41 at the highest specified shock and vibration levels, (a) The clearance envelopes are defined with dashed lines. 2.00-| | VENTILATION SPACE REQUIRED 2.00 Figure 40: DU Isolation Mount Vibration Clearances in X-¥ dimensions Figure 41: DU isolation Mount Vibration Clearances in Z dimension 67 of 150Version 1.0 FBCB2-JV3-0001 12 June 2008 3.2.24 KU Mounting Provisions ‘This section details the physical characteristics of the Keyboard. ‘The figures below are included here for references to the requirements listed within this section. fr 48MIN + Figure 43: Keyboard Unit Front View Dimensions 1X 6:82 UNCAZB 700 | E ‘Access door for . | KU cable OS eae ae removal 1) }—— 10.230" ——» Figure dd: Keyboard Unit Bottom View Dimensions (a) Mounting provisions for the Keyboard Unit shall include four each #6-32-NC-2B threaded inserts as shown in the bottom view figure above, (b) The Keyboard Unit shall include four (4x) threaded inserts #6-32-NC-2B, for attaching a carrying handle, along the back edge as shown in the tear view figure below. INFORMATIONAL: The keyboard handles and stowage box are mentioned here for reference only. The Appliqué JVS computer KUs will not be delivered with the 68 of 150