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Lab No 3 (DLD)

This lab report summarizes a digital logic design lab on verifying De Morgan's law and implementing Boolean functions using logic gates. The objectives were to practice Boolean algebra and verify De Morgan's law using logic gate ICs. Equipment included a trainer, wires, power supply, and logic gates. De Morgan's law was verified by implementing circuits for both sides of the law and comparing results. Boolean functions were implemented by first writing equations in Boolean form, creating truth tables, and then building circuits using logic gates. The results matched what was derived theoretically, verifying De Morgan's law. Overall, the lab provided experience with implementing mathematical laws and designing circuits for equations.
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0% found this document useful (0 votes)
57 views

Lab No 3 (DLD)

This lab report summarizes a digital logic design lab on verifying De Morgan's law and implementing Boolean functions using logic gates. The objectives were to practice Boolean algebra and verify De Morgan's law using logic gate ICs. Equipment included a trainer, wires, power supply, and logic gates. De Morgan's law was verified by implementing circuits for both sides of the law and comparing results. Boolean functions were implemented by first writing equations in Boolean form, creating truth tables, and then building circuits using logic gates. The results matched what was derived theoretically, verifying De Morgan's law. Overall, the lab provided experience with implementing mathematical laws and designing circuits for equations.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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MT-256L Digital Logic Design

Lab Reports

Subject: MT256L- Digital Logic Design


Semester: Fall 2023
Total Marks: 10

Lab Engineer: Engr. Sadia Saeed

Submitted by:

Reg. ID Section
211260 A

Department of Mechatronics & Biomedical Engineering


Air University Islamabad

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MT-256L Digital Logic Design

Lab No. 3
Verification of DE Morgan’s Law and Implementation of Boolean
Function through logic gates

Objectives: -
• Implementation of Boolean arithmetic.
• Using logic gate ICs verifying DE Morgan’s law.
• Developing a new approach for using logic IC’s.

Equipment: -
• Trainer.
• Connecting wires.
• Power Supply.
• 14 Pin ICs (AND, OR, NOT).

Introduction: -
This lab is about utilizing logic gates IC’s for performing Boolean arithmetic and giving us
about a broad way of how we can use IC’s (AND, OR, NOT) for verifying different laws like DE
Morgan’s. Now, for Boolean algebra it’s the basic form algebra which deals with the binary
variables and logic operations. Binary uses only two values 1 or 0.
De Morgan’s Law: It can be expressed in Boolean logic as: NOT (a AND b) = NOT a OR
NOT b; NOT (a OR b) = NOT a AND NOT b.

(x+y)’ = x’. y’
(x.y)’ = x’+y’

Complement of AND of two gates is equal to the OR of both gate’s negation or complement of OR
of two gates is equal to the AND of both gate’s negation.

Procedure: -

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MT-256L Digital Logic Design

• We start with some basic mathematics, taking an equation converting it into


simplest form then transforming it into Boolean arithmetic.

• Then we theoretically implement the truth table.


• After that we verify the DeMorgan’s Law by implementing its left and right hand
side and compare the results.

• Then we implement the respective circuit on proteus software. Here are the figures.

Here are the truth tables, which shows the comparison of the left and right hand side of the
DeMorgan’s Law

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MT-256L Digital Logic Design

Practical procedure: -
We implement the gates making circuits according to the equation or functions. First we
make tables for observations then giving them input according to the table we note down the
outcome. Following is a figure from our practical.

Step 1: Place 7404, 7408 and 7432 IC’s on breadboard.


Step 2: Give all the IC’s +5V DC supply and ground.
Step 3: Connect the wire according to the diagram.
Step 4: Give inputs according to truth tables.
Step 5: Record the outputs and then match them with truth table.
Step 6: After verifying all the circuits un-patch it.

Schematic Procedure: -
Step 1: Select all the components from the list which you want to use.
Step 2: Click on the component and place them on the schematic in orderly manner. Step
3: Make the connection according to the circuit diagram you are provided with.
Step 4: Make sure you have made all connections right.
Step 5: Give the source DC and place ground.

We made the following schematics in the lab by using proteus.

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MT-256L Digital Logic Design

Implementation of Boolean Function


We will start with some basic mathematics, taking an equation converting it into simplest form
then transforming it into Boolean arithmetic. For example, A simple equation written in Boolean
arithmetic form like,
F =x + (y.z)

showing us there are three inputs x, y and z. Function uses one OR, NOT and AND gate.
Here is the truth table of the following function.

(x+y)’:

Pin1 Pin 2 Pin 3 Pin 6A Pin 6Y


0 0 0 0 1
1 0 1 1 0
0 1 1 1 0
1 1 1 1 0

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MT-256L Digital Logic Design

x’. y’:

Pin 6A Pin 6Y Pin 1 Pin 5A Pin 5Y Pin 2 Pin 3

0 1 1 0 1 1 1
1 0 0 1 0 0 0
1 0 0 0 1 1 0
0 1 1 1 0 0 0

(x.y)’ :

PIN 1 PIN 2 PIN 3 PIN 6A PIN 6Y


0 0 0 0 1
1 0 0 0 1
0 1 0 0 1
1 1 1 1 0

x’+y’ :

PIN 6A PIN 6Y PIN 1 PIN 5A PIN 5Y PIN 2 PIN 3


0 1 1 0 1 1 1
1 0 0 0 1 1 1
0 1 1 0 1 1 1
1 0 0 1 0 0 0

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MT-256L Digital Logic Design

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MT-256L Digital Logic Design

Observations & Conclusion: -


After implementing the whole circuit , giving it the outputs according to truth table we have
observed the same results which we had derived in theoretical procedure Table 2 and Table
3. We have verified the De Morgan’s law (both theorems).

We have used logic gates for verifying a mathematical equation transformed into Boolean
function, this opens a new door way in our knowledge to look at same old mathematical equations
and functions from a new perspective. We also learned:

1. Implementation of mathematical laws.


2. First step of implementing a random equation like F1.
3. Designing circuits for mathematical equations.

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