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Analysis of high power IGBT short circuit failures

Conference Paper  in  IEEE Transactions on Plasma Science · June 2004

DOI: 10.1109/MODSYM.2004.1433603 · Source: IEEE Xplore

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 SLAC-PUB-11025
February 2005

Analysis of High Power IGBT Short Circuit

Failures
M. J. Barnes, Member, IEEE, E. W. Blackmore, Member, IEEE, G. D. Wait, J. Lemire-Elmore,
B. Rablah, G. Leyh, M. Nguyen, and C. Pappas

emitter voltage (Vge)) IGBT modules from manufacturer

Abstract—The Next Linear Collider (NLC) accelerator “A” [2]. These IGBTs were developed for traction
proposal at SLAC requires a highly efficient and reliable, low applications and, although not specifically designed for ultra-
cost, pulsed-power modulator to drive the klystrons. A solid-state high speed pulsed power use, were used successfully in a
induction modulator has been developed at SLAC to power the
klystrons; this modulator uses commercial high voltage and high
prototype induction modulator.
current Insulated Gate Bipolar Transistor (IGBT) modules.
Testing of these IGBT modules under pulsed conditions was very II. TESTING OF IGBTS
successful; however, the IGBTs failed when tests were performed The prototype solid-state induction modulator has been
into a low inductance short circuit. The internal electrical
designed, built and tested at SLAC [2]. The manufacturer “A”
connections of a commercial IGBT module have been analyzed to
extract self and mutual partial inductances for the main current IGBT modules in the modulator worked reliably during
paths as well as for the gate structure. The IGBT module, normal operation but many failed during an arc on the
together with the partial inductances, has been modeled using secondary. Measurements have shown that peak current
PSpice. Predictions for electrical paths that carry the highest through an IGBT module can exceed 15 kA during an arc,
current correlate with the sites of failed die under short circuit with a rate of rise greater than 10 kA/µs [2]. An IGBT test
tests. A similar analysis has been carried out for a SLAC
proposal for an IGBT module layout. This paper discusses the
circuit was set up to simulate short-circuit faults on the
mathematical model of the IGBT module geometry and presents secondary of the modulator.
simulation results. Two types of short circuit test have been carried out at
SLAC: ‘soft’ and ‘hard’ short circuit. A ‘hard’ short circuit is
Index Terms—Current density, High-speed electronics, defined to occur when there is a short circuit present when the
Insulated gate bipolar transistors, Inductance, Linear IGBT is switched on, whereas a ‘soft’ short circuit is one that
accelerators, Power semiconductor devices, Power
occurs after the IGBT has been turned on. Under ideal
semiconductor switches, Pulse power system switches.
conditions, an IGBT facing a soft short-circuit would
I. INTRODUCTION experience a rise in collector current (Ic) until the IGBT
comes out of saturation, at which point the collector voltage
T he NLC accelerator proposal at SLAC has selected the
solid-state induction modulator approach for its X band
klystrons because of its high efficiency, high reliability, and
would rise and the current would be safely limited by the
transconductance of the switch. Ideally, with a gate-emitter
drive of +15 V applied, the IGBT die in the manufacturer “A”
low cost [1]. The topology selected for the modulator consists module would come out of saturation and self limit the
of 80 off single turn magnetic cores, each driven by its own module fault current to somewhere around 5 kA.
solid-state switch. The secondary of the modulator has three SLAC performed soft short circuit tests by using the IGBT
turns: the total leakage inductance referred to the secondary is module to discharge a capacitor through a saturable inductor.
low (<20 µH) [1]. To drive the core without using a matched Initially the current would rise slowly at a rate limited by the
PFN requires a switch that can turn on and off fast at high inductance of the circuit. As soon as the core saturated it no
power levels [1]. longer impeded the current flow and a soft short was
The solid-state induction modulator uses high voltage represented. Measurements made during the soft circuit test,
(3.3 kV) high current (4 kA pulses for 10 µs, at 15 V gate- with an initial collector-emitter voltage of 2.2 kV, are shown
in Fig. 1. Unpredicted current and gate waveforms, and IGBT
Manuscript received July 26, 2004. TRIUMF receives federal funding via a failures, occurred when tests were performed into extremely
contribution agreement through the National Research Council of Canada.
M. J. Barnes, E. W. Blackmore, and G. D. Wait, are with TRIUMF,
low inductance (<50 nH) short circuits. A number of failed
Vancouver, BC, Canada (telephone: 604-222-7308, e-mail: IGBT modules were carefully dissected and analyzed, in order
[email protected]). to determine the mechanisms of failure [2].
J. Lemire-Elmore is with the University of British Columbia, Vancouver,
BC, Canada.
B. Rablah is with the University of Victoria, Victoria, BC, Canada. III. OVERVIEW OF IGBT FAILURE
G. Leyh, M. Nguyen, and C. Pappas, are with SLAC, Menlo Park, CA
The design of the IGBT module from manufacturer “A”
94025, USA.
Work supported in part by the Department of Energy, contract DE-AC02-76SF00515
Stanford Linear Accelerator Center, Stanford University, Stanford, CA 94309
 TPS0642.R2 2

employs a total of 16 IGBT die and 8 anti-parallel diodes. more stress than IGBT A.
Internally the IGBT module has four identical rafts. Each raft
has four IGBT die and 2 anti-parallel diodes as shown in IV. IGBT FAILURE INVESTIGATIONS
Fig. 2. Emitter and collector busbars (shown in Fig. 3) connect
to each raft. The two die closest to the collector busbar are A. SLAC
referred to as ‘IGBT A’, while the two closest to the emitter In order to understand these IGBT failures, SLAC and
busbar are referred to as ‘IGBT B’. TRIUMF undertook parallel investigations; both investigated
the assumption that an imbalance in inductances between the
electrical paths was to blame. At SLAC various simulations of
an IGBT module were performed:
• Circuit analysis using PSpice [3]. The simulation included
inductance, calculated using Maxwell3D [4], for the
emitter of IGBT A and IGBT B: mutual coupling was not
modeled in the PSpice simulation. The simulation
predicted a large current spike when the emitter
inductances were unmatched (10 nH for IGBT A and
0.01 nH for IGBT B), but showed normal behaviour
when these emitter inductances were equal [1];
• Electromagnetic analysis using Maxwell3D: busbars,
collector and emitter traces, wire bonds and IGBT die
were all modeled as being copper. Hence the IGBT die, in
the Maxwell3D simulation, do not have gain or Miller
capacitance. A simulated rate of rise of current of
Fig. 1. Measured soft short-circuit waveforms for a manufacturer “A” IGBT between 7.5 kA/µs and 9.4 kA/µs was applied to the
module. IGBT module. The simulations showed that the current
density was greatest in IGBT B [2].
B. TRIUMF
At TRIUMF, current sharing between the IGBT die was
investigated using the circuit analysis code PSpice. The model
included calculated values for self and mutual inductances of
the electrical paths, as well as realistic electrical
characteristics of the IGBT die.
1) Inductance Model

Fig. 2. Internal layout of manufacturer “A” IGBT module.

SLAC opened up 13 failed IGBT modules to determine the

position of failure (see Table I). The observed failures all
occurred on one of the IGBT die closest to the emitter busbar.
Inspection of damaged IGBT modules suggested that
asymmetry in the internal layout of the IGBT die was causing
a current imbalance which led to IGBT B taking considerably
TABLE I Fig. 3. Raft from a manufacturer “A” IGBT module.
LOCATION OF FAILED IGBT DIE ON RAFTS

Raft Die Position on Raft Number of Failures Fig. 3 shows a diagram of a raft from a manufacturer “A”
IGBT module. In Fig. 3, the placement of nodes in an
1 IGBT B, top 5 equivalent circuit of the IGBT raft are indicated by the dots,
2 IGBT B, top 4 and the effective circuit linking these nodes is traced out with
3 IGBT B, bottom 2 lines. The main power connections to the IGBT die are via:
4 IGBT B, top 2
• Collector busbar, to a wide and flat collector plane, to
the collector of IGBT A and then to the collector of
 TPS0642.R2 3

IGBT B; IGBT A;
• Emitter busbar, to a power emitter plane: LemitterB represents the inductance of the emitter wire
o Bond wires connect from the power emitter bonds of IGBT B;
plane to the emitter of IGBT B. LEmitterAB represents the inductance of the power
o The power emitter continues past IGBT B emitter plane shared by both IGBT A and IGBT B;
towards IGBT A: wire bonds connect from the LgateA represents the inductance of the gate wire bond
power emitter to the emitter of IGBT A. of IGBT A;
The gate drive to the IGBT die is applied via external gate LgateB represents the inductance of both the gate wire
and control emitter terminals. bond and gate trace of IGBT B;
• The gate connection to IGBT A runs a relatively LcontrolEmitter represents the inductance of the
short distance through a gate trace and then connects to control emitter trace and wire bond to the power
the die via a wire bond. The control emitter connection emitter plane.
to IGBT A is through a control emitter trace, then via a Each emitter wire bond touches the collector plane in a
wire bond to the power emitter plane, along the power different location. However, the circuit model lumps all these
emitter plane, and finally through the wire bonds which wires as one inductance attached to the IGBT die at one node.
connect the power emitter plane to the emitter of For this first order inductance model, variations of current
IGBT A. density between the eight-emitter wire bonds are ignored and
• The gate connection to IGBT B runs through a gate all emitter wires are treated as emanating from a common
trace and then connects to the die via a wire bond. The node.
control emitter connection to IGBT B is through a Fig. 5 shows straight segment conductors as regular
control emitter trace, then via a wire bond to the power inductors. However, inductance is only defined for closed
emitter plane, and finally through the wire bonds which loops, and the inductance depends critically on the chosen
connect the power emitter plane to the emitter of return path. A circuit can be treated as being made up of
IGBT B. ‘partial inductances’, but this is only valid when a complete
Fig. 4 identifies the main components of the inductance loop is considered and all the mutual terms between the partial
model derived for two IGBT die: due to symmetry between inductances are considered [6].
the upper and lower halves of the raft (Fig. 2), and the pattern
of the failures, it was deemed sufficient to model only two of
the four IGBT die using PSpice [5].

Fig. 5. Equivalent circuit for half a raft from a manufacturer “A” IGBT
Fig. 4. Basis of circuit model for half a raft from a manufacturer “A” IGBT module.
module.

Codes such as FastHenry [7], Amperes [8] and Faraday [8]

Fig. 5 shows an image of the lower half of an IGBT raft are capable of calculating partial inductance. FastHenry, a
with an equivalent circuit superimposed to show the location public domain inductance extractor, was used to calculate the
of the inductances to be modeled. The dot adjacent to each partial inductance matrix for an IGBT raft. FastHenry is a
inductor indicates the first node of the inductor in the PSpice three-dimensional inductance extraction program that
model, as per “dot” convention, and indicates the positive computes the frequency dependent resistances and self and
direction of mutual coupling. There are 8 wire bonds joining mutual inductances between conductors of complex shape.
each IGBT die to the emitter plane; these are modeled as FastHenry simulates the geometry of an object as a collection
going straight up, over, and down rather than following a of rectilinear conductors, and calculates the electrical
curved trajectory. In Fig. 5: impedance of the object between various node points.
LCollectorB represents the inductance out of the FastHenry treats the model as a ‘n’ port network. The
collector of IGBT B; output of a simulation is a text file impedance matrix showing
LCollectorAB represents the inductance out of the the direct and trans-impedances across each port at a specific
collector plane shared by both IGBT A and IGBT B; frequency. The result is as if an AC current was applied to one
LEmitterA represents the inductance of both the port on the network, and the induced voltage on all ports was
emitter wire bonds and power emitter plane of
 TPS0642.R2 4

TABLE II
SELF INDUCTANCE (MAIN DIAGONAL) AND MUTUAL COUPLING COEFFICIENTS FOR EQUIVALENT CIRCUIT SHOWN IN FIGURES 5 & 6.
LCollectorAB LCollectorB LEmitterA LEmitterB LEmitterAB LGateA LGateB LControlEmitter
LCollectorAB 12.59nH −0.158 −0.200 −0.086 0.035 0.163 −0.027 0.061
LCollectorB −0.158 6.45nH 0.353 −0.021 −0.167 −0.034 0.179 −0.196
LEmitterA −0.200 0.353 11.05nH 0.063 −0.118 −0.219 0.156 −0.173
LEmitterB −0.086 −0.021 0.063 2.18nH 0.104 −0.101 −0.315 0.047
LEmitterAB 0.035 −0.167 −0.118 0.104 10.63nH −0.052 −0.192 0.225
LGateA 0.163 −0.034 −0.219 −0.101 −0.052 16.45nH 0.114 −0.054
LGateB −0.027 0.179 0.156 −0.315 −0.192 0.114 27.96nH −0.296
LControlEmitter 0.061 −0.196 −0.173 0.047 0.225 −0.054 −0.296 13.80nH

measured. The real and imaginary impedance components die, as a function of voltage: the measurements were
give the resistance and inductance values, respectively, seen carried out for Vce up to 350 V DC. The gate-emitter
through the port. The imaginary impedance component on the capacitance simulated is approximately 14.7 nF.
main diagonal of the output matrix gives the self-inductance; Other modeling considerations were:
whereas the off diagonal terms of the imaginary impedance Diodes (Fig. 2) were not modeled since, during turn-on
component give the mutual inductance. For the PSpice model conditions being examined, they are not conducting;
the mutual inductance term is expressed as a coupling Only the wire bonds emerging from each IGBT die
coefficient. Table II shows the calculated self and mutual were modeled. A second set of wire bonds, which daisy
inductances for the inductors shown in Figs. 5 & 6: the self- chain the two halves of a die, were not simulated.
inductance terms are on the main diagonal. The off-diagonal
15
terms in Table II are the mutual inductance coupling 14
coefficients. 13
12
11
Capacitance (nF)
10
RCollectorAB Power_Collector 9
8
LCollectorAB 7
RCollectorB 6
5
C LCollectorB C 4
G IGBT "A" G 3 Ccg (Miller)
IGBT "B"
LGateA E E 2
LGateB 1 Cce
RGateA LEmitterA LEmitterB
0
RGateB
0 10 20 30 40 50 60
Gate_Trigger REmitterA Voltage (V)
REmitterB
Fig. 7. Measured Miller capacitance (Cgc) and Collector-Emitter capacitance
LControlEmitter (Cce), for one IGBT die, versus voltage.
LEmitterAB
RControlEmitter
REmitterAB The PSpice circuit shown in Fig. 6 closely follows the
Control_Emitter Power_Emitter layout shown in Fig. 5. The self-inductance values are read in
Fig. 6. PSPICE model for half an IGBT raft from manufacturer “A”. from an external file that also contains the mutual coupling
terms. The PSpice model represents 1/8th of the 16 IGBT die
in the manufacturer “A” IGBT module.
2) PSpice Model of IGBT In order to simulate realistic waveforms inside the IGBT
Manufacturer “A” does not supply SPICE models for many module it is necessary to create waveforms, in a circuit
of their products. Therefore the PSpice model for an IGBT die external to that of Fig. 6, which are similar to those measured.
was based on an International Rectifier (IR) IRG4PH50U [9] The PSpice external circuit may not exactly represent the test
IGBT SPICE model: this IGBT is a single die device. The IR hardware used. The simulated gate-emitter drive voltage
IGBT die model was “tuned” as follows: traverses between −15 V and +14 V. The gate drive is applied
The model parameters were adjusted to give a good outside the IGBT module, between “Gate_Trigger” and
representation of the manufacturer “A” data sheet DC “Control_Emitter” (Fig. 6); therefore Vge on an individual
transfer characteristics, scaled for one die, at 25°C, IGBT die can be different to the externally applied drive.
with a collector emitter voltage of 20 V; Predictions presented for Vge are between the gate and
Measurements of capacitance of manufacturer “A” emitter of the IR IGBT model.
IGBT die were carried out. The parameters of an IR
IGBT die model were adjusted to give good correlation
3) Simulation Results – Normal Operation
with the measured voltage dependent capacitances.
Fig. 7 shows the measured Miller capacitance (Cgc) The predicted currents for normal operation are shown in
and Collector-Emitter capacitance (Cce) for one IGBT Fig. 8: the maximum current is almost 3 kA per IGBT module
 TPS0642.R2 5

(average of 180 A per each of 16 IGBT die). IGBT B approximately 30% greater than 1/16th of the module
conducts only slightly more current than IGBT A. Assuming maximum current and is a result of Vge of IGBT B being
uniform current distribution in each IGBT die and that each increased by approximately 2.5 V during the period of rapidly
die has an effective cross-sectional area, for the collector- rising current. The maximum current through IGBT A is less
emitter current, of 80 mm2 the maximum current density in the than 1/16th of the module maximum current and is a
silicon is approximately 2.3 A/mm2. consequence of Vge of IGBT A being decreased by
The current imbalance during the period of rising current is approximately 3 V, during the period of rapidly rising current.
a result of Vge of IGBT A being decreased during this period. Assuming uniform current distribution in each IGBT die
and that each die has an effective cross-sectional area, for the
20 550 collector-emitter current, of 80 mm2 the maximum current
18 500 density in the silicon of IGBT B is approximately 6.1 A/mm2.
16 IGBT "B" Vge 450 Since the soft short circuit leads to IGBT failure, this
Gate Voltage (V)

14 400
prediction is further analyzed to understand the reasons for the

Current (A)
12 350
10
IGBT "A" Vge
300 current imbalance between the die IGBT A and IGBT B.
8 250
IGBT "B" CURRENT 20 550
6 200 IGBT "B" CURRENT
4 150 18 500
2 100 16 450
IGBT "A" CURRENT IGBT "B" Vge
0 50 14 400

Gate Voltage (V)

-2 0 12 350

Current (A)
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06 3.5E-06 4.0E-06 10 300
Time (s) 8 250
IGBT "A" Vge
6 200
Fig. 8. Predictions for normal operation for two IGBT die in a manufacturer
“A” module. 4 150
2 100
IGBT "A" CURRENT
4) Simulation Results – Hard Short Circuit 0 50
The simulated gate-emitter drive voltage, for operation with -2 0
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06
a hard short circuit, has a flattop duration of 800 ns. The
Time (s)
maximum current is approximately 5.9 kA per IGBT module
Fig. 10. Predictions for soft short circuit for two IGBT die in a manufacturer
(average of 370 A per each of 16 IGBT die). The predicted “A” module.
currents are shown in Fig. 9: not only is the current imbalance
significant, the current traces are diverging during the rising V. ANALYSIS OF PREDICTIONS
edge of the current waveform. This divergence is a result of
Vge of IGBT A being decreased by several volts during the IGBT B conducts significantly more current than IGBT
period of rising current. IGBT B conducts a maximum current A under both hard and soft short circuit conditions (Figs. 9
20% greater than 1/16th of the module maximum current. and 10). However IGBT B fails only under soft short circuit
conditions (Table I). Theories were formulated, and tested, for
20 550
18
IGBT "B" CURRENT
500
the increase in Vge on IGBT B and the reduction in Vge on
16 450 IGBT A during soft short circuit conditions:
IGBT "A" Vge
14 400 • Mutual coupling between inductances in the main
Gate Voltage (V)

IGBT "B" Vge

12 350 current paths and connections to the gates (LGateA and
Current (A)

10 300
LGateB in Fig. 6) – see Table II;
8 250
6 200
• Mutual coupling between inductances in the main
4 150 current paths and the control emitter (LControlEmitter
2 100 in Fig. 6) – see Table II;
IGBT "A" CURRENT
0 50 • Rising voltage across the collector-emitter of the
-2 0
IGBT die, together with Miller capacitance between
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06
Time (s)
collector and gate, causing an increase in gate voltage.
Fig. 9. Predictions for hard short circuit for two IGBT die in a manufacturer
• The presence of a resistor in the gate circuit of each
“A” module. IGBT raft.

5) Simulation Results – Soft Short Circuit A. Effect of Mutual Coupling to Gate Traces
The simulated gate-emitter drive voltage, for operation with During a soft short circuit Vge for IGBT B rises by almost
a soft short circuit, has a flattop duration of 1.2 µs. The 2.5 V and the maximum current through IGBT B is 490 A
maximum current is 6 kA per IGBT module (average of (Fig. 10). To determine the effect of the mutual couplings to
375 A per die). The predicted currents are shown in Fig. 10: the gate traces and gate wire bonds these couplings were set to
the maximum current through IGBT B (490 A) is zero. Without mutual coupling to the gates, the Vge of both
 TPS0642.R2 6

die IGBT A and IGBT B fall by about 3 V upon application of however the couplings from the high current paths
the soft short circuit, and the predicted currents through IGBT LCollectorB and LEmitterA to LControlEmitter are significant
A and IGBT B are limited to 320 A and 350 A (Fig. 11), too.
respectively. Hence inductive coupling from the main current The control-emitter trace runs parallel to the segment of
paths to the gate traces significantly contributes to current gate trace that controls IGBT B (Figs. 3 and 5): these traces
imbalance between the IGBT die. Table II shows that the high are physically close, and have a similar geometry. The
current path LemitterB is most strongly coupled to LgateB; coupling coefficients from the high current paths LCollectorB,
however the couplings from the high current paths LEmitterA and LEmitterAB, to both LGateB and
LemitterAB, LcollectorB and LemitterA to LgateB are LControlEmitter are similar in magnitude and therefore the
significant too. induced voltages tend to have a relatively small effect on Vge
of IGBT B. However the coupling coefficient from LEmitterB
20 550 to LGateB is significantly larger than from LEmitterB to
18 IGBT "B" Vge 500
IGBT "A" Vge LContolEmitter: hence a rapidly rising current in the emitter
16 450
IGBT "B" CURRENT of IGBT B couples strongly to its own gate, increasing Vge
Gate Voltage (V)

14 400
(see section V.A.).

Current (A)
12 350
10 300
8 250
C. Effect of Miller Capacitance
6 200 To determine the effect of the Miller capacitance upon the
4 150 magnitude of current in the IGBT die an additional, non-
2 100
IGBT "A" CURRENT linear, capacitance was modeled between the gate and
0 50
-2 0 collector of each die. Fig. 7 shows the measured Miller
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06 capacitance for an IGBT die: the value of this voltage
Time (s) dependent capacitance is approximately given by equation 1.
20nF
Fig. 11. Predictions for soft short circuit without mutual couplings to the gate
Ccg ≈ + 28 pF (1)
Vcg + 1.4
traces and gate wire bonds, for two IGBT die in a manufacturer “A” module.

Adding a non-linear capacitor per die, whose value is given

B. Effect of Mutual Coupling to Control-Emitter by equation 1, increases the maximum fault current from
To determine the effect of the mutual couplings to the 490 A to 500 A, for IGBT B, and from 360 A to 380 A for
control emitter these couplings were set to zero. Without IGBT A (Fig. 13).
mutual coupling to the control emitter, the Vge of IGBT B IGBT "B" CURRENT
20 550
rises by about 5 V when the soft short circuit occurs (Fig. 12). 18 500
As a result the maximum fault current through IGBT B 16 450
IGBT "B" Vge
Gate Voltage (V)

increases from 490 A to 520 A when the mutual couplings to 14 400

Current (A)
the control emitter are set to zero. Similarly the maximum 12 350
IGBT "A" Vge
10 300
fault current through IGBT A increases from 360 A to 395 A. 8 250
IGBT "B" CURRENT 6 200
20 550 4 150
18 500 2 100
IGBT "B" Vge
16 450 0 50
IGBT "A" CURRENT
Gate Voltage (V)

14 400 -2 0
Current (A)

12 350 5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06

10 300
Time (s)
8 250
IGBT "A" Vge
6 200 Fig. 13. Predictions for soft short circuit with an additional capacitance per
4 150 die, between gate and collector, whose value is given by equation 1.
2 100 Predictions are for two IGBT die in a manufacturer “A” module.
0 50
-2 IGBT "A" CURRENT 0
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06 D. Effect of Gate Resistor
Time (s) The PSpice predictions detailed above simulated a
Fig. 12. Predictions for soft short circuit without mutual couplings to the resistance of 4 Ω in series with the gate drive for the 2 die:
control-emitter, for two IGBT die in a manufacturer “A” module. this models the presence of a 2 Ω resistor in the gate circuit of
each IGBT raft (IGBT raft consists of 4 die). To determine the
Inductive coupling from the main current paths to the effect of the gate resistor, simulations were performed as
control emitter trace helps to limit the maximum current follows:
through the IGBT die. Table II shows that the high current • 2 Ω in series with the gate drive for the 2 die;
path LEmitterAB is most strongly coupled to LcontrolEmitter; • 1 Ω in series with the gate drive for the 2 die;
 TPS0642.R2 7

• 0.1 Ω in series with the gate drive for the 2 die. current imbalance between IGBT die is not significantly
Halving the gate resistance, to 2 Ω per half raft, decreases affected.
the maximum fault current from 490 A to 470 A, for IGBT B, 20
IGBT "B" CURRENT
550
and from 360 A to 340 A for IGBT A (Fig. 14): the maximum 18 500
IGBT "B" Vge
current is reduced from 6 kA to 5.6 kA per IGBT module. The 16 450

Gate Voltage (V)

reduction in current through IGBT B is a result of a decrease 14 400

Current (A)
12 350
in the peak value of Vge of IGBT B from 16.6 V to 15.8 V. 10 300
Further reducing the gate resistance to 1 Ω per half raft 8
IGBT "A" Vge
250
decreases the maximum fault current to 450 A, for IGBT B, 6 200
4 150
and to 330 A for IGBT A (Fig. 15): the maximum current is
2 100
reduced to 5.4 kA per IGBT module. IGBT "A" CURRENT
0 50
A gate resistance of 0.1 Ω per half raft decreases the -2 0
maximum fault current to 425 A, for IGBT B, and to 320 A 5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06
for IGBT A (Fig. 16): the maximum current is reduced to Time (s)
5.1 kA per IGBT module. However the PSpice simulations
Fig. 16. Predictions for soft short circuit, with 0.1 Ω gate resistance per half
show that, with a gate resistance of less than approximately raft, for two IGBT die in a manufacturer “A” module.
0.6 Ω her half raft (0.3 Ω per raft of 4 die) the gate current can
start to oscillate, which also results in large transient values of VI. ANALYSIS OF SLAC IGBT
Vge (Fig. 16).
SLAC considered several layouts of IGBT modules to
20
IGBT "B" CURRENT
550
mitigate the current imbalance between die [2]. A modified
18 500 rectilinear design, consisting of 4 rafts of die, was proposed
IGBT "B" Vge
16
IGBT "A" Vge
450 and built (Fig. 17). The design of the SLAC rectilinear IGBT
Gate Voltage (V)

14 400 module is similar to the IGBT module from manufacturer ‘A’

Current (A)

12 350
10 300
in that it features four identical "rafts" of four IGBT die each,
8 250 but differs in the geometry of both these rafts and their
6 200 surrounding casing.
4 150
2 IGBT "A" CURRENT 100
0 50
-2 0
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06
Time (s)

Fig. 14. Predictions for soft short circuit, with 2 Ω gate resistance per half raft,
for two IGBT die in a manufacturer “A” module.

IGBT "B" CURRENT

20 550
18 500
IGBT "B" Vge
16 450
Gate Voltage (V)

14 400
Current (A)

12 350
10 300
IGBT "A" Vge
8 250
6 200
4 150
2 100 Fig. 17. Isometric view of the SLAC rectilinear 5.0 module. An IGBT raft is
IGBT "A" CURRENT
0 50 shown with a dashed box around it.
-2 0
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06
Fig. 18 shows a detailed view of one raft of the SLAC
Time (s)
rectilinear IGBT module. A preliminary model of this IGBT
Fig. 15. Predictions for soft short circuit, with 1 Ω gate resistance per half raft, module, with a gate resistance of 2 Ω per IGBT raft, has been
for two IGBT die in a manufacturer “A” module. simulated at TRIUMF under soft short circuit conditions:
predictions show that this particular layout significantly
The value of the gate resistance significantly affects the reduces the current imbalance between IGBT die (Fig. 19).
magnitude of the fault current, under soft short circuit The current imbalance between IGBT die is reduced because
conditions. Although a lower value of gate resistance results the layout reduces induced voltages in the gate-emitter circuits
in lower fault currents, and Vge more closely follows the (Fig. 20).
externally applied gate-emitter voltage, the absolute value of
 TPS0642.R2 8

primary cause of current imbalance between the die in the

IGBT module from manufacturer “A”. The coupling to the
gate circuits can boost the Vge of die above the externally
applied gate voltage, and therefore potentially increase the
fault current. Hence IGBT module designs intended for high
di/dt applications need to pay particular attention to the
internal layout relative to the main power paths.
A value of gate resistance of less than 2 Ω, per IGBT raft,
results in reduced fault currents, however the absolute value
of current imbalance between IGBT die is not significantly
affected. A gate resistance of less than approximately 0.3 Ω
Fig. 18. SLAC rectilinear 5.0 IGBT layout of one raft: the top emitter plane is per raft (of 4 IGBT die) is not recommended as it results in
omitted for clarity. oscillatory gate current.
Preliminary simulations of the SLAC rectilinear IGBT
550 module show that the current sharing between die, under soft
500 short circuit conditions, is good.
450
400 REFERENCES
Current (A)

350
Bottom two die [1] R. L. Cassel and M. N. Nguyen, “A new type short circuit failures of
300 high power IGBT’s,” in Proc. Pulsed Power Plasma Science Conf.,
250 Las Vegas, 2001, pp. 322–324.
Top two die
200 [2] G. E. Leyh, “A critical analysis of IGBT geometries, with the intention
150 of mitigating undesirable destruction caused by fault scenarios of an
100 adverse nature,” in Proc. Pulsed Power Conf., Dallas, 2003,
50 pp. 366-368.
0 [3] Cadence, San Jose, CA 95134, USA. www.orcad.com.
[4] Ansoft, Pittsburgh, PA 15219, USA. www.ansoft.com.
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06 [5] B. Rablah, “An analysis of the effects of parasitic inductance in internal
Time (s) IGBT module geometry,” TRIUMF Co-op Student Report, 2004.
Fig. 19. Predicted current for soft short circuit for one raft of four IGBT die, [6] M. Kamon, L. Silveira, C. Smithhisler, and J. White, “FastHenry User's
for the SLAC rectilinear IGBT layout, with 2 Ω gate resistance per raft. Guide (Version 3.0),” Research Laboratory of Electronics,
Massachusetts Institute of Technology, Cambridge, MA, USA, 1996.
[7] RLE Computational Prototyping Group, Massachusetts Institute of
20 Technology, Cambridge, MA, USA,
18 www.rle.mit.edu/cpg/research_codes.htm.
Bottom two die
16 [8] Integrated Engineering Software, Winnipeg, Manitoba, Canada,
Gate Voltage (V)

14 www.integratedsoft.com.
12 [9] International Rectifier, http://www.irf.com.
10
Top two die
8
6
4
2
0
-2
5.0E-07 1.0E-06 1.5E-06 2.0E-06 2.5E-06 3.0E-06
Time (s)
Fig. 20. Predicted gate-emitter voltages for soft short circuit for one raft of
four IGBT die, for the SLAC rectilinear IGBT layout, with 2 Ω gate resistance
per raft.

Reducing the gate resistance to 0.5 Ω per IGBT raft reduces

the maximum current by approximately 25 A per IGBT die.
An additional non-linear capacitor per die, whose value is
given by equation 1, to simulate the effect of increased Miller
capacitance, increases the maximum current by approximately
12 A per IGBT die.

VII. CONCLUSION
The research has identified inductive coupling from the
power traces to both the gate traces and gate wire bonds as the

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