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Exercise 2

The document discusses computer instruction execution and addressing. It defines the following states that define instruction execution: instruction address calculation, instruction fetch, instruction operation decoding, operand address calculation, operand fetch, data operation, and operand store. It also lists two approaches to dealing with multiple interrupts - disabling interrupts while one is processed or defining interrupt priorities. Finally, it lists the types of transfers a computer's interconnection structure must support, and states that a multiple-bus architecture allows for increased performance and more efficient resource use compared to a single-bus architecture.

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Lam Tien Hung (K17 HCM)
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59 views

Exercise 2

The document discusses computer instruction execution and addressing. It defines the following states that define instruction execution: instruction address calculation, instruction fetch, instruction operation decoding, operand address calculation, operand fetch, data operation, and operand store. It also lists two approaches to dealing with multiple interrupts - disabling interrupts while one is processed or defining interrupt priorities. Finally, it lists the types of transfers a computer's interconnection structure must support, and states that a multiple-bus architecture allows for increased performance and more efficient resource use compared to a single-bus architecture.

Uploaded by

Lam Tien Hung (K17 HCM)
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Review Questions

3.1 What general categories of functions are specified by computer instructions?


-The general categories of functions specified by computer instructions are
processor-memory, processor-I/O, data processing, control: an instruction may
specify that the sequence of execution be altered.
3.2 List and briefly define the possible states that define an instruction execution.
- Instruction address calculation (iac): Determine the address of the next
instruction to be executed. Usually, this involves adding a fixed number to the
address of the previous instruction.

- Instruction fetch (if): Read instruction from its memory location into the
processor.

- Instruction operation decoding (iod): Analyze instruction to determine type of


operation to be performed and operand(s) to be used.

-Operand address calculation (oac): If the operation involves reference to an


operand in memory or available via I/O, then determine the address of the
operand.

- Operand fetch (of): Fetch the operand from memory or read it in from I/O.

- Data operation (do): Perform the operation indicated in the instruction.

- Operand store (os): Write the result into memory or out to I/O.

3.3 List and briefly de


fine two approaches to dealing with multiple interrupts.

- Two approaches can be taken to dealing with multiple interrupts:


- The first is to disable interrupts while an interrupt is being processed. A disabled
interrupt simply

means that the processor can and will ignore that interrupt request signal.
- A second approach is to define priorities for interrupts and to allow an

interrupt of higher priority to cause a lower-priority interrupt handler to be itself


interrupted
3.4 What types of transfers must a computer’s interconnection structure (e.g., bus)
support?
-Memory to processor
-Processor to memory
-I/O to processor
-Processor to I/O
-I/O to or from memory
3.5 What is the benefit of using a multiple-bus architecture compared to a single-
bus architecture?
The benefit of using a multiple-bus architecture compared to a single-bus architecture is that a
multiple-bus architecture allows for increased performance and more efficient use of processor
resources. In a multiple-bus architecture, data can be transferred in both directions at the same
time, allowing for more parallel operations. Additionally, a multiple-bus architecture can support
multiple devices simultaneously, allowing for more efficient use of resources.
Problems
3.1 The hypothetical machine of Figure 3.4 also has two I/O instructions:
0011 = Load AC from I/O
0111 = Store AC to I/O
In these cases, the 12-bit address identifies a particular I/O device. Show the
program execution (using the format of Figure 3.5) for the following program:
1. Load AC from device 5.
2. Add contents of memory location 940.
3. Store AC to device 6.
Assume that the next value retrieved from device 5 is 3 and that location 940
contains a value of 2.

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