Pin Connections: Order This Document by MC34181/D
Pin Connections: Order This Document by MC34181/D
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Quality bipolar fabrication with innovative design concepts are employed
for the MC33181/2/4, MC34181/2/4 series of monolithic operational 8
8 1
amplifiers. This JFET input series of operational amplifiers operates at 1
210 µA per amplifier and offers 4.0 MHz of gain bandwidth product and P SUFFIX D SUFFIX
10 V/µs slew rate. Precision matching and an innovative trim technique of PLASTIC PACKAGE PLASTIC PACKAGE
the single and dual versions provide low input offset voltages. With a JFET CASE 626 CASE 751
input stage, this series exhibits high input resistance, low input offset voltage (SO–8)
and high gain. The all NPN output stage, characterized by no deadband
crossover distortion and large output voltage swing, provides high PIN CONNECTIONS
capacitance drive capability, excellent phase and gain margins, low open
loop high frequency output impedance and symmetrical source/sink AC Offset Null 1 8 NC
frequency response. 2 – 7 VCC
The MC33181/2/4, MC34181/2/4 series of devices are specified over the Inputs
3 + 6 Output
commercial or industrial/vehicular temperature ranges. The complete series
VEE 4 5 Offset Null
of single, dual and quad operational amplifiers are available in the plastic
DIP as well as the SOIC surface mount packages. (Single, Top View)
• Low Supply Current: 210 µA (Per Amplifier)
• Wide Supply Operating Range: ±1.5 V to ±18 V Output 1 1 8 VCC
• Wide Bandwidth: 4.0 MHz 2
–
1 7 Output 2
Inputs 1
• High Slew Rate: 10 V/µs 3 + 2
–
6
Inputs 2
•
+
VEE 4 5
Low Input Offset Voltage: 2.0 mV
• Large Output Voltage Swing: –14 V to +14 V (with ±15 V Supplies) (Dual, Top View)
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (from VCC to VEE) VS +36 V
Input Differential Voltage Range VIDR Note 1 V
Input Voltage Range VIR Note 1 V
Output Short Circuit Duration (Note 2) tSC Indefinite sec
Operating Junction Temperature TJ +150 °C
Storage Temperature Range Tstg –60 to +150 °C
NOTES: 1. Either or both input voltages should not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded (see Figure 1).
Internal VCC
Bias Q8
Network Q9
Q7
Neg Pos
J1 J2 D1 D3
C1
+
R6
Q1 D2 R7
Q4 VO
Q2 Q3 C2
R1 R2 Q5 Q6
I3
I4
R3 R4
R5
VEE
1 5
Null Offsets
MC3X181 (Single) Only
–
+
5
1 VEE
25 kΩ
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Input Offset Voltage (RS = 50 Ω, VO = 0 V) VIO mV
Single
TA = +25°C — 0.5 2.0
TA = 0° to +70°C (MC34181) — — 3.0
TA = –40° to +85°C (MC33181) — — 3.5
Dual
TA = +25°C — 1.0 3.0
TA = 0° to +70°C (MC34182) — — 4.0
TA = –40° to +85°C (MC33182) — — 4.5
Quad
TA = +25°C — 4.0 10
TA = 0° to +70°C (MC34184) — — 11
TA = –40° to +85°C (MC33184) — — 11.5
Average Temperature Coefficient of VIO (RS = 50 Ω, VO = 0V) ∆VIO/∆T — 10 — µV/°C
Input Offset Current (VCM = 0 V, VO = 0V) IIO nA
TA = +25°C — 0.001 0.05
TA = 0° to +70°C — — 1.0
TA = –40° to +85°C — — 2.0
Input Bias Current (VCM = 0 V, VO = 0V) IIB nA
TA = +25°C — 0.003 0.1
TA = 0° to +70°C — — 2.0
TA = –40° to +85°C — — 4.0
Input Common Mode Voltage Range VICR (VEE +4.0 V) to (VCC –2.0 V) V
Large Signal Voltage Gain (RL = 10 kΩ, VO = ±10 V) AVOL V/mV
TA = +25°C 25 60 —
TA = Tlow to Thigh 15 — —
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Slew Rate (Vin = –10 V to +10 V, RL = 10 kΩ, CL = 100 pF) SR V/µs
AV = +1.0 7.0 10 —
AV = –1.0 — 10 —
Channel Separation (RL = 10 kΩ, –10 V < VO < +10 V, 0 Hz < f < 10 kHz) — — 120 — dB
Open Loop Output Impedance |Zo| — 200 — Ω
(f = 1.0 MHz)
Figure 1. Maximum Power Dissipation versus Figure 2. Input Common Mode Voltage Range
Temperature for Package Variations versus Temperature
P D , MAXIMUM POWER DISSIPATION (mW)
2400 0
V ICR, INPUT COMMON MODE VOLTAGE
TSSOP–14
1200 SO–14 3.0
800 2.0
SO–8
400 1.0
VEE
0 0
–55 –40 –20 0 20 40 60 80 100 120 140 160 –55 –25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C)
VCC = +15 V
1.0 10
0.1
5
0.01
0.001 0
–55 –25 0 25 50 75 100 125 –10 –5.0 0 5.0 10
TA, AMBIENT TEMPERATURE (°C) VICR, INPUT COMMON MODE VOLTAGE (V)
TA = 25°C
VCC = +15 V Source
30 –2.0 VEE = –15 V
–3.0 TA = +25°C
20
RL = 10 k
+3.0
10 +2.0
Sink
+1.0 VEE
0 0
0 2.0 4.0 6.0 8.0 10 12 14 16 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10
VCC, |VEE|, SUPPLY VOLTAGE (V) IL, LOAD CURRENT (mA)
Figure 7. Output Saturation Voltage versus Figure 8. Output Saturation Voltage versus
Load Resistance to Ground Load Resistance to VCC
V sat , OUTPUT SATURATION VOLTAGE (V)
0 0
V sat , OUTPUT SATURATION VOLTAGE (V)
VCC VCC
–1.0 –1.0
VCC = +15 V
–2.0 VEE = –15 V –2.0
TA = +25°C
–3.0 –3.0
3.0 3.0
VCC = +15 V
2.0 2.0 VEE = –15 V
TA = +25°C
1.0 1.0
VEE VEE
0 0
1.0 k 10 k 100 k 1.0 M 1.0 k 10 k 100 k 1.0 M
RL, LOAD RESISTANCE TO GROUND (Ω) RL, LOAD RESISTANCE (Ω)
|Z O |, OUTPUT IMPEDANCE ( Ω )
RL ≤ 0.1 Ω VCM = 0 V
VID = 1.0 V VO = 0 V
20 ∆IO = 10 µA
200 TA = 25°C
Sink AV = 1000
100 10 1.0
10
100
Source
0 0
–55 –25 0 25 50 75 100 125 100 1.0 k 10 k 100 k 1.0 M
TA, AMBIENT TEMPERATURE (°C) f, FREQUENCY (Hz)
Figure 11. Output Voltage Swing Figure 12. Output Distortion versus
versus Frequency Frequency
30 1.0
THD, TOTAL HARMONIC DISTORTION (%)
VO , OUTPUT VOLTAGE SWING (V p–p )
Figure 13. Open Loop Voltage Gain Figure 14. Open Loop Voltage Gain and
versus Temperature Phase versus Frequency
A VOL, OPEN LOOP VOLTAGE GAIN (V/mV)
70 100
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
VCC = +15 V
φ , EXCESS PHASE (DEGREES)
60 VEE = –15 V
80 VO = 0 V 0
Gain
RL = 10 kΩ
50 TA = 25°C
60 45
Phase
40 40 90
VCC = +15 V
VEE = –15 V
30 RL = 10 kΩ 20 135
f ≤ 10 Hz
TA = 25°C
20 0 180
–55 –25 0 25 50 75 100 125 1.0 10 100 1.0 k 10 k 100 k 1.0 M 10 M 100 M
TA, AMBIENT TEMPERATURE (°C) f, FREQUENCY (Hz)
Figure 15. Normalized Gain Bandwidth Figure 16. Output Voltage Overshoot
Product versus Temperature versus Load Capacitance
GBW, GAIN BANDWIDTH PRODUCT (NORMALIZED)
1.3 100
20
0.8
0.7 0
–55 –25 0 25 50 75 100 125 10 100 1.0 k
TA, AMBIENT TEMPERATURE (°C) CL, LOAD CAPACITANCE (pF)
Figure 17. Phase Margin versus Figure 18. Gain Margin versus
Load Capacitance Load Capacitance
70 10
VCC = +15 V VCC = +15 V
, PHASE MARGIN (DEGREES)
30
4.0
20
2.0
m
10
φ
0 0
10 100 1.0 k 10 100 1.0 k
CL, LOAD CAPACITANCE (pF) CL, LOAD CAPACITANCE (pF)
60
8.0
A m, GAIN MARGIN (dB)
CL = 10 pF
50 7.0
6.0
40 CL = 100 pF 5.0
CL = 100 pF
4.0
30
VCC = +15 V 3.0 VCC = +15 V
VEE = –15 V 2.0 VEE = –15 V
20
RL = 10 kΩ to ∞ RL = 10 kΩ to ∞
–10 V < VO < +10 V 1.0 –10 V < VO < +10 V
10 0
–55 –25 0 25 50 75 100 125 –55 –25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C)
Figure 21. Normalized Slew Rate Figure 22. Common Mode Rejection
versus Temperature versus Frequency
1.1 140
Figure 23. Input Noise Voltage Figure 24. Power Supply Rejection
versus Frequency versus Temperature
100 110
20 Negative Supply
0 80
10 100 1.0 k 10 k 100 k –55 –25 0 25 50 75 100 125
f, FREQUENCY (Hz) TA < AMBIENT TEMPERATURE (°C)
Figure 25. Power Supply Rejection Figure 26. Normalized Supply Current
versus Frequency versus Supply Voltage
|IEE |, I CC , SUPPLY CURRENT (NORMALIZED)
140 1.2
PSR, POWER SUPPLY REJECTION (dB)
∆VO/ADM
120 +PSR = 20Log
∆VCC
+PSR (∆VCC = ±1.5 V) 1.1
100 ∆VO/ADM
–PSR = 20Log
–PSR (∆VEE = ±1.5 V) ∆VEE TA = 25°C
80 1.0
125°C
60 –55°C
0.9
VCC = +15 V VCC = +15 V
40 VEE = –15 V ∆VCC VEE = –15 V
TA = 25°C –
ADM ∆VO
0.8 TA = 25°C
20 + RL = ∞
∆VEE VO = 0V
0 0.7
100 1.0 k 10 k 100 k 1.0 M 0 5.0 10 15 20
f, FREQUENCY (Hz) VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 27. Channel Separation versus Frequency Figure 28. Transient Response
140
VCC = +15 V
RL = 10 kΩ
100 AV = +1.0
TA = 25°C
80
60
40 VCC = +15 V
VEE = –15 V
20 TA = +25°C
0
10 k 100 k 1.0 M 10 M t, TIME (2.0 µs/DIV)
f, FREQUENCY (Hz)
VCC = +15 V
V O , OUTPUT VOLTAGE (20 mV/DIV)
VEE = –15 V
RL = 10 kΩ
AV = +1.0
TA = 25°C
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
8 5
NOTES:
–B– 1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
1 4
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
F
MILLIMETERS INCHES
NOTE 2 –A– DIM MIN MAX MIN MAX
A 9.40 10.16 0.370 0.400
L B 6.10 6.60 0.240 0.260
C 3.94 4.45 0.155 0.175
D 0.38 0.51 0.015 0.020
F 1.02 1.78 0.040 0.070
C G 2.54 BSC 0.100 BSC
H 0.76 1.27 0.030 0.050
–T– J J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
SEATING N L 7.62 BSC 0.300 BSC
PLANE M ––– 10_ ––– 10_
M
D K N 0.76 1.01 0.030 0.040
H G
0.13 (0.005) M T A M B M
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
NOTES:
A D 1. DIMENSIONING AND TOLERANCING PER ASME
C
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
8 5 3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
E H 0.25 M B M
5. DIMENSION B DOES NOT INCLUDE MOLD
1 PROTRUSION. ALLOWABLE DAMBAR
4 PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
h X 45 _
B q MILLIMETERS
e DIM MIN MAX
A 1.35 1.75
A A1 0.10 0.25
C B 0.35 0.49
SEATING C 0.18 0.25
PLANE D 4.80 5.00
L E 3.80 4.00
0.10 e 1.27 BSC
H 5.80 6.20
A1 B h 0.25 0.50
L 0.40 1.25
0.25 M C B S A S
q 0_ 7_
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
–A– Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
14 8 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
–B– P 7 PL 5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
1 7
0.25 (0.010) M B M PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS INCHES
G R X 45 _ F DIM MIN MAX MIN MAX
C A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
–T– F 0.40 1.25 0.016 0.049
K M J G 1.27 BSC 0.050 BSC
SEATING D 14 PL
PLANE J 0.19 0.25 0.008 0.009
0.25 (0.010) M T B S A S K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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*MC34181/D*
12 ◊ MC34181/D
MOTOROLA ANALOG IC DEVICE DATA