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Bece102P: Lab Assessment Task-2 (Winter Semester 2022-23)

This document contains Tanisha Jauhari's lab assessment task submission for the winter semester of 2022-23. It includes source code and output for digital logic circuits like half adder, half subtractor, full adder, and full subtractor.

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Tanisha Jauhari 21BCE3566
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45 views

Bece102P: Lab Assessment Task-2 (Winter Semester 2022-23)

This document contains Tanisha Jauhari's lab assessment task submission for the winter semester of 2022-23. It includes source code and output for digital logic circuits like half adder, half subtractor, full adder, and full subtractor.

Uploaded by

Tanisha Jauhari 21BCE3566
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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DIGITAL SYSTEM DESIGN 1

BECE102P: LAB ASSESSMENT TASK-2


(Winter Semester 2022-23)

Name Tanisha Jauhari

Registration No.: 21BCE3566

Date: 15th March, 2023

Slot: L5+L6

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DIGITAL SYSTEM DESIGN 2

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DIGITAL SYSTEM DESIGN 3

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DIGITAL SYSTEM DESIGN 4

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DIGITAL SYSTEM DESIGN 5

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DIGITAL SYSTEM DESIGN 6

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DIGITAL SYSTEM DESIGN 7

Output:
• Half Adder:
o Source Code:

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DIGITAL SYSTEM DESIGN 8

o Output:

• Half Subtractor:
o Source Code:

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DIGITAL SYSTEM DESIGN 9

o Output:

• Full Adder:
o Source Code:

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DIGITAL SYSTEM DESIGN 10

o Output:

• Full Subtractor:
o Source Code:

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DIGITAL SYSTEM DESIGN 11

o Output:

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