ECE3 Laboratory1
ECE3 Laboratory1
ELECTRO
NICS ING
LABORATORY
1
Electronics 2
Common Emitter Amplifier
Electronic
Circuits
Analysis and
Design
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
SCORE
Timeliness 20 15 10 5
Page 2 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
Experiment No. 1
Common Emitter Amplifier
Objective:
To determine the gain and bandwidth of a CE Amplifier from its frequency response curve.
SOFTWARE REQUIRED:
Multisim
THEORY:
The single stage common emitter amplifier circuit shown above uses what is commonly
called "Voltage Divider Biasing" or “self biasing”. This type of biasing arrangement uses two
resistors as a potential divider network and is commonly used in the design of bipolar transistor
amplifier circuits. This type of biasing arrangement greatly reduces the effects of varying Beta, (β)
by holding the Base bias at a constant steady voltage. This type of biasing produces the greatest
stability.
The Common Emitter Amplifier circuit has a resistor in its Collector circuit. The current
flowing through this resistor produces the voltage output of the amplifier. The value of this resistor is
chosen so that at the amplifiers quiescent operating point, Q-point this output voltage lies half way
along the transistors load line. In Common Emitter Amplifier circuits, capacitors C1 and C2 are used
as Coupling Capacitors to separate the AC signals from the DC biasing voltage. This ensures that the
bias condition set up for the circuit to operate correctly is not affected by any additional amplifier
stages, as the capacitors will only pass AC signals and block any DC component.
The output AC signal is then superimposed on the biasing of the following stages. Also a
bypass capacitor, CE is included in the Emitter leg circuit. This capacitor is an open circuit
component for DC bias meaning that the biasing currents and voltages are not affected by the
addition of the capacitor maintaining a good Q-point stability. However, this bypass capacitor short
circuits the Emitter resistor at high frequency signals and only RL plus a very small internal
resistance acts as the transistors load increasing the voltage gain to its maximum.
Generally, the value of the bypass capacitor, CE is chosen to provide a reactance of at most,
1/10th the value of RE at the lowest operating signal frequency. A single stage Common Emitter
Amplifier is also an "Inverting Amplifier" as an increase in Base voltage causes a decrease in V out
and a decrease in Base voltage produces an increase in Vout. The output signal is 180◦ out of phase
with the input signal.
CIRCUIT DIAGRAM:
Page 3 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
PROCEDURE:
1. Open the Multisim icon in the system.
2. Place all the necessary components required for the design of the CE amplifier circuit i.e.
Resistors, Capacitors, Transistors, Voltage sources, Power sources, Ground etc on the design
window.
3. Connect all the components by proper wiring and also assure that nodes are formed at the
interconnection points.
4. Connect the two channels of the Oscilloscope to input and output of the circuit and by using the
simulation switch and check the input and output waveforms.
5. Assign net numbers to input and output wires by double clicking on the particular wire and
clicking on the show option.
6. To observe the frequency response, go to simulate-----► analysis-----►ac analysis and select the
start and stop frequencies, select vertical scale as decibels, specify the output variables and click
on simulate.
7. A window opens showing the frequency response on the top and phase response at the bottom.
8. From the frequency response, calculate the bandwidth of the Amplifier.
9. To obtain the netlist, go to transfer-----►export netlist and save the netlist in a text file. On
opening the text file from the saved location, a netlist is obtained containing the specifications of
all the used components used in the design of the circuit.
Page 4 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
OBSERVATION TABLE:
S.No Frequency(hz) Output voltage(vo) Voltage gain Gain (db)
(vo/vi) Avf=20 log (vo/vi).
1 50 281.60mV 15.94 24.05
Page 5 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
RESULT:
The maximum gain is 30.086dB and bandwidth is 1.639415066MHz of the CE Amplifier.
DISCUSSION
* Based on the generated waveform, it can be inferred that the input and output waveform have a
phase difference of 180 degrees. Instead of the gain will increase as the frequency increases, at some
frequencies, after the mid-frequency region on the frequency response curve, the gain is decreasing
while the frequency is increasing.
QUESTIONS:
1. What is the phase difference between input and output waveform of CE amplifier?
*The phase difference between the input and output waveform of CE amplifier is 180 degree.
3. If the given transistor is replaced by P-N-P, can we get the output or not?
*Replacing the NPN transistor with a PNP transistor will not get the output. When the transistor
was replaced by a PNP transistor, the input and output waveform doesn't have 180° phase
difference. The amplitude of the input waveform is almost the same with the generated output
waveform based on the oscilloscope. Therefore, it can be inferred that the output was not amplified.
Page 7 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
the coupling capacitor on the output forms a lead circuit with RL in series with Re, the coupling
capacitors produce a phase shift. They affect the low-frequency response of the amplifier.
1. Find the frequency response of CE Amplifier by changing the bypass capacitor value.
Page 8 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
Page 9 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
Based on the frequency response generated, changing the value of the bypass capacitor will
affect the gain on the low frequency before the mid- frequency region region, but will not have
much effect on the higher frequency. Whenever the bypass capacitor is connected in parallel
with an emitter resistance, the voltage gain of the CE amplifier increases. If the bypass capacitor
is removed, an extreme degeneration is produced in the amplifier circuit and the voltage gained
will be reduced.
CONCLUSION
The common emitter amplifier is also called an inverting amplifier because there a 180 degrees
phase difference between the input and output waveform. It is commonly used due to its high
voltage gain and high current gain. Based on the conducted experiment, the frequency response
and other characteristics of the common emitter amplifier were shown on the simulation. It can
be inferred that the gain increases as the frequency increases but will stop increasing at certain
point even though the frequency is still increasing. Therefore, in the lower frequency range, the
gain falls due to the coupling capacitors and the bypass capacitor. In the mid-frequency range,
the gain remained the same even when the frequency increases. Beyond the higher cutoff
frequency, the gain decreases with increasing frequency due to the parasitic capacitance. The
calculated bandwidth was 1.639415066MHz, and to get the lower and higher cutoff frequency, 3
dB will be deducted from the maximum gain located on the middle region of the frequency
response curve. When the value of the bypass capacitor was decreased, the gain on the lower
frequency region has also decreased, whereas when the value of the bypass capacitor was
Page 10 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023
Republic of the Philippines
Laguna State Polytechnic
Province of Laguna
COLLEGE OFUniversity
ENGINEERING
increased, the gain on the lower frequency region was higher. This was proved when the bypass
capacitor was changed to 25 uF and at 10Hz, the gain was 2.8701 dB . At the higher frequency
region, when the value of bypass capacitor was changed, there were no extreme effects or
changes compared to the lower frequency region.
Page 11 of 11
ECE 3/Electronics 2
Second Semester/ A.Y. 2022-2023