Code No: R1921056 R19 SET - 1

II B. Tech I Semester Regular Examinations, March - 2021

COMPUTER ORGANIZATION
(Com to CSE, IT)
Time: 3 hours Max. Marks: 75
Answer any FIVE Questions each Question from each unit
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~

1 a) Draw and explain Von Neumann Architecture. Explain Moore’s Law. [8M]
b) Give the major characteristics of RISC and CISC architectures. [7M]
Or
2 a) Explain IEEE-754 model for floating point representation. [8M]
b) Explain about Booth’s multiplication algorithm and solve Multiply 7 and 3. [7M]
3 a) Explain the I/O instructions and type of I/O instructions. [8M]
b) Write a program to evaluate the arithmetic statement A=X-Y+C/P+Q using a [7M]
stack organized computer with zero address instructions.
Or
4 a) Explain about computer registers set in detailed. [8M]
b) Explain indirect address mode and how the effective address is calculated in this [7M]
case.
5 a) Write the procedure to mitigate number of bits in micro instructions. [8M]
b) Explain arithmetic micro operations with examples. [7M]
Or
6 a) What is a micro-operation of list and explain the four categories of the most [8M]
common micro-operations?
b) Differentiate the relative addressing and index addressing modes. [7M]
7 a) Discuss about Cache-mapping functions. [8M]
b) What is associative memory? Explain with the help of block diagram. Also [7M]
mention the situation in which associative memory can be effective utilized.
Or
8 a) Explain the Direct mapping in cache memory with an example. [8M]
b) Explain about Direct Memory Access (DMA). [7M]
9 a) Explain instruction pipeline with neat timing diagram. [8M]
b) Discuss Flynn’s classification of computer. [7M]

Or
10 a) Draw and explain arithmetic pipeline for floating point multiplication. [8M]
b) Explain about Interconnection network. [7M]
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Code No: R1921056 R19 SET - 2

II B. Tech I Semester Regular Examinations, March - 2021

COMPUTER ORGANIZATION
(Com to CSE, IT)
Time: 3 hours Max. Marks: 75
Answer any FIVE Questions each Question from each unit
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~

1 a) Discuss Arithmetic addition and subtraction with signed-2’s complement

representation. [8M]
b) Is there any alternate of Von-Neumann architecture? If exists than give the basic
idea of them. [7M]
Or
2 a) Discuss modified Booth algorithm with suitable example. [8M]
b) Discuss the advantages, disadvantages, and applications of i) Excess – 3 code ii)
Gray Code(Illustrate with one example each) [7M]
3 a) Explain the significance of the shift micro operations. [8M]
b) Explain about Arithmetic Micro operations in detailed. [7M]
Or
4 a) What is the difference between a direct and an indirect address instruction? How
many references to memory are needed for each type of instruction to bring an
operand into a processor register? [8M]
b) How an interrupt is recognized? Explain the interrupt cycle. [7M]
5 a) What are addressing modes? Give an overview of the addressing modes. [8M]
b) Justify the statement “Stack computer consist of an operation code only with no
address field”. [7M]
Or
6 a) Discuss the different addressing modes of an instruction. [8M]
b) How stack is implemented in a general microprocessor system. [7M]
7 a) What is virtual memory? With the help of neat sketch explain the method of
virtual to physical address translation. [8M]
b) Explain the READ and WRITE operations in Associative Memory. [7M]
Or
8 a) What is cache memory? Explain different types of mapping from main memory to
cache memory. [8M]
b) Give the hardware organization of associative memory. Why associative memory
is faster than other memories. Deduce the logic equation used to find the match in
the associative memory. [7M]
9 a) Explain about pipeline multiplexer. [8M]
b) Write short note on i) Magnetic Disks ii) Magnetic tapes [7M]
Or
10 a) Draw and explain arithmetic pipeline for floating point addition. [8M]
b) Explain about Hypercube and Mesh network. [7M]
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Code No: R1921056 R19 SET - 3

II B. Tech I Semester Regular Examinations, March - 2021

COMPUTER ORGANIZATION
(Com to CSE, IT)
Time: 3 hours Max. Marks: 75
Answer any FIVE Questions each Question from each unit
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~

1 a) Explain with the help of an example, the use of hamming code as error detection [8M]
and correction code.
b) State the condition in which overflow occurs in case of addition & subtraction of [7M]
two signed 2's complement number. How is it detected?
Or
2 a) Convert hexadecimal number F2A7C2 to binary and octal numbers. [8M]
b) Explain the computer hierarchy of computer systems. [7M]
3 a) Design a hardware circuit to implement logical shift, arithmetic shift and [8M]
circular shift operations. State your design specifications.
b) Explain how logic micro operation is work with suitable example? [7M]

Or
4 a) A computer uses a memory unit with 256K words of 32 bits each. A binary [8M]
Instruction code is stored in one word of memory. The instruction has four parts:
an indirect bit, an operation code, a register code part to specify one of 64
registers, and an address part.
(a) How many bits are there in the operation code, the register code part, and the
address part?
(b) How many bits are there in the data and address inputs of the memory?
b) Explain the following with respect to logic micro operations [7M]
i) Selective Set ii) Selective Complement iii) Selective Clear iv) Mask
5 a) What do you mean by addressing mode? Explain the following addressing modes [8M]
with examples.
i) Index addressing mode ii) Relative addressing mode
b) What are different instruction formats we are using? [7M]

Or
6 a) Explain various types of interrupts in detail. [8M]
b) Explain the difference between hardwired control and micro programmed [7M]
control. Is it possible to have a hardwired control associated with a control
memory?
7 a) Explain in detail the different mappings used for cache memory. [8M]
b) Discuss the main features of associative memory Page Table. How does it work [7M]
in mapping the virtual address into Physical memory address?
Or
8 a) Draw the block diagram of a DMA controller and explain its functioning? [8M]
b) Explain about the direct mapping. [7M]
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Code No: R1921056 R19 SET - 3

9 a) Formulate a four segment instruction pipeline for a computer. Specify the [8M]
operation to be performed in each segment.
b) Draw and explain arithmetic pipeline for floating point multiplication. [7M]

Or
10 a) What is pipelining? Name the two pipeline organizations. Explain about the [8M]
arithmetic pipeline with the help of an example.
b) Explain the characteristics of multiprocessor system. [7M]

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Code No: R1921056 R19 SET - 4

II B. Tech I Semester Regular Examinations, March - 2021

COMPUTER ORGANIZATION
(Com to CSE, IT)
Time: 3 hours Max. Marks: 75
Answer any FIVE Questions each Question from each unit
All Questions carry Equal Marks
~~~~~~~~~~~~~~~~~~~~~~~~~
1 a) Draw and explain Von Neumann Architecture. Explain Moore’s Law. [8M]
b) Discuss Arithmetic addition and subtraction with signed-2’s complement [7M]
representation.
Or
2 a) Difference between RISC and CISC architectures. [8M]
b) Explain about Booth’s multiplication algorithm and solve Multiply 9 and 7. [7M]
3 a) Explain the I/O instructions and type of I/O instructions. [8M]
b) Explain the significance of the shift micro operations. [7M]
Or
4 a) Design a hardware circuit to implement logical shift, arithmetic shift and circular [8M]
shift operations. State your design specifications.
b) Explain indirect address mode and how the effective address is calculated in this [7M]
case.
5 a) Write the procedure to mitigate number of bits in micro instructions. [8M]
b) Justify the statement “Stack computer consist of an operation code only with no [7M]
address field”.
Or
6 a) What is a micro-operation of list and explain the four categories of the most [8M]
common micro-operations?
b) What do you mean by addressing mode? Explain the following addressing modes [7M]
with examples.
i) Index addressing mode ii) Relative addressing mode.
7 a) What is cache memory? Explain different types of mapping from main memory to [8M]
cache memory.
b) What is associative memory? Explain with the help of block diagram. Also [7M]
mention the situation in which associative memory can be effective utilized.
Or
8 a) Discuss the main features of associative memory Page Table. How does it work in [8M]
mapping the virtual address into Physical memory address?
b) Explain about Direct Memory Access (DMA). [7M]
9 a) Explain instruction pipeline with neat timing diagram. [8M]
b) Explain about Hypercube and Mesh network. [7M]
Or
10 a) Draw and explain arithmetic pipeline for floating point multiplication. [8M]
b) Explain about Interconnection network. [7M]

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