Untitled
Untitled
You should have received a copy of the GNU General Public License
along with Grbl. If not, see <http://www.gnu.org/licenses/>.
*/
/* The cpu_map.h files serve as a central pin mapping selection file for different
processor types or alternative pin layouts. This version of Grbl supports only
the
Arduino Mega2560. */
#ifndef cpu_map_h
#define cpu_map_h
// Define homing/hard limit switch input pins and limit interrupt vectors.
#define MIN_LIMIT_PORT_0 F
#define MIN_LIMIT_PORT_1 F
#define MIN_LIMIT_PORT_2 K
#define MIN_LIMIT_BIT_0 6 // MEGA2560 Pin A6 - MegaPi P8 pin 1
#define MIN_LIMIT_BIT_1 7 // MEGA2560 Pin A7 - MegaPi P8 pin 2
#define MIN_LIMIT_BIT_2 0 // MEGA2560 Pin A8 - MegaPi P8 pin 3
#define _MIN_LIMIT_BIT(i) MIN_LIMIT_BIT_##i
#define MIN_LIMIT_BIT(i) _MIN_LIMIT_BIT(i)
#define MIN_LIMIT_DDR(i) _DDR(MIN_LIMIT_PORT_##i)
#define MIN_LIMIT_PORT(i) _PORT(MIN_LIMIT_PORT_##i)
#define MIN_LIMIT_PIN(i) _PIN(MIN_LIMIT_PORT_##i)
#define MAX_LIMIT_PORT_0 A
#define MAX_LIMIT_PORT_1 A
#define MAX_LIMIT_PORT_2 A
#define MAX_LIMIT_BIT_0 3 // MEGA2560 Pin D25 - MegaPi P15 pin 7
#define MAX_LIMIT_BIT_1 0 // MEGA2560 Pin D23 - MegaPi P15 pin 9
#define MAX_LIMIT_BIT_2 6 // MEGA2560 Pin D28 - MegaPi P15 pin 4
#define _MAX_LIMIT_BIT(i) MAX_LIMIT_BIT_##i
#define MAX_LIMIT_BIT(i) _MAX_LIMIT_BIT(i)
#define MAX_LIMIT_DDR(i) _DDR(MAX_LIMIT_PORT_##i)
#define MAX_LIMIT_PORT(i) _PORT(MAX_LIMIT_PORT_##i)
#define MAX_LIMIT_PIN(i) _PIN(MAX_LIMIT_PORT_##i)
// Define user-control CONTROLs (cycle start, reset, feed hold) input pins.
// NOTE: All CONTROLs pins must be on the same port and not on a port with other
input pins (limits).
#define CONTROL_DDR DDRK
#define CONTROL_PIN PINK
#define CONTROL_PORT PORTK
#define CONTROL_RESET_BIT 3 // MEGA2560 Analog Pin 11 - MegaPi P8 pin 6
#define CONTROL_FEED_HOLD_BIT 4 // MEGA2560 Analog Pin 12 - MegaPi P8 pin 7
#define CONTROL_CYCLE_START_BIT 5 // MEGA2560 Analog Pin 13 - MegaPi P8 pin 8
#define CONTROL_SAFETY_DOOR_BIT 6 // MEGA2560 Analog Pin 14 - MegaPi P8 pin 9
#define CONTROL_INT PCIE2 // Pin change interrupt enable pin
#define CONTROL_INT_vect PCINT2_vect
#define CONTROL_PCMSK PCMSK2 // Pin change interrupt register
#define CONTROL_MASK ((1<<CONTROL_RESET_BIT)|(1<<CONTROL_FEED_HOLD_BIT)|
(1<<CONTROL_CYCLE_START_BIT)|(1<<CONTROL_SAFETY_DOOR_BIT))
// Advanced Configuration Below You should not need to touch these variables
#define SPINDLE_PWM_MAX_VALUE 255.0 // Timer2 is 8-bit
#ifndef SPINDLE_PWM_MIN_VALUE
#define SPINDLE_PWM_MIN_VALUE 1 // Must be greater than zero.
#endif
#define SPINDLE_PWM_OFF_VALUE 0
#define SPINDLE_PWM_RANGE (SPINDLE_PWM_MAX_VALUE-SPINDLE_PWM_MIN_VALUE)
//rb THIS CHANGED TO A DIFFERENT PIN! OC2A is for D10 (PB4) - using 8-bit timer
Timer2
#define SPINDLE_TCCRA_REGISTER TCCR2A
#define SPINDLE_TCCRB_REGISTER TCCR2B
#define SPINDLE_OCR_REGISTER OCR2A
#define SPINDLE_COMB_BIT COM2A1
// 8-bit Fast PWM mode
#define SPINDLE_TCCRA_INIT_MASK ((1<<WGM20) | (1<<WGM21))
// 1.9kHz
//#define SPINDLE_TCCRB_INIT_MASK ((1<<CS21) | (1<<CS20))
// 7.8kHz
//#define SPINDLE_TCCRB_INIT_MASK (1<<CS21)
// 980Hz
//#define SPINDLE_TCCRB_INIT_MASK (1<<CS22)
// 488 Hz
#define SPINDLE_TCCRB_INIT_MASK ((1<<CS22) | (1<<CS20))
//MLaser uses : 488Hz
//With S25 for weak preview this results in: 491mV input (10% duty cylce) -> output
10.83V
#define SPINDLE_OCRA_REGISTER OCR2A // 8-bit Fast PWM mode requires top reset
value stored here.
#define SPINDLE_OCRA_TOP_VALUE 0xFF // PWM counter reset value. Should be the same
as PWM_MAX_VALUE in hex.
#endif
/*
#ifdef CPU_MAP_CUSTOM_PROC
// For a custom pin map or different processor, copy and edit one of the
available cpu
// map files and modify it to your needs. Make sure the defined name is also
changed in
// the config.h file.
#endif
*/
#endif