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9 Cascode Stages and Current Mirrors - Revised

This document discusses two important circuit building blocks: the cascode stage and current mirrors. The cascode stage is a modified common-emitter or common-source amplifier topology that uses an additional transistor to increase the output impedance without reducing the voltage headroom. This improves the performance of current source loads. Both bipolar and MOSFET cascode circuits are examined. Current mirrors are circuits that generate an output current proportional to a reference current. They are widely used in analog and digital IC design. Various types of current mirrors are analyzed, including bipolar, MOSFET, cascode, and wide-swing current mirrors. The document explores design techniques to maximize output impedance while maintaining sufficient bias voltage head

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229 views38 pages

9 Cascode Stages and Current Mirrors - Revised

This document discusses two important circuit building blocks: the cascode stage and current mirrors. The cascode stage is a modified common-emitter or common-source amplifier topology that uses an additional transistor to increase the output impedance without reducing the voltage headroom. This improves the performance of current source loads. Both bipolar and MOSFET cascode circuits are examined. Current mirrors are circuits that generate an output current proportional to a reference current. They are widely used in analog and digital IC design. Various types of current mirrors are analyzed, including bipolar, MOSFET, cascode, and wide-swing current mirrors. The document explores design techniques to maximize output impedance while maintaining sufficient bias voltage head

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EE303: Introduction to Electronic Circuits

Cascode Stages and Current Mirrors

Prof. Jong-Hyeok Yoon


Department of EECS
Spring 2023
Cascode Stage and Current Mirror

• We are going to discuss two other important building blocks in


microelectronics
• The “cascode” stage: a modified version of CE or CS topologies
• The “current mirror”: a circuit technique that is extensively used in IC design
Cascode as a Current Source

• Recall that the use of current-source loads can increase the voltage
gain of amplifiers
• A single transistors can operate as a current source
• But, its output impedance is limited due to the Early effect (in bipolar devices)
or channel-length modulation (in MOSFETs)
Recall

• Equivalent drain resistance with a degeneration resistor


Recall

• Equivalent source resistance with a resistor at the drain


Bipolar Cascode

• To relax the trade-off btw Rout and the voltage headroom, we can
replace the degeneration resistor with a transistor
• The idea is to introduce a high small-signal resistance (= rO2) while consuming
a headroom independent of the current
• This configuration is called the “cascode” stage
Example: Bipolar Cascode
Maximum Output Impedance

• If rO2 becomes much greater than 𝑟𝜋1 , then Rout1 approaches


MOS Cascodes

• The cascoding can also be realized with MOSFETs to increase the


output impedance of a current source
• The idea is to introduce a high small-signal resistance (= rO2) from X to ground
Example: NMOS Cascode
Bipolar vs. MOS Cascode

• Let’s compare the upper bound of the output impedance


• For bipolar devices, Rout,bip = 𝛽𝑟𝑂1
• For MOSFETs, Rout,MOS = gm1rO1rO2
• Rout,MOS increases with no bound (𝛽 and 𝑟𝜋 are infinite for MOS)
Example: MOS Cascode
Cascode as an Amplifier

• Other than providing a high output impedance, the cascode topology


can serve as a high-gain amplifier
• The output impedance and the gain of amplifiers are closely related
• Gm: the change in the drain current divided by the change in the VGS
Voltage Gain of a Linear Circuit

• A linear circuit can be replaced with its Norton equivalent


• Norton’s theorem states that iout is obtained by shorting the output to gnd and
computing the short-circuit current
• We relate iout to vin by Gm = iout/vin
Bipolar Cascode Amplifier

• The collector load impedance must be maximized to attain the high


voltage gain
• Limit: an ideal current source as the load
• The small-signal current gm1vin flows through r01 (vout = -gm1vinr01)
• Now, suppose we stack a transistor on top of Q1
Bipolar Cascode Amplifier

• Recall that the short-circuit transconductance is equal to iout/vin


• A collector current gm1vin flows through Q2
• The base and collector voltages of Q2 are equal (can be viewed as a diode-
connected device); its impedance is (1/gm2)||r02
Bipolar Cascode Amplifier

• In previous topology assumes an ideal current source as the load


• It introduces an impedance of only r03, dropping Rout
• Then, how can we realize the load current source to maintain a high gain?
CMOS Cascode Amplifier

• The analysis can be extended to the CMOS counterpart as well


• With the ideal current-source load, this stage provides a short-circuit
transconductance Gm = gm1 (if 1/gm2 << r01)
• As in bipolar case, the MOS cascode amplifier must incorporate a cascode
PMOS current source so as to maintain a high voltage gain
Example: Cascode Amplifier
Current Mirrors

• The biasing is related to ambient temperature variations


• What happens if the temperature varies for bipolar amplifier?
• LHS remains constant even with the variation in R1/R2
Current Mirrors

• There is a design method involving several tens of devices to provide


more robust current
• It is called the “bandgap reference circuit” and out of the scope of this course
• We cannot use this reference current source as the load impedance of all CE
or CS stages (complexity becomes prohibitive)
Bipolar Current Mirror

• The current mirror resembles the topology shown in (a)


• Q1 operates in the active region and the black box guarantees Icopy = IREF
• The black box should generate an output voltage VX (= VBE), such that Q1
carries a current equal to IREF
Example: Bipolar Current Mirror
Example: Bipolar Current Mirror

While Q1 carries a finite current, the biasing of Q1 is no different


from the resistive divider case, i.e.,
Additional Copies of IREF

• How can we make additional copies or different values of these


copies?
• The left shows how we can design a circuit to copy multiple current sources
(no need to duplicate IREF and QREF)
• If IS,j is chosen to be n times IS,REF, then Icopy,j = nIREF
Fractions of IREF

• This is accomplished by realizing QREF itself as multiple parallel


transistors
• The idea is to begin with a larger IS,REF (= 3IS here) so that a unit transistor, Q1,
can generate a smaller current
Effect of Base Current

• So far, we neglected the base current drawn from node X


• This may lead to a significant error as the number of copies increases
• The fraction of IREF flows through the bases rather than through the collector
of QREF
• QREF and Q1 still have equal VBE and hence carry currents with a ratio of n
Effect of Base Current

• To suppress error, the bipolar current mirror can be modified as below


• The emitter follower QF is interposed btw the collector of QREF and node X,
thereby reducing the effect of the base currents by a factor of β
• Assume that IC,F = IE,F, we repeat the analysis by using a KCL at X
PNP Mirrors

• Consider the common-emitter stage, where a current source serves


as a load to achieve a high voltage gain
• The current source is realized by a pnp transistor operating in active region
• We must therefore define the bias current of Q2 properly
• This is done by forming the pnp current mirror as shown below
MOS Current Mirror

• The analysis so far can be easily extended to MOS current mirrors


• We recognize the black box must generate VX such that

• The black box must satisfy the following input/output characteristic:


Example: MOS Current Mirror
Example: MOS Current Mirror

VDD

RREF
Icopy=2mA

(W/L)1 (W/L)2
Example: MOS Current Mirror

(W L )1
I REF = 2mA 
VDD (W L )2
VGS 1 = VDD − I REF RREF
RREF
1
= n Cox (W L )1 (VGS 1 − VTH )
2
Icopy=2mA I REF
2
1
= n Cox (W L )1 (VDD − I REF RREF − VTH )
2
(W/L)1 (W/L)2 2
Recall: Ideal characteristics of the current source

• Output impedance of the current source


• Ideal current source has infinite output impedance

Ro = ro 2
➔
VO .min = VGS − VTH
Cascode MOS current mirror

• Trade-off between the output impedance and the voltage headroom


• Cascode current mirror achieves high output impedance. However…

Ro g m 3ro 3ro 2
VO .min = 2VGS − VTH
Wide-swing current mirror

• Higher output impedance with a lower bias voltage for the saturation

VOV =  = VGS − VTH Ro g m 3ro 3ro1


VO .min = 2VGS − 2VTH
Ro g m 3ro 3ro1 = 2
= VGS 2
VO .min = 2VGS − VTH 
VBIAS − VGS 3
= 2 + VTH
= VGS 4 +  2 = VGS 4 − VGS 3 +  2
  =
Biasing in the wide-swing current mirror

• Higher output impedance with a lower bias voltage for the saturation
2ID I REF = I 2 = I 3 = I 5 = I bias
 = VGS − VTH =
n Cox (W L )  REF =  2 =  3
 5 = ( n + 1)  REF
1 =  4 = n REF
VG 5 = VG 4 = VG1 = ( n + 1)  REF + VTH
VDS 2 = VDS 3 = VG 5 − VGS 1
= VG 5 − ( n REF + VTH ) =  REF
VO .min =  2 + 1 =  REF + n REF
( If n = 1  VO.min = 2 )
Questions?

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