ECCE4227: Embedded Systems

Chapter 10

Interrupts
 Contents
■ Upon completion of this chapter you will be able to:
Compare polling vs. interrupts.
Explain the purpose of Interrupt Service Routine (ISR).
Understand the role of Interrupt Vector Table (IVT).
List major interrupts of AVR.
Describe the external hardware interrupts of the AVR.
Program AVR external interrupts in C.
Program AVR Timers using interrupts.

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Polling vs. Interrupt

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 Polling vs. Interrupt
■ Using polling,
■ the CPU must continually check the device’s status.

■ Using interrupt:
■ A device will send an interrupt signal when

needed.
■ In response, the CPU will execute an interrupt

service routine (ISR),

■ Then, the CPU resumes its normal execution.

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 Polling vs. Interrupt

■ How an interrupt is serviced?

1. Stop fetching the next instruction and save PC
2. Find the address of the ISR of the interrupting
device (using Interrupt Vector Table IVT)
3. Execute the function
4. Resume normal execution by retrieving PC

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 Polling Vs. Interrupt
■ Polling ■ Interrupt
■ Ties down the CPU ■ Efficient CPU use
■ Has priority
■ Can be masked

while (true) main( )

{ {
if(PIND.2 == 0) Do your common task
//do something; }
} whenever PIND.2 is 0 then
do something

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 Interrupt Sources
■ Microcontroller has various on-chip peripheral
devices (interrupt sources) that can interrupt the
main program:
■ external switches
■ timers,
■ serial port,
■ PWM, and
■ ADC.

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 Interrupt Controllers

Peripherals
Timers
IRQ 0
CPU IRQ 1 I/Os
Interrupt IRQ 2
Controller IRQ 3 USART

….
IRQn SPI

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Interrupt control unit in AVR

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 Interrupt Service Routine (ISR)
■ ISR: Interrupt Service Routine
■ The function that is executed when an

interrupt is enabled

■ IVT: Interrupt Vector Table

■ A table that keeps the address of each ISR in
the instruction memory

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Interrupt Vector Table (IVT)
Highest
priority

Lowest
priority

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 Interrupt Vector Table (IVT)
■ Vector Number
■ An interrupt with a lower ‘Vector No.’ has a higher
priority.
■ E.g., INT0 has a higher priority than INT1.

■ Program Address
■ The fixed memory location for a given interrupt
handler.

■ Interrupt Vector Name

■ This is the interrupt name, to be used with C macro
ISR().
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 Enabling Interrupt
■ Interrupts can be enabled or disabled by
programmer

■ Enabled Bit7 (I=1) in SREG (status register)

■ Disabled on reset (I=0)

■ In addition to Bit7 (I) in SREG each interrupt

should be enabled independently

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 Enabling Interrupt
■ Interrupt Enable, Flag bits
■ Each interrupt source has an ENABLE bit that

allows an interrupt to be generated if interrupt

condition is met. By default, interrupts are
NOT enabled.
■ Each interrupt source also has a FLAG bit that

indicates if the interrupt has occurred.

■ Each interrupt source also has a PRIORITY bit

that allows it to be assigned a low or high

priority.

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 Interrupt Priority
■ What if two or more interrupts occur at the same
time?
■ The interrupt with lower ISR address is

prioritized (external INT0 has the highest

priority)

■ When an interrupt is serviced, the ENABLE bit

becomes automatically 0 to disable that interrupt
■ Will be enabled when returning from the ISR

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 How to Program Interrupt
■ To program an interrupt, 5 steps are required:
1. Include header file <avr/interrupt.h>.
2. Use C macro ISR() to define the interrupt
handler and update IVT.
3. Enable the specific interrupt.
4. Configure details of the interrupt by setting
relevant registers.
5. Enable the interrupt subsystem globally using
sei().

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 How to Program Interrupt
■ The C macro ISR() is used to define the handler
for a given interrupt.
■ Its syntax is given as:

ISR(interrupt_vector_name){
// … body of ISR

■ where interrupt_vector_name is given in IVT.

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External Interrupts

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Slide-19
ECCE4227-FL16

External Interrupt

■ Two external interrupts

can be triggered
■ INT0,
■ INT1

■ Key steps in using external interrupts:

■ enable the interrupt,
■ specify what types of event will trigger the interrupt.

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 External Interrupts
■ Interrupts can be edge triggered or level triggered
■ Edge trigger:
■ activated when a change in

signal level occurs

■ Level trigger:
■ activated when a signal has

a specific value

■ INT0 and INT1 can be programmed to be edge or

level triggered
■ Low-level active by default

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 External Interrupt in AVR
■ Specify the events that trigger an external interrupt
by using:
■ MCU Control Register (MCUCR) (INT0 and INT1).

01 00

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 External Interrupt
■ To enable an external interrupt, set a flag in General Interrupt
Control Register (GICR).

■ Example:
■ To enable INT1 on pin D.3, we can write

■ GICR |= (1 << INT1);

■ To enable both INT1 and INT0 sources, we can write
■ GICR |= (1 << INT1)| (1 << INT0);

■ Note that INT1, INT0, and GICR names are already defined in
<avr/io.h> using ‘#define INT1 7’ and ‘#define INT0 6’

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 Example 1
■ Write a C program to toggle port B whenever a switch is
pressed. (The program should use an external interrupt).
■ Let’s use interrupt INT1. This interrupt is triggered on pin

PD.3.
■ To enable interrupt INT1:

■ GICR |= (1 << INT1);

■ To specify that INT1 is triggered on any change in pin

PD.3:
■ MCUCR |= (1 << ISC10); #define ISC10 3

■ Then, we write interrupt handler and enable interrupt

subsystem.

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C program Example 1

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 Example 2
■ Assume that the INT0 pin is connected to a switch that is normally
high. Write a program that toggles PORTB.5, whenever INT0 pin
goes low.
#include <avr/io.h>
#include <avr/interrupt.h>
int main ()
{
DDRB = 1<<5; //PB5 as an output
MCUCR = 0x2; //make INT0 falling edge triggered

GICR |= (1<<INT0); //enable external interrupt 0

sei (); //enable interrupts

while (1); //wait here

}

ISR (INT0_vect) //ISR for external interrupt 0

{
PORTB ^= (1<<5); //toggle PORTB.5
}

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 Example 3
■ Consider a switch connected
to the external interrupt pin
INT0 of an ATMega8 AVR as
shown in figure
■ A 7-segment display with
decoder is connected to
port PB0-PB3 on the same
AVR.

◆ We require that a program waits for the switch to be pressed

to start an ISR.
◆ In the ISR, it simply increments the number displayed on the
7-segment display

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 C program Example 3
#include <avr/io.h>
#include <avr/interrupt.h>

Char Count = 0 // global variable

int main ()
{
DDRB =0x0F; //PB0-PB3 as an output
MCUCR = 0x2; //make INT0 falling edge triggered
GICR |= (1<<INT0); //enable external interrupt 0
sei (); //enable interrupts

while (1); //wait here

}

ISR (INT0_vect) //ISR for external interrupt 0

{
count++;
if (count==10) count =0;
PORTB = count; //Display count on toggle PORTB
}

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Timer Interrupts

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 Timer Interrupt Registers
■ Timer Interrupt Registers (Mask and Flag Registers) are
Common to all Timers (0,1,2)
■ Timer/Counter Interrupt Mask TIMSK Register
■ Bit 2 – TOIE1 – Timer/Counter1 Overflow Interrupt Enable

■ Timer/Counter Interrupt Flag TIFR Register

■ Bit 0 – TOV0 – Timer/Counter1 Overflow FLAG

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 Using Timer0 overflow interrupt
■ This program uses Timer0 to generate a square
wave with a period of 10 µs on pin PORTB.5, while
at the same time data is being transferred from
PORTC to PORTD. Assuming that XTAL = 10 MHz

206 ; 5

206 ;

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 Timer2 Compare Match Interrupt
■ Using Timer2 and CTC mode write a program that toggles pin
PORTB.5 every 100 μs, while at the same time transferring data
from PORTC to PORTD. Assume XTAL = 1 MHz.

#include <avr/io.h>
#include <avr/interrupt.h>
int main () {
DDRB |= (1<<5);//make DDRB.5 output

OCR2 = 99;
TCCR2 = 0x09; //CTC mode, internal clk, no prescaler
TIMSK = (1<<OCIE2); //enable Timer 2 compare match int.
sei (); //enable interrupts

DDRC = 0x00; //make PORTC input

DDRD = 0xFF; //make PORTD output
while (1) //wait here
PORTD = PINC;
}
ISR (TIMER2_COMP_vect) { //ISR for Timer2 compare match A
PORTB ^= (1<<5); //toggle PORTB.5
}
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 RECOMMENDED PROBLEMS
PROBLEMS HIGHLIGHTED IN RED HAVE HIGHER PRIORITY

CHAPTER-10 [Interrupts]
 
Problems:
S10.1 (1, 2, 4, 5, 6, 9, 12, 14, 16, 17, 25, 26) S10.2 (22, 24, 29) S10.3
(31, 32, 35, 37, 42, 45, 46).

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