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SN 75 Als 181

Sn75als181

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0% found this document useful (0 votes)
46 views20 pages

SN 75 Als 181

Sn75als181

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lucky culture
Copyright
© © All Rights Reserved
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SN75ALS181

SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022

SN75ALS181 Differential Driver and Receiver Pair

1 Features 2 Description
• Meets TIA/EIA-422-B, TIA/EIA-485-A, and CCITT The SN75ALS181 is a differential driver and receiver
recommendations V.11 and X.27 pair designed for bidirectional data communication
• Low supply-current requirements... on multipoint bus transmission lines. The design
30 mA max provides for balanced transmission lines and meets
• Driver output capacity...±60 mA TIA/EIA-422-B and TIA/EIA-485-A, and CCITT
• Thermal shutdown protection recommendations V.10, V.11, X.26, and X.27.
• Driver common-mode output voltage range of –7 V
The SN75ALS181 combines a 3-state differential
to 12 V
line driver and a differential-input line receiver that
• Receiver input impedance: 12 kΩ min
operate from a single 5-V power supply. The
• Receiver input sensitivity: ±200 mV
driver and receiver have active-high and active-low
• Receiver input hysteresis: 60 mV typ
enables, respectively, that can be connected together
• Receiver common-mode input voltage range of
externally to function as a direction control. The driver
±12 V
differential outputs and the receiver differential inputs
• Operates from single 5-V supply
are connected to separate pins for greater flexibility
• Glitch-free power-up and power-down protection
and are designed to offer minimum loading to the bus
when the driver is disabled or VCC = 0. These ports
feature wide positive and negative common-mode
voltage changes, making the device suitable for party-
line applications.
Device Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
N (PDIP) 14-pins 19.3 mm x 6.35 mm
SN75ALS181
NS (SO) 14-pins 10.3 mm x 5.3 mm

(1) For all available packages, see the orderable addendum at


the end of the data sheet.

Logic Diagram (Positive Logic)

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN75ALS181
SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022 www.ti.com

Table of Contents
1 Features............................................................................1 5.7 Switching Characteristics: Receiver............................6
2 Description.......................................................................1 Parameter Measurement Information............................... 7
3 Revision History.............................................................. 2 6 Detailed Description......................................................10
4 Pin Configuration and Functions...................................3 6.1 Device Functional Modes..........................................10
5 Specifications.................................................................. 4 7 Device and Documentation Support............................12
5.1 Absolute Maximum Ratings........................................ 4 7.1 Receiving Notification of Documentation Updates....12
5.2 Thermal Information....................................................4 7.2 Support Resources................................................... 12
5.3 Recommended Operating Conditions.........................4 7.3 Trademarks............................................................... 12
5.4 Electrical Characteristics: Driver................................. 5 7.4 Electrostatic Discharge Caution................................12
5.5 Switching Characteristics: Driver................................ 5 7.5 Glossary....................................................................12
5.6 Electrical Characteristics: Receiver............................ 6

3 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision D (August 2013) to Revision E (October 2022) Page


• Added the Pin Configuration and Functions ...................................................................................................... 3
• Deleted the Package thermal impedance from the Absolute Maximum Ratings ...............................................4
• Added the Thermal Information table................................................................................................................. 4
• Added the Detailed Description section............................................................................................................10

Changes from Revision C (May 2010) to Revision D (August 2013) Page


• Fixed typographical error in MAX value for Δ|VOD|. ........................................................................................... 5
• Fixed typographical error in UNITS for Δ|VOC|....................................................................................................5
• Removed Ordering Information table................................................................................................................10
• Fixed graphical error in schematic....................................................................................................................10

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SN75ALS181
www.ti.com SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022

4 Pin Configuration and Functions

N.C. – No internal connection

Figure 4-1. N OR NS Package


(Top View)

Table 4-1. Pin Functions


PIN
TYPE DESCRIPTION
NAME NO.
NC 1, 8 No Connect Not electrically connected
R 2 Digital Output Logic output RS485 data
RE 3 Digital Input Receiver enable, active low
DE 4 Digital Input Driver enable, active high
D 5 Digital Input Driver data input
GND 6, 7 Ground Device ground
Y 9 Bus Output Bus Output Y (Complementary to Z)
Z 10 Bus Output Bus Output Z (Complementary to Y)
B 11 Bus Input Bus Input B (Complementary to A)
A 12 Bus Input Bus Input A (Complementary to B)
VCC 13, 14 Power 5 V Supply

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SN75ALS181
SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022 www.ti.com

5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) see (1)
MIN MAX UNIT
VCC Supply voltage range(2) 7 V
Input voltage range D, DE, and RE inputs 7 V
Output voltage range Driver –9 14 V
Input voltage range Receiver –14 14 V
Receiver differential input voltage range(3) –14 14 V
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C
Tstg Storage temperature range –65 150 °C

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential input voltage, are with respect to network ground terminal.
(3) Differential input voltage is measured at the non-inverting terminal with respect to the inverting terminal.

5.2 Thermal Information


N (PDIP) NS (SO)
THERMAL METRIC(1) UNIT
14-Pins 14-Pins
R θJA Junction-to-ambient thermal resistance 54.2 88.6 °C/W

R θJB Junction-to-board thermal resistance 41.6 49.12 °C/W

ψ JT Junction-to-top characterization parameter 34.0 14.17 °C/W

ψ JB Junction-to-board characterization parameter 21.1 48.6 °C/W

R θJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.

5.3 Recommended Operating Conditions


MIN NOM MAX UNIT
VCC Supply voltage 4.75 5 5.25 V
VOC Common-mode output voltage(1) Driver –7 12 V
VIC Common-mode input voltage(1) Receiver –12 12 V
VIH High-level input voltage D, DE, and RE 2 V
VIL Low-level input voltage D, DE, and RE 0.8 V
VID Differential input voltage ±12 V
Driver –60 mA
IOH High-level output current
Receiver –400 µA
Driver 60
IOL Low-level output current mA
Receiver 8
TA Operating free-air temperature 0 70 °C

(1) The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this table for common-
mode output voltage level only.

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SN75ALS181
www.ti.com SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022

5.4 Electrical Characteristics: Driver


over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIK Input clamp voltage II = –18 mA –1.5 V
VO Output voltage IO = 0 0 6 V
|VOD1| Differential output voltage IO = 0 1.5 6 V

VCC = 5 V , 1/2 VOD1


|VOD2| Differential output voltage RL = 100 Ω See Figure 6-1 2 V
RL = 54 Ω 1.5 2.3 5
|VOD3| Differential output voltage Vtest = –7 V to 12 V, See Figure 6-2 1.5 5 V
Change in magnitude of differential output
Δ|VOD| RL = 54 Ω or 100 Ω, See Figure 6-1 ±0.2 V
voltage
3
VOC Common mode output voltage RL = 54 Ω or 100 Ω, See Figure 6-1 V
–1
Change in magnitude of common-mode
Δ|VOC| RL = 54 Ω or 100 Ω, See Figure 6-1 ±0.2 V
output voltage(2)
IOZ High-impedance-state output current VO = –7 V to 12 V(3) ±100 µA
IIH High-level input current VIH = 2.4 V 20 µA
IIL Low-level input current VIL = 0.4 V –100 µA
VO = –7 V –250
VO = VCC 250
IOS Short circuit output current mA
VO = 12 V 250
VO = 0 V –150
Outputs enabled 21 30
ICC Supply current (total package) No load mA
Outputs disabled 14 21

(1) All typical values are at VCC = 5 V and TA = 25°C.


(2) Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level
to a low level.
(3) This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions

5.5 Switching Characteristics: Driver


over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
Differential output delay time, tdDH
tdD RL = 54 Ω , CL = 50 pF, See Figure 6-3 9 13 20 ns
or tdDL
tsk(p) Pulse skew (|tdDH – tdDL|) RL = 54 Ω , CL = 50 pF, See Figure 6-3 1 8 ns
tt Differential output transition time RL = 54 Ω , CL = 50 pF, See Figure 6-3 3 10 16 ns
tPZH Output enable time to high level RL = 110 Ω , See Figure 6-4 36 53 ns
tPZL Output enable time to low level RL = 110 Ω , See Figure 6-5 39 56 ns
tPHZ Output disable time from high level RL = 110 Ω , See Figure 6-4 20 31 ns
tPLZ Output disable time from low level RL = 110 Ω , See Figure 6-5 9 20 ns

(1) All typical values are at VCC = 5 V and TA = 25°C.

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SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022 www.ti.com

5.6 Electrical Characteristics: Receiver


over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
Positive-going threshold voltage,
VT+ VO = 2.7 V, IO = –0.4 mA 0.2 V
differential input
Negative-going threshold voltage,
VT– VO = 0.5 V, IO = 8 mA –0.2 V
differential input
Vhys Input hysteresis (VT+ – VT–) 60 mV
VIK Input clamp voltage, RE II = –18 mA –1.5 V
VOH High-level output voltage VID = 200 mV, IOH = –400 μA, See Figure 6-6 2.7 V
VOL Low-level output voltage VID = 200 mV, IOL = 8 mA, See Figure 6-6 0.45 V
IOZ High-impedance-state output current VO = 0.4 V to 2.4 V ±20 µA

Other input at 0 VI = 12 V 1
II Line input current mA
V(2), VI = –7 V –0.8
IIH High-level input current, RE VIH = 2.7 V 20 µA
IIL Low-level input current, RE VIL = –7 V –100 µA
RI Input resistance 12 kΩ
IOS Short circuit output current VID = 200 mV, VO = 0 V –15 –85 mA
Outputs
21 30
enabled
ICC Supply current (total package) No load mA
Outputs
14 21
disabled

(1) All typical values are at VCC = 5 V and TA = 25°C.


(2) This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions

5.7 Switching Characteristics: Receiver


over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
tPHL Differential output delay time, tdDH or tdDL VID = –1.5 V to 1.5 V 10 16 25 ns
Propagation delay time, low- to high-level
tPLH VID = –1.5 V to 1.5 V 10 16 25 ns
output
tsk(p) Pulse skew (|tdDH – tdDL|) VID = –1.5 V to 1.5 V 1 8 ns
tPZH Output enable time to high level 7 15 ns
tPZL Output enable time to low level 9 19 ns
tPHZ Output disable time from high level 18 27 ns
tPLZ Output disable time from low level 10 15 ns

(1) All typical values are at VCC = 5 V and TA = 25°C.

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SN75ALS181
www.ti.com SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022

Parameter Measurement Information

Figure 6-1. Driver Test Circuit, VOD and VOC

Figure 6-2. Driver Circuit, VOD3

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
B. CL includes probe and jig capacitance.

Figure 6-3. Driver Differential-Output Delay and Transition Times

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
B. CL includes probe and jig capacitance.

Figure 6-4. Driver Enable and Disable Times

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SN75ALS181
SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022 www.ti.com

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
B. CL includes probe and jig capacitance.

Figure 6-5. Driver Enable and Disable Times

Figure 6-6. Receiver, VOH and VOL

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
B. CL includes probe and jig capacitance.

Figure 6-7. Receiver Propagation-Delay Times

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SN75ALS181
www.ti.com SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO =
50 Ω
B. CL includes probe and jig capacitance.

Figure 6-8. Receiver Output Enable and Disable Times

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SN75ALS181
SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022 www.ti.com

6 Detailed Description
6.1 Device Functional Modes

6.1.1 Function Tables


Each Driver
INPUTS ENABLE OUTPUTS
D DE
Y Z
H H H L
L H L H
X L Z Z

Each Receiver(1)
DIFFERENTIAL ENABLE OUTPUT
A–B RE R
VID ≥ 0.2 V L H
–0.2 V < VID < 0.2 V L ?
VID ≤ –0.2 V L L
X H Z

(1) H = high level, L = low level, ? = indeterminate, X = irrelevant,


Z = high impedance (off)

6.1.2 Schematics

W W

W
W

Figure 6-1. SCHEMATICS OF INPUTS

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SN75ALS181
www.ti.com SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022

Figure 6-2. SCHEMATICS OF OUTPUTS

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Product Folder Links: SN75ALS181
SN75ALS181
SLLS152E – DECEMBER 1992 – REVISED OCTOBER 2022 www.ti.com

7 Device and Documentation Support


TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
7.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
7.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
7.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
7.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

7.5 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

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PACKAGE OPTION ADDENDUM

www.ti.com 29-Apr-2022

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

SN75ALS181N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN75ALS181N

SN75ALS181NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75ALS181

SN75ALS181NSRG4 ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 75ALS181

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 29-Apr-2022

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 29-Apr-2022

TAPE AND REEL INFORMATION

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN75ALS181NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com 29-Apr-2022

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75ALS181NSR SO NS 14 2000 367.0 367.0 38.0

Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 29-Apr-2022

TUBE

*All dimensions are nominal


Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
SN75ALS181N N PDIP 14 25 506 13.97 11230 4.32

Pack Materials-Page 3
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