Chapter 9 - Error Detection and Correction
Chapter 9 - Error Detection and Correction
Errors
Single-bit Burst
Chapter 9: Error Detection and Correction
Detection 1/21
• Redundancy
Data
101000000001010101010
Accept
Checking Generating
function function
Reject
1011101
Redundancy check
Receiver Data & redundancy check Sender
101000000001010101010 1011101
Chapter 9: Error Detection and Correction
Detection 2/21
• There are four types of redundancy
checks used in data communications
Detection methods
Detection 3/21
Detection 4/21
• VRC (Vertical Redundancy Check)
Even-parity circuit
Chapter 9: Error Detection and Correction
Detection 5/21
• VRC ( vertical redundancy check)
Parity checking circuit
Chapter 9: Error Detection and Correction
Detection 6/21
P (for even) = 1
• VRC P (for odd) = 0
7 data Checking R = k/n / 7/8
( Vertical bits bit
Redundancy
Check)
P (for P (for
even) odd)
Chapter 9: Error Detection and Correction
Detection 7/21
Detection 8/21
• LRC (longitudinal redundancy check)
Generate LRC Original data
11100111 11011101 00111001 10101001
11100111
11011101
00111001
10101001
Hình 7 LRC 10101010
Detection 9/21
• LRC (longitudinal redundancy check)
LRC Checking
Received data
11100111 11011101 00111001 10101001 10101010
11100111
11011101
00111001
10101001
10101010
LRC at 00000000
the
receiver
Correct data
Chapter 9: Error Detection and Correction
Detection 10/21
• LRC (longitudinal redundancy check)
LRC Checking
Received data has
2 damaged bits
00100111 11011101 00111001 10101001 10101010
Row VRC
00100111 0
11011101 0
00111001 0
10101001 0
10101010 0
VRC at
11000000
the
receiver
Error !!
Chapter 9: Error Detection and Correction
Detection 11/21
• LRC (longitudinal redundancy check)
LRC Checking
Received data has
1 damaged bit
01100111 11011101 00111001 10101001 10101010
Row VRC
01100111 1
11011101 0
00111001 0
10101001 0
10101010 0
VRC at
10000000
the
receiver
Error!!
Detect position
of error
Chapter 9: Error Detection and Correction
Detection 12/21
• LRC (longitudinal redundancy check)
LRC Checking
Received data has
2 damaged bits
01100111 01011101 00111001 10101001 10101010
01100111
01011101
00111001
10101001
LRC at 10101010
the 00000000
receiver
Error!!
Can’t detect
position of error
Chapter 9: Error Detection and Correction
Detection 13/21
Detection 14/21
Detection 15/21
• CRC (cyclic redundancy check)
- Step to find CRC
+ Step 1: Append n 0s bit to the data unit.
The number n is one less than the (n+1) bits of
the divisor.
+ Step 2: This newly data unit is divided by
the divisor using binary division. The remainder
is the CRC.
+ Step 3: Replace n 0s bit by CRC (from step
2). Note that the CRC may consist of all 0s.
Chapter 9: Error Detection and Correction
Detection 16/21
• CRC (cyclic redundancy check)
- CRC Generator
1 0 0 1 0 0 0
0000
0 : 1 0 1 1 = 1 1 1 1 0 1 Data plus extra zeros. The
number of zeros is one
Quotient less than the number of
bits in the divisor
Divisor
1 1 1 1 0 1
1 1 0 1 1 0 0 1 0 0 0 0 0
1 1 0 1
1 0 0 0
1 1 0 1
1 0 1 0
Hình 9
1 1 0 1
1 1 1 0
1 1 0 1
0 0 1
Remainder
Chapter 9: Error Detection and Correction
Detection 17/21
• CRC (cyclic redundancy check)
- CRC Checker Quotient
Divisor Data plus CRC received
1 1 1 1 0 1
1 1 0 1 1 0 0 1 0 0 0 0 1
1 1 0 1
1 0 0 0
1 1 0 1
1 0 1 0
Hình 10
1 1 0 1
1 1 1 0
1 1 0 1
0 0 0
Result
Chapter 9: Error Detection and Correction
Detection 18/21
Detection 19/21
• Checksum
Checksum Generator
- The checksum generator subdivides the
data unit into equal segments of n bits
(usually 8, 16)
- These segments are added together.
- Complement the result.
- That total is then appended to the end of
the original data unit
Chapter 9: Error Detection and Correction
Detection 20/21
• Checksum
Checksum Checker
- The receiver subdivides the data unit into
equal segments of n bits (same as the
generator) and adds all segments together
and complements the result.
- These segments are added together.
- Complement the result.
- If the result is 0s, the data is accepted,
otherwise, they are rejected
Chapter 9: Error Detection and Correction
Detection 21/21
• Checksum
Checksum detects all errors involving an
odd number of bits, as well as most errors
involving an even number of bits. However, if
one or more of bits of a segment are
damaged and the corresponding bit or bits
of opposite value in a second segment are
also damaged, the sums of those columns
will not change and the receiver will not
detect a problem.
Chapter 9: Error Detection and Correction