Rice Tiadc
Rice Tiadc
Volume 1125
Series Editor
Janusz Kacprzyk, Systems Research Institute, Polish Academy of Sciences,
Warsaw, Poland
Advisory Editors
Nikhil R. Pal, Indian Statistical Institute, Kolkata, India
Rafael Bello Perez, Faculty of Mathematics, Physics and Computing,
Universidad Central de Las Villas, Santa Clara, Cuba
Emilio S. Corchado, University of Salamanca, Salamanca, Spain
Hani Hagras, School of Computer Science and Electronic Engineering,
University of Essex, Colchester, UK
László T. Kóczy, Department of Automation, Széchenyi István University,
Gyor, Hungary
Vladik Kreinovich, Department of Computer Science, University of Texas
at El Paso, El Paso, TX, USA
Chin-Teng Lin, Department of Electrical Engineering, National Chiao
Tung University, Hsinchu, Taiwan
Jie Lu, Faculty of Engineering and Information Technology,
University of Technology Sydney, Sydney, NSW, Australia
Patricia Melin, Graduate Program of Computer Science, Tijuana Institute
of Technology, Tijuana, Mexico
Nadia Nedjah, Department of Electronics Engineering, University of Rio de Janeiro,
Rio de Janeiro, Brazil
Ngoc Thanh Nguyen , Faculty of Computer Science and Management,
Wrocław University of Technology, Wrocław, Poland
Jun Wang, Department of Mechanical and Automation Engineering,
The Chinese University of Hong Kong, Shatin, Hong Kong
The series “Advances in Intelligent Systems and Computing” contains publications
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Contents
vii
viii Contents
Systolic FIR Filter with Reduced Complexity SQRT CSLA Adder . . . 427
M. Gnanasekaran and J. Balamurugan
Design of Digital FIR Filters for Low Power Applications . . . . . . . . . . 433
Gunasekaran and G. P. Ramesh
Reduced Frequency and Area Efficient for Streaming Applications
Using Clock Gating and BUFGCE Technology . . . . . . . . . . . . . . . . . . 441
N. Lavanya, B. Harikrishna and K. Kalpana
Survey on Modular Multilevel Inverter Based on Various Switching
Modules for Harmonic Elimination . . . . . . . . . . . . . . . . . . . . . . . . . . . 451
Varaparla Hari Babu and K. Balaji
ANFIS-Based MPPT Control in Current-Fed Inverter for AC Load
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 459
Shaik Mohammad Irshad and G. P. Ramesh
Dynamic Load Balancing Using Restoration Theory-Based Queuing
Model for Distributed Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471
P. Sheeba Ranjini and T. Hemamalini
Design of Tree-Based MAC for High-Speed Applications . . . . . . . . . . . 483
Joseph Prabhakar Williams, M. Madan and Narendra Prasad
A Survey of Workload Management Difficulties in the Public
Cloud . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 491
K. Baskar, G. K. D. Prasanna Venkatesan and S. Sangeetha
A Review on Multiple Approaches to Medical Image
Retrieval System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 501
Lakshmi R. Nair, Kamalraj Subramaniam
and G. K. D. Prasannavenkatesan
Efficient FPGA-Based Design for Detecting Cardiac Dysrhythmias . . . 511
S. Kripa and J. Jebastine
Light Fidelity System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521
N. Noor Alleema, Aadil Khatri, Ankur Gupta and Devika Senapatil
Link Quality and Energy-Aware Metric-Based Routing Strategy
in WSNS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 533
Vijayabaskar and T. Kumanan
Genetic Algorithm-Based PCA Classification for Imbalanced
Dataset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541
Mylam Chinnappan Babu and Sangaralingam Pushpa
Radix-2/4 FFT Multiplierless Architecture Using MBSLS in OFDM
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 553
G. Manikandan and M. Anand
xii Contents
1 Introduction
the calibration time. Moreover, they are not suitable for CMOS technology. Thanks to
the sinking of CMOS technology, all-digital calibration is currently being developed
[5–10]. The authors focused on calibration gain and timing mismatches but not
adjusting the offset one. Different from [5–8], this paper proposes a sequential all-
digital background calibration technique for three deviations: gain, offset, and timing
skew errors to further enhance the calibration efficiency in TIADC with M channels.
First, we calibrate offset mismatch by averaging the samples output of sub-ADC and
then correct gain by calculating the power ratio of the sub-ADC with the reference
ADC. Finally, timing skew is calibrated by using Hadamard transform and LMS
algorithm as in [7].
The simulation results of the proposed technique show that the calibration time
is shorter and the performance is higher than the previous techniques. The proposed
technique uses only an FIR filter with a fixed coefficient and does not require a
look-up table, thus significantly improves hardware resources.
This paper is organized as follows. Section 2 introduces the time-interleaved
converter model with channel mismatches encompassing offset, gain, and timing
skew errors. The proposed technique is described in Sect. 3. Section 4 discusses the
simulation results of the proposed technique in Sect. 3. Finally, the conclusion is
carried out in Sect. 5.
2 System Model
Consider the TIADC M channel, which includes the three mismatches (offset oi , gain
gi , and timing errors ti , i = 0, 1, . . . , M − 1) shown in Fig. 1. Without considering
the quantization effects, each channel ADC digital output can be expressed as
(nM+0)T - t0
o0 g0
ADC0
gi (nM+i)T - ti
Analog input oi Digital output
x(t) ADCi MUX y[n]
fs=1/T
(nM+(M-1))T - tM-1
oM-1 gM-1
ADCM-1
TIADC
Fig. 1 Model of TIADC with channel mismatches (offset, gain, and timing skew errors)
Sequential All-Digital Background Calibration … 1083
Assume that the input signal has bandlimited such that X ( j ) = 0, with || ≥
B and B ≤ Tπs , then the TIADC output including the errors: offset, gain, timing
mismatches is expressed as
+∞
M−1
jω 1 1 ωs 2π
ωs
Y e = gi e− j (ω−k M )ti .e jki M j ω−k
T k=−∞ M i=0 M
+∞ M−1
1 1 2π ωs
+ oi e jki M δ ω − k . (2)
T k=−∞ M i=0 M
This expression shows that the gain and timing skew errors depend on input
frequency ωin and appear at each ωin ± kω
M
s
frequency. However, the offset mismatch
is spurious tone independent of the signal at each kω
M
s
.
3 Proposed Method
The offset mismatch calibration scheme is illustrated in Fig. 2. Let us assume ôi is the
offset’s estimation value of the ith sub-ADC. When the offset mismatch is estimated, it
is subtracted from each channel ADC output to get the corrected signal. By assuming
the input signal is wide-sense-stationary and its expected value is approximately zero,
the estimated offset values are expressed as
N −1
1
ôi = yi [k]
N k=0
N −1
1
= gi x((k M + i)T − ti ) +oi ≈ oi . (3)
N k=0
≈0
The offset mismatch is calibrated by subtracting estimated offset values from the
sub-ADC output as follows
The signal after calibration of offset mismatch is expressed in (4). Assume gi denotes
the gain mismatch of ith sub-ADC. To estimate gain mismatch, we need to determine
the correlative gain between each single ADC with a reference ADC, that is, gg0i .
Assume that the reference channel is the first channel (ADC0 ). By calculating the
average power of the ith ADC and ADC0 , the relative gain can be calculated as
1
N −1
N k=0 y02 [k] g02 Px(t) g02
N −1 = = . (5)
1
N k=0 yi2 [k] gi2 Px(t) gi2
This ratio is then taken the square root and multiplied by each sub-ADC output
to produce the corrected one. This output has the same gain mismatch of ADC0 as
illustrated in Fig. 3. Therefore, the gain error among sub-ADCs is the same. Since
the proposed gain calibration technique requires multipliers and adders running at
the sampling rate of sub-ADCs, it is efficient for the hardware implementation in
terms of area and power consumption.
Timing
Hadamard yt′ [ n ] ωˆ ti
Mismatch
hd[n]
transform Estimation
+∞
M−1
jω 1 1 − j (ω−k ωs )ti jki 2π ωs
Yt e = e M .e M X j ω − k . (7)
T k=−∞ M i=0 M
where H[n] is the Hadamard matrix of order M, h d [n] is the impulse response of the
derivative filter.
0 (n = 0)
h d [n] = cos(nπ ) . (10)
n (n = 0)
We multiply the exact coefficients and the Hanning window function to get the fil-
ter coefficients. The coefficients ωti are calculated based on the sign of the Hadamard
matrix as follows
1086 V.-T. Ta and V.-P. Hoang
ωt0 t0
ωt1
1
t1
.. ≈ H .. , (12)
. M .
ωt(M−1) t M−1
where
with ȳt′ [n] generated by the FIR filter f [n] and Hadamard transform H [n] as in (15).
This technique uses only one filter for M-channel estimation. Thus, the circuit area
is reduced.
Timing mismatch coefficients ω̂ti are calculated from the correlator by the LMS
algorithm.
where µ is the step-size parameter for LMS algorithm, whereas δ[n] is yt [n] signal
delayed versions of after the filter f [n]. Notice that f [n] is a high-pass filter.
Sequential All-Digital Background Calibration … 1087
4 Simulation Results
5 Conclusion
(a) (b)
Fig. 7 The convergence behavior of channel mismatches: (a) offset, (b) timing mismatch
References
1. Black WC, Hodges DA (1980) Time interleaved converter arrays. IEEE J Solid-State Circuits
15:1022–1029
2. Gustavsson M, Wikner JJ, Tan N (2000) CMOS data converters for communications, vol 543.
Springer Science and Business Media
Sequential All-Digital Background Calibration … 1089