Fully Digital Background Calibration of Channel Mismatches in Time-Interleaved ADCs Using Recursive Least Square Algorithm
Fully Digital Background Calibration of Channel Mismatches in Time-Interleaved ADCs Using Recursive Least Square Algorithm
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Abstract
Time-interleaved analog-to-digital converters (TIADCs) have been considered as a very promising
solution for high-speed direct sampling receivers. However, channel mismatches reduce the
TIADC’s performance significantly. Therefore, calibration of these mismatches is emerging to
maintain the performance of these TIADCs. This paper proposes a fully digital background
calibration technique for multiple deviations including offset, gain, and timing mismatches.
Offset and gain deviations in TIADCs are sequentially calibrated by taking the average value of
the output samples, and calculating the ratios of power, respectively. Then, the timing mismatch
is compensated by using the Hadamard matrix and the adaptive recursive least square (RLS)
algorithm. The proposed calibration technique is proven through the simulation results for
signal-to-noise-and-distortion (SNDR), spurious-free dynamic range (SFDR) and time
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8/6/2021 Fully digital background calibration of channel mismatches in time-interleaved ADCs using recursive least square algorithm - ScienceDirect
convergence. As a result, the performance of TIADC is improved by 40.98 dB and 70.64 dB for
SNDR and SFDR, respectively.
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Keywords
Time-interleaved analog-to-digital converter (TIADC); Channel mismatches; Fully
digital background calibration; Recursive least square (RLS) algorithm
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