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Questions - Written Test - Mtech 2013 - 13th July

The document contains a 30 question multiple choice entrance exam for M.Tech 2013. The questions cover topics in electronics and circuits including semiconductor physics, diodes, transistors, logic gates, shift registers, and Laplace transforms. The correct answers are provided as multiple choice options for each question.

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Shreya Singh
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0% found this document useful (0 votes)
63 views

Questions - Written Test - Mtech 2013 - 13th July

The document contains a 30 question multiple choice entrance exam for M.Tech 2013. The questions cover topics in electronics and circuits including semiconductor physics, diodes, transistors, logic gates, shift registers, and Laplace transforms. The correct answers are provided as multiple choice options for each question.

Uploaded by

Shreya Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 14

M.

TECH 2013
Entrance Exam

1) In silicon at T = 300 K the thermal-equilibrium concentration of electron is n0 = 5 x 104 cm-3. The


hole concentration is

(A) 4.5 x 1015 cm-3 (C) 0.3 x 10-6 cm-3

(B) 4.5 x 1015 m-3 (D) 0.3 x 10-6 m-3

2) In a GaAs sample the electrons are moving under an electric field of 5 kV/cm and the carrier
concentration is uniform at 1016 cm-3. The electron velocity is the saturated velocity of 107 cm/s.
The drift current density is

(A) 1.6 x 104 . A/cm2 (C) 1.6 x 108 . A/cm2

(B) 2.4 x 104 . A/cm2 (D) 2.4 x 108 . A/cm2

3) A diode has reverse saturation current Is = 10-10 A and non-ideality factor η=2. If diode voltage is
0.9 V, then diode current is

(A) 11 mA (C) 83 mA

(B) 35 mA (D) 143 mA

4) In bipolar transistor biased in the forward-active region the base current is IB = 50 µA and the
collector currents is IC = 2.7 mA. The α is

(A) 0.949 (C) 0.982

(B) 0.54 (D) 0.018

5) The following currents are measured in a uniformly doped npn bipolar transistor:

InE = 1.20 mA, IpE = 0.10 mA, InC = 1.18 mA

IR = 0.20 mA, IG = 1 µA, IpC0 = 1 µA


The β is =

(A) 3.69 (C) 2.27

(B) 0.44 (D) 8.39

1 13-07-2013
M.TECH 2013
Entrance Exam

Determine the region of operation for the transistor shown in circuit in questions 6 and 7.

6)

(A) Forward-Active (C) Saturation

(B) Reverse-Active (D) Cut-off

7)

(A) Forward-Active (C) Saturation

(B) Reverse-Active (D) Cut-off

8) The chemical reaction involved in epitaxial growth in IC chips takes place at a temperature of
about

(A) 500 oC (C) 1200 oC

(B) 800 oC (D) 2000 oC

9) In the question a circuit and a waveform for the input voltage is given. The diode in circuit has
cutin voltage Vγ = 0. Choose the option for the waveform of output voltage vo .

2 13-07-2013
M.TECH 2013
Entrance Exam

(A) (C)

(B) (D)

10) The circuit inside the box in figure contains only resistor and diodes. The terminal voltage vo is
connected to some point in the circuit inside the box. The largest and smallest possible value of vo
most nearly to is respectively

(A) 15 V, 6 V (C) 24 V, 6 V
(D) 15 V, -9 V
(B) 24 V, 0 V

11) For the circuit shown in figure, diode cutin voltage is Vin = 0. The ripple voltage is to be no more
than vrip = 4 V. The minimum load resistance that can be connected to the output is

(A) 6.25 kΩ (C) 30 kΩ


(B) 12.50 kΩ (D) None of the above

3 13-07-2013
M.TECH 2013
Entrance Exam

12) The common-emitter current gain of the transistor is β =75. The voltage VBE in ON state is 07. V.
IE , RC = ?

(A) 1.46 mA, 6.74 kW (C) 1.13 mA, 5.98 kW


(B) 0.987 mA, 3.04 kW (D) None of the above

13) For the transistor in circuit shown in figure, β = 200. Determine the value of IE and IC for

VB = 0 V.

(A) 6.43 mA, 2.4 V (C) 0 A, 6 V


(B) 2.18 mA, 3.4 V (D) None of the above

14) In the circuit, the transistor parameters are VTN = 17. V and Kn = 0.4 mA/ V2. If ID = 0.8 mA and
VD = 1 V, then value of resistor RS and RD are respectively

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M.TECH 2013
Entrance Exam

(A) 2.36 kΩ, 5 kΩ (C) 6.43 kΩ, 8.4 kΩ


(B) 5 kΩ, 2.36 kΩ (D) 8.4 kΩ, 6.43 kΩ

15) If the transistor parameter are β =180 and Early voltage VA = 140 V and it is biased at
ICQ = 2 mA, the values of hybrid- π parameters gm, rπ and ro are respectively

(A) 14 A/V, 2.33 kΩ, 90 kΩ (C) 77 mA/V, 2.33 kΩ , 70 kΩ


(B) 14 A/V, 90 kΩ , 2.33 kΩ (D) 77.2 A/V, 70 kΩ, 2.33 kΩ

16) A computer has the following negative numbers stored in binary form as shown. The wrongly
stored number is

(A) -37 as 1101 1011 (C) -48 as 1110 1000


(B) -89 as 1010 0111 (D) -32 as 1110 0000

17) If XY = 0 then X XOR Y is equal to

(A) X + Y (C) XY
(B) X’ + Y’ (D) X’. Y’

18) The initial contents of the 4-bit serial-in-parallel-out right-shift, register shown in fig. is
0110. After three clock pulses are applied, the contents of the shift register will be

(A) 0 0 0 0 (C) 1 1 1 1
(B) 0 1 0 1 (D) 1 0 1 0

5 13-07-2013
M.TECH 2013
Entrance Exam

19) A 4 bit modulo–6 ripple counter uses JK flip-flop. If the propagation delay of each FF is
50 ns, the maximum clock frequency that can be used is equal to

(A) 5 MHz (C) 4 MHz


(B) 10 MHz (D) 20 MHz

20) The mod-number of the asynchronous counter shown in figure is

(A) 24 (C) 25
(B) 48 (D) 36

21) The frequency of the pulse at z in the network shown in figure is

(A) 10 Hz (C) 40 Hz
(B) 160 Hz (D) 5 Hz

22) The circuit shown in fig. implements the function

(A) ABC + (ABC)’ (C) (ABC)’ + (A + B + C)’


(B) ABC + (A + B + C)’ (D) None of the above

6 13-07-2013
M.TECH 2013
Entrance Exam

Statement for Q.23–24:

Consider the following program of 8085 assembly language:

23) If the contents of memory location 4A00H, 4A01H and 4A02H, are respectively A7H, 98H and
47H, then after the execution of program contents of memory location 4A02H will be respectively

(A) A7H (C) 47H


(B) 98H (D) None of the above

24) The memory requirement for this program is

(A) 20 Byte (C) 23 Byte


(B) 21 Byte (D) 18 Byte

25) x[n] and h[n] are given in the question. Compute the convolution y[n] = x[n] * h[n] and choose
correct option.

x[n] = { 1, 2, 0, 2, 1}, h[n] = x[n]


(A) {1, 4, 4, 4, 10, 4, 4, 4, 1} (C) {1, 4, 4, 10, 4, 4, 4, 1}


↑ ↑
(D) {1, 4, 4, 10, 4, 4, 4, 1}
(B) {1, 4, 4, 4, 10, 4, 4, 4, 1} ↑

26) Determine the Laplace transform of given signal: x(t) = u(t - 2)

(A) -e-2s/s (C) -e-2s/s

(B) e-2s/s (D) 0

7 13-07-2013
M.TECH 2013
Entrance Exam

27) Determine the time signal x(t) corresponding to given X(s) and choose correct option.

(A) (2e-2t + 2e-t sin2t - 2e-t cos2t) u(t) (C) (2e-2t + 2e-t cos2t - e-t sin2t) u(t)

(B) (2e-2t + 2e-t cos2t - 2e-t sin2t) u(t) (D) (2e-2t + 2e-t sin2t - e-t cos2t) u(t)

28) The transfer function H(s) of a stable system is

The impulse response is

(A) 2u(-t + 1) - 3t u(-t + 1) (C) 2u(t + 1) - 3t u(t + 1)

(B) (3t e-t - 2e-t) u(t) (D) (2e-t – 3t e-t) u(t)

29) The transfer function of a causal system is given as

The impulse response is

(A) (3n + (-1)n 2n+1) u[n] (C) (3n-1 + (-1)n 2n+1) u[n]

(B) (3n+1 + 2 (-2)n) u[n] (D) (3n-1 - (-2)n+1) u[n]

30) In a non-pipeline machine F, D, E takes 35 ns, 25 ns, 40 ns respectively. If instruction steps were
pipelined what should be the increase in throughput. Assume 5 ns overhead at each pipelined stage
and ignore the delay.

(A) 2.67 (C) 2.5

(B) 3 (D) 0.88

31) Data hazards occur when

(A) Greater performance loss (C) Some functional unit is not fully pipelined

(B) Pipeline changes the order of read/write (D) Machine size is limited
access to operands

8 13-07-2013
M.TECH 2013
Entrance Exam

32) In which of following processor type a pipeline can easily implemented

(A) CISC (C) VLIW

(B) RISC (D) None

33) Width of address and data buses for a 512Kx 8 memory chip is _________

(A) 512 & 8 (C) 19 & 3

(B) 19 & 8 (D) 512 & 3

34) Purpose of PC (Program Counter) in Micro-processor is

(A) To store address of TOS (Top Of Stack) (C) count the number of instructions

(B) To store address of next instruction to be (D) To store base address of the stack
executed

35) _________ makes the instruction execution faster in normal instruction cycle

(A) Cache Memory (C) Associative memory

(B) Virtual Memory (D) All of the above

36)
main ( )
{
static char *s[ ] = {“black”, “white”, “yellow”, “violet”};
char **ptr[ ] = {s+3, s+2, s+1, s}, ***p;
p = ptr;
**++p;
printf(“%s”,*--*++p + 3);
}
A. ak C. Error

B. dk D. ck

9 13-07-2013
M.TECH 2013
Entrance Exam

37)

int i,j;
for(i=0;i<=10;i++)
{
j+=5;
assert(i<5);
}
A. Compile time error C. 4

B. Runtime error D. 9

38)

main()
{
int i=-1;
+i;
printf("i = %d, +i = %d \n",i,+i);
}
A. error C. i = -2, +i = -1

B. i = 0, +i = 0 D. i = -1, +i = -1

39)

main()
{
char *str1="abcd";
char str2[]="abcd";
printf("%d %d %d",sizeof(str1),sizeof(str2),sizeof("abcd"));
}
A. 2 4 5 C. 1 3 4

B. 2 5 5 D. 2 6 5

40)

main()
{
char not;
not=!2;
printf("%d",not);
}

10 13-07-2013
M.TECH 2013
Entrance Exam

A. 2 C. 1

B. 0 D. error

41)

main()
{
int k=1;
printf("%d==1 is ""%s",k,k==1?"TRUE":"FALSE");
}
A. 1==1 is TRUE C. Compile error

B. runtime error D. 1==1 is TRUE

42)

main()
{
int *j;
{
int i=10;
j=&i;
}
printf("%d",*j);
}

A. 10 C. 11

B. error D. 13

43)

main()

int i=5,j=6,z;

printf("%d",i+++j);

11 13-07-2013
M.TECH 2013
Entrance Exam

A. 11 C. 20

B. 12 D. 21

44) Minimum number of queues needed to implement the priority queue?

A. One C. Three

B. Two D. None

45) What is the data structures used to perform recursion?

A. Queue C. None

B. Stack D. Array

46) What is the maximum possible number of nodes in a binary tree at level 6?

A. 128 C. 32

B. 64 D. 26

47) Which is Simplest Structure?

A. Sequential C. None of above

B. Combinational D. Both A and B

48) When can you tell that a memory leak will occur?

A. When you do not free memory after C. When you declare variable larger then you
allocating needed

B. When you declare two variable with same D. All of above


name

49) The searching technique that takes O (1) time to find a data is

A. Linear Search C. Hashing

B. Binary Search D. Tree Search

12 13-07-2013
M.TECH 2013
Entrance Exam

50) Dialog control is the work of which OSI layer?

a) Transport Layer c) Presentation Layer

b) Session Layer d) Datalink Layer

51) Which of the following method is most suitable for data-link layer of wireless networks

a) Error correction c) Both a and b

b) Error detection d) Termination of communication

52) A bit string, 0111101111101111110, needs to be transmitted at the data link layer. What is the
string actually transmitted after bit stuffing? Flag is 01111110

a)011111100111101111100111110001111110

b) 0111111001111011111011111001111110

c) 011111100111101111110111111001111110

d) 011111100111101111100111110000000000

53) IEEE standard of WIMAX is

a) 802.11 c) 802.15.1

b) 802.3 d) 802.15

54) How long is an IPv6 address?

A. 32 bits C. 64 bits

B. 128 bytes D. 128 bits

55) What is the purpose of flow control?

A. To ensure that data is retransmitted if an acknowledgment is not received.

B. To reassemble segments in the correct order at the destination device.

C. To provide a means for the receiver to govern the amount of data sent by the sender.

D. To regulate the size of each segment.

13 13-07-2013
M.TECH 2013
Entrance Exam

56) The part of machine level instruction, which tells the central processor what has to be done, is

A) Operation Code C) Locator

B) Address D) Flip-flop

57) Which of the following refers to the associative memory?

A. The address of the data is generated by the CPU

B. The address of the data is supplied by the users

C. There is no need for an address i.e. the data is used as an address

D. The data are accessed sequentially

58) To avoid the race condition, the number of processes that may be simultaneously inside their
critical section is

A. 8 C. 16

B. 1 D. 0

59) A system program that combines the separately compiled modules of a program into a form
suitable for execution

A. assembler C. cross compiler

B. linking loader D. load and go

60) The strategy of allowing processes that are logically runnable to be temporarily suspended is
called

A. preemptive scheduling

B. non preemptive scheduling

C. shortest job first

D. first come first served

14 13-07-2013

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