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Chapter2 - Intro To Diode

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Chapter2 - Intro To Diode

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You are on page 1/ 38

INTRODUCTION

TO DIODES

CHAPTER 2
THE PN JUNCTION

N-type region has


many free
electrons
(majority carriers)
and only a few
thermally
generated holes. PN Junction is
formed when p-
type region is
joined with the n-
type region - a
basic structure
P-type region has that forms a
many holes semiconductor
(majority carriers) diode.
and only a few
thermally generated
free electrons
(minority carriers)
THE PN JUNCTION

With the formation of


the p and n materials, When equilibrium is
holes from p-type will Combination of reached, no further
diffuse into the n-type , electrons and holes at diffusion of electrons
and electrons from n- the junction takes place. and holes across the
type will diffuse into the junction
p-type.
THE PN JUNCTION
Depletion region n-region loses
electrons, and
p-region loses become
holes, and a region depleted of positively
become any charge carriers charged
negatively
charged
has a barrier potential

Barrier potential – difference of


potential between PN junction
across the depletion region.
BARRIER POTENTIAL

 Any time there is a +ve charge and –ve charge near each
other in the depletion region , there is a force acting on
the charges.
 The forces between the opposite charges form a field of
forces is called an electric field.
 This electric field is a barrier to the free electrons in the n
region.
BARRIER POTENTIAL

 An external energy must be applied to get the electrons


to move across the barrier in the depletion region.
 Barrier Potential – The amount of voltage required to
move electrons through the depletion region.
 The typical barrier potential is 0.7V for silicon and 0.3V for
germanium at 25 Celsius.
Biasing the Diode
 Bias - the use of a dc voltage to establish
certain operating conditions for an electronic
device.
 In diode, there are two bias conditions:
forward and reverse bias.
 Biasing the diode – Connect a sufficient dc
voltage of the proper polarity across the pn
junction.
NO APPLIED BIAS (V= 0)
 No external voltage applied, no current flow
FORWARD BIAS CONDITION

 The condition that


allows current through
pn junction.
 The +ve side of bias
voltage is applied to
the p region and -ve
side to the n region.
 The bias voltage must
be greater than the
barrier potential.
Forward Bias Condition

A forward-biased diode showing the flow of majority


carriers and the voltage due to the barrier potential
across the depletion region.
FORWARD BIAS CONDITION

 The –ve side of VBIAS pushes the free electron in the n


region, towards the pn junction.

 The –ve side also provides a continuous flow of electrons


through the external connection.

 The electrons in n region see a reduced barrier at the pn


junction and a strong attraction for the +ve applied V to the
p region.
FORWARD BIAS CONDITION

p n

 The electrons flow out of the p region through the external


connection (conductor) to the +ve side of V and leave holes
behind in the p-region.

 Resulted in continuous availability of holes effectively moving


towards the junction to combine with electrons which have
crossed the junction to enter p region.
FORWARD BIAS CONDITION
EFFECT ON THE DEPLETION REGION
 As more electrons flow into the depletion region from n
region, the +ve ions are reduced.

 As more holes flow into the depletion region from p


region, the -ve ions are reduced.

 This reduction causes the depletion layer to reduce.


Forward Bias Condition Effect on the Barrier
Potential
 The electrons give up an amount of energy
equivalent to barrier potential when they
cross the depletion region.

 This energy loss results in a voltage drop


across the pn junction equivalent to barrier
potential.
FORWARD BIAS MEASUREMENT
Current & Voltage in a forward biased pn junction

Forward-bias measurements show general changes in VF


and IF as VBIAS is increased.
REVERSE BIAS CONDITION
REVERSE BIAS CONDITION

 The +ve side of bias voltage is applied to the n region


and -ve side to the p region.

 The +ve ion in depletion region will increase due to


the large number of the free electrons in n region
drawn to the +ve terminal of the applied bias voltage.
REVERSE BIAS CONDITION

 The –ve ion in the depletion region also increase as the


electrons from the –ve side of the applied voltage move
from hole to hole in the p region towards the depletion
region.

 Resulted in a widening of the depletion region


REVERSE BIAS CONDITION – REVERSE
CURRENT
 Reverse current is due to the minority carriers from
thermally generated electron-hole pairs.

 The small number of minority free electrons in p region are


pushed towards the pn junction by the –ve bias voltage
and combine with the minority holes in the n region as
valance electron and flow towards the +ve bias voltage.
REVERSE BIAS CONDITION – REVERSE
BREAKDOWN

 If the external reverse bias voltage is increased to a


value called breakdown voltage, the reverse current
will drastically increase due to avalanche effect

 Will permanently damage the diode.

 Can be controlled by adding a series-limiting resistor


to limit the current.
AVALANCHE EFFECT

 The high reverse bias voltage imparts to the free minority


electron.
 As they speed through the p region, they collide with atoms to
knock valence electrons move into the conduction band
resulted in conduction electrons.
 The generated conduction electrons will repeat the same
process hence the numbers of free electron quickly multiply.
BIASING CIRCUIT
VOLTAGE-CURRENT CHARACTERISTICS
OF A FORWARD BIAS DIODE
 Forward current, IF – The current is produced
when the forward bias voltage, VF is applied
across the diode.
 VF = 0 V, IF = 0 A , as VF increases , IF also
increases.
 A portion of VF is dropped across the limiting
resistor.
 As VF = 0.7 (barrier potential), IF begins to
increase rapidly (at the knee point of the curve).
GRAPHING THE V-I CURVE- FORWARD BIAS
 After the knee point, VF remains at approximately 0.7V
and IF increases rapidly.
 There is a slight increase in VF above 0.7V as IF increases
due mainly to the voltage drop across the dynamic
resistance.
 Normal operation of forward bias diode is above the knee
of the curve.

A – zero bias ; B: VF < 0.7 , C: VF > 0.7 27


DYNAMIC RESISTANCE- FORWARD BIAS
 Dynamic/Internal resistance for doped
semiconductor material
 Very small and can be neglected.
 The resistance changes along the V-I curve.
 Dynamic resistance of a diode is designated as
r’d
 Below the knee, r’d is greatest because current
increases very little.
 r’d begins to decrease in the knee region
 r’d becomes smallest above the knee
V-I CHARACTERISTICS OF A REVERSE
BIAS DIODE
 When reverse bias voltage VR is applied across
the diode, there only an extremely small reverse
current , IR .
 VR = 0V, IR = 0 A.
 As VR increases until VBR breakdown voltage, IR
begins to increase rapidly.
 Increases very rapidly resulting in overheating
and possible damage
COMPLETE V-I CHARACTERISTIC CURVE
TEMPERATURE EFFECTS
 In forward bias, the barrier potential decreases as
temperature increases.
 In reverse bias, as temperature increases, IR
increases.

31
DIODE STRUCTURE AND SYMBOL
DIODE MODELS - IDEAL MODEL

 Acts like a simple switch


 When forward bias acts like a closed (on)
switch
 When reverse bias – acts like an open (off)
switch
 The barrier potential, forward dynamic
resistance and reverse current are
neglected.
DIODE MODELS - IDEAL MODEL
V-I CHARACTERISTIC : IDEAL

• Forward Bias region • Reverse Bias region


• The voltage across the diode is 0V • All of the voltage is across the diode
• The current is infinite • The current is 0A
• The diode acts like a short circuit. • The diode acts like an open circuit.
DIODE MODELS - IDEAL MODEL

 As the barrier potential and forward


dynamic resistance are neglected , VF = 0
(no voltage across diode).
 IF = VBIAS/RLIMIT
 IR =0
 VR=VBIAS
DIODE MODELS - PRACTICAL MODEL
 The equivalent voltage source represents the fixed voltage
drop (VF) produced across the forward bias pn junction
and not an active source.

VF  0.7 V (silicon)
VF  0.3 V (germanium )
VBIAS -VF -VRLIMIT  0
VRLIMIT  I F RLIMIT
VBIAS  VF
IF 
RLIMIT
DIODE MODELS - PRACTICAL MODEL
THE COMPLETE DIODE MODEL

VF  0.7V  I F r 'd
VBIAS  0.7V
IF 
RLIMIT  r 'd
ANY
QUESTIONS??
HOMEWORK
• Find information on Zener diode (operating voltage,
the VI-characteristics, etc)
• What are the difference between Zener diode and
normal diode
• Find some example of Zener diode applications

We shall discuss the findings in our class next week

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