Semiconductor Device Theory:

MOSFETs–Theoretical Exercise

Dragica Vasileska and Gerhard Klimeck

1. Consider nearly two identical silicon MOSFETs. The only difference between the two de-
vices is that the oxide layer in one of them is perfectly clean, and the other one is contami-
nated with sodium ions that produce a positive charge density. The concentration of sodium
ions equals to 2 × 1016 cm −3 , and the thickness of the oxide layer is 0.1 µm. The permittivity
of SiO2 is 3.45 × 10 −11 F / m .
(a) What is the difference (including sign) in the device threshold voltages if these devices
are n-channel devices?
(b) What is the difference (including sign) in the device threshold voltages if these devices
are p-channel devices?
(c) Assume that the threshold voltage of the n-channel clean device is 1 V and that the
threshold voltage of the p-channel clean device is -1 V. Sketch the qualitative dependen-
cies of the drain-to-source saturation current on the gate voltage for all four devices
(clean and contaminated n-channel and clean and contaminated p-channel devices). La-
bel the thresholds and shifted thresholds on the gate-voltage axis.

2. Prove the expressions presented in the class for the extrinsic transconductance and the extrin-
sic drain conductance of a transistor with finite source and drain series resistances in terms of
those of an ideal transistor with zero series resistances.

3. Calculate the dependence of the drain current ID upon the drain voltage VDS for VGS = 5 V, for
a silicon MOSFET with the following values of the source (RS) and drain resistance (RD): RS
= RD = 0 Ω, and RS = RD = 100 Ω. The device parameters are as follows:
gate length: L = 4 µm
gate width: W = 100 µm
electron mobility in the channel: µn = 1000 cm2/V-s
dielectric permittivity of gate oxide: εox = 3.45×10-11 F/m
dielectric permittivity of silicon: εsc = 1.05×10-10 F/m
flat-band voltage: VFB = 0 V
substrate bias: Vsub = 0 V
temperature: T = 300 K
substrate doping: NA = 1015 cm-3
gate oxide thickness: dox = 20 nm
intrinsic carrier concentration: ni = 1.5×1010 cm-3
In your calculations use:
(a) square-law theory
(b) bulk-charge theory
 Repeat the problem for NA=1016 cm-3 and NA=1017 cm-3. Discuss the validity of the
square-law theory versus substrate doping and the influence of the series resistance on the
drain current characteristics of these devices.

4. Derive an expression for the drain saturation current of an n-channel MOSFET using square-
law theory and neglecting velocity saturation effects, i.e. assuming the constant mobility
model, but taking into account the source series resistance RS. Use the following MOSFET
parameters:
gate oxide thickness: dox = 17.5 nm
device gate width: W = 100 µm
gate length: L = 4 µm
threshold voltage: VT = -1 V
electron mobility in the channel: µn = 800 cm2/V-s
dielectric permittivity of gate oxide: εox = 3.45×10-11 F/m
gate voltage: VGS = 5 V
substrate bias: Vsub = 0 V
Plot IDsat versus RS for 2Ω < RS ≤ 20 Ω.

5. Calculate and plot the subthreshold current for a long-channel Si MOSFET as a function of
the gate voltage VGS that varies in the range between VT - 1 (V) and VT. For the drain voltage
assume VDS = 0.01 V, 0.1 V, and 10 V. Use the following parameters:
threshold voltage: VT = 1 V
substrate doping: NA=1015 cm-3
electron mobility in the channel: : µn = 800 cm2/V-s
device gate width: W = 100 µm
gate length: L = 20 µm
gate oxide thickness: dox = 50 nm
energy band gap: EG = 1.12 eV
effective density of states in the conduction band: NC = 3.22×1019 cm-3
effective density of states in the valence band: NV = 1.83×1019 cm-3
dielectric permittivity of gate oxide: εox = 3.45×10-11 F/m
dielectric permittivity of silicon: εsc = 1.05×10-10 F/m
temperature: T = 300 K

6. Consider the following idealized ion implantation profile near the semiconductor-insulator in-
terface in a Si MOSFET (x = 0 corresponds to the semiconductor insulator interface). Calcu-
late the threshold voltage shift as a function of Ni, for 1014 cm-3 ≤ Ni ≤ 1017 cm-3 for dimp =
0.08 µm. Assume:
semiconductor background doping NA = 1015 cm-3
gate oxide thickness: dox = 50 nm
energy band gap: EG = 1.12 eV
effective density of states in the conduction band: NC = 3.22×1019 cm-3
effective density of states in the valence band: NV = 1.83×1019 cm-3
dielectric permittivity of gate oxide: εox = 3.45×10-11 F/m
dielectric permittivity of silicon: εsc = 1.05×10-10 F/m
temperature: T = 300 K
Assume shallow ionized acceptors. Define the threshold voltage as the gate voltage for
which the electron concentration at the surface n(0) is equal to NA + Ni.
 Doping density

Ni dimp

NA

x=0 Distance x

7. The current-voltage characteristics of a long-channel MOSFET are described with:

where µeff is the effective electron mobility in the channel, L is the effective channel
length, Z is the channel (gate) width, Cox is the gate capacitance, ID is the drain cur-
rent, VD is the drain voltage (with the source as reference), VG is the gate voltage, and
VT is the threshold voltage. When the drain and gate are connected, consider the fol-
lowing two cases:
(a) VT > 0, and
(b) VT < 0 .
Find and plot ID in terms of VD in each of these two cases.