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4.1 Introduction and Features of 8051

The document discusses the Von Neumann and Harvard computer architectures. The Von Neumann architecture uses a single common memory space for both program and data memory, requiring time-division multiplexing to fetch instructions and transfer data. In contrast, the Harvard architecture uses separate memory spaces and buses for program and data, allowing simultaneous instruction fetching and data transfer. The document also provides an overview of microcontrollers, noting they integrate a microprocessor with memory and peripheral devices onto a single chip. This allows for smaller size and lower power consumption but also limits clock speed and memory capacity compared to general purpose computers.

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Smarajit Mishra
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210 views

4.1 Introduction and Features of 8051

The document discusses the Von Neumann and Harvard computer architectures. The Von Neumann architecture uses a single common memory space for both program and data memory, requiring time-division multiplexing to fetch instructions and transfer data. In contrast, the Harvard architecture uses separate memory spaces and buses for program and data, allowing simultaneous instruction fetching and data transfer. The document also provides an overview of microcontrollers, noting they integrate a microprocessor with memory and peripheral devices onto a single chip. This allows for smaller size and lower power consumption but also limits clock speed and memory capacity compared to general purpose computers.

Uploaded by

Smarajit Mishra
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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VON-NEUMANN ARCHITECTURE

 Single common memory space for both program


and data memory.
 Share a common bus. So, fetching of instruction
and transfer of data between memory and
processor is performed at different time (Time-
division Multiplexing).
 As same buses are used for data and program
optimal bus width for program is not possible. So
multiple fetches are required to form an
instruction.

HARVARD ARCHITECTURE

 Uses separate memory space


for program and Data with
independent address and data
buses.
 So, instruction fetching and data
transfer can be performed
simultaneously.

 It also supports internal organisation that allow instruction pre-fetching and decoding
while multiple data are fetched. Thus, while processor is writing or reading from the
data memory the program code is pre-fetched. So faster execution is possible.
 As buses are separate, it is possible to have different width for address and data
bus. Thus, optimal bus width is possible in Harvard architecture.
Microcontroller
In simple word, a microcontroller is a microprocessor system in a single chip (Single-
chip-computer). That means ROM, RAM, IO ports and some peripheral devices,
necessary to built the system, are available inside the chip.
All components in a single chip has following advantages:
1. Few external components are required to build a system. Due to this:
 Power consumption is less, so preferred for battery operation
 System is small in size.
 Increases reliability.
 Low development time, as development time for interfacing is reduced.
2. HARVARD architecture can be implemented as no external pins are required
for the busses. Also, data transfer is faster as it takes place within the chip.
 This increases the speed of execution.
3. As memories are inside the chip, lesser amount of memory can be fabricated
inside.
 Due to improvement in fabrication technology, now-a-days moderate
amount of memory are fabricated inside modern microcontroller.
 So, Microcontroller system is application specific and not used for
multitasking computer system.
4. The clock speed is also normally limited to few MHz.

Q. Why a microcontroller is not used as a processing unit


in a computer?
Ans.
 The computers are for general purpose, multitasking use. So, the clock speed
and amount of memory requirement is high.
 But in the micro-controller the amount of on chip memory is quite less.
Also the clock speed is limited to few MHz.
 Due to this the microcontrollers fare not used in computers.

N-Bit Microcontroller
 An N-bit Microcontroller can process an N-Bit data at a time.
 This is the width of the ALU.
 Generally, the internal bus width and register sizes are also N-bit but not
necessarily.
Commercial Micro-controller
8-bit microcontrollers
– Motorola’s 6811
– Intel’s 8051
– Zilog’s Z8
– Microchip’s PIC
 There are also 16-bit and 32-bit microcontrollers made by various chip
makers.

8051 Family
 Intel introduced 8051, referred as MCS-51, in 1981. It became widely popular
after allowing other manufacturers to make and market it in any flavour
maintaining code compatibility with MCS-51.
• The 8051 family has the largest number of diversified (multiple source) suppliers:
• Intel (original)
• Atmel
• Philips/Signetics
• AMD
• Infineon (formerly Siemens)
• Matra
• Dallas Semiconductor/Maxim
MCS-51 Family Members
On-chip
On-chip Nos of 16-bit
DATA No of vectored Full Duplex
Device Program Memory Timers /
Memory (RAM) interrupts Serial I/O
(In Bytes) counters
(In Bytes)

8031 128 None 2 5 1

8032 256 None 3 6 1

8051 128 4K ROM 2 5 1

8052 256 8K ROM 3 6 1

8751 128 4K EPROM 2 5 1

8752 256 8K EPROM 3 6 1


Atmel manufactures MCS-51 code compatible Microcontroller using flash memory
as on-chip program memory. The name of microcontroller starts with AT 89C*** e.g.
AT89C51, AT89C52.
Features of 8051 Micro-controller
1. A 40 pin IC operated from a single +5V power supply.
2. An 8-bit CPU with Harvard Architecture.
3. 64k Program Memory address space
4. 64k Data Memory Address Space
5. 4k program memory as ROM, EPROM, EEPROM (8k in 8052, No ROM in
8031 and 8032).
6. Internal RAM of 128bytes (256 bytes in 8052)
7. Most of the registers are 8-bit.
8. It has a 16-bit PC (Program Counter) and a 16-bit DPTR (Data Pointer)
register.
9. Facility for interfacing External ROM and RAM of 64K Bytes.
10. 8-bit Processor Status Word (PSW) with Control and Status flags.
11. 8-bit Stack Pointer.
12. 128-bytes of Special Function Register(SFR).
13. 32 bidirectional individually programmable I/O lines arranged as four 8-bit
bidirectional ports (P3 – P0).
14. Two 16-bit timers/counters (3 timers/counters in 8052).
15. 2 external and 3 internal vectored interrupts.
16. One full duplex serial I/O (UART).
17. On chip clock Oscillator.
18. Separate Boolean processor for 1-bit logical operations.
19. Support Multiplication and Division instruction.

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