Ax Sip Sfeu D
Ax Sip Sfeu D
AX-SIP-SFEU-API
Sigfox) RF Transceiver
System in Package (SiP) for
Up-Link and Down-Link
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BLOCK DIAGRAM
AX−SIP−SFEU / AX−SIP−SFEU−API
RF Synthesis
RX/TX Receive
Switch and Communication
ANT
Antenna Controller
Interface Transmit
UARTRX
UART
UARTTX
DAC
GPIO[14:0] GPIO
ADC CPU
RADIO_LED
CPU_LED
Dedicated
Status
TX_LED
Outputs
RX_LED
Program
Memory
Power Mode (FLASH)
RAM
Control Sigfox identity (ID, PAC)
Sigfox compliant
application
(AX−SFEU only)
VDD_IO
RESET_N
GND
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GPIO4 16 I/O/PU General purpose IO, selectable SD DAC functionality, selectable clock functionality
CPU_LED 17 O CPU activity indicator
RADIO_LED 18 O Radio activity indicator
GPIO9 19 I/O/PU General purpose IO, wakeup from deep sleep
UARTTX 20 O UART transmit
UARTRX 21 I/PU UART receive
RX_LED/ 22 O Receive activity indicator in AX−SIP−SFEU.
DBG_DATA I/O Debugger data line in AX−SIP−SFEU−API.
TX_LED/ 23 O Transmit activity indicator in AX−SIP−SFEU.
DBG_CLK I Debugger clock line in AX−SIP−SFEU−API.
NC/ 24 PD Do not connect in AX−SIP−SFEU.
DBG_EN PD Debugger enable line in AX−SIP−SFEU−API.
RESET_N 25 I/PU Optional reset pin. Internal pull−up resistor is permanently enabled, nevertheless
it is recommended to connect this pin to VDD_IO if it is not used.
GND 26 P Ground
VDD_IO 27 P Unregulated power supply
GPIO0 28 I/O/A/PU General purpose IO, selectable ADC functionality, selectable SD DAC functionality,
selectable clock functionality
GPIO1 29 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO2 30 I/O/A/PU General purpose IO, selectable ADC functionality
NC 31 N Do not connect
NC 32 N Do not connect
GPIO3 33 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO12 34 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO13 35 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO14 36 I/O/PU General purpose IO
NC 37 N Do not connect
NC 38 N Do not connect
GND Center pads P Ground on 6 center pads of SIP38, must be connected
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Pinout Drawing
GPIO14
GPIO13
GPIO12
GPIO2
GPIO1
GPIO0
AT command and API versions, so for these
NC
NC
NC
NC
pins AX−SIP−SFEU/AX−SIP−SFEU−API
explanations are shown respectively.
38 37 36 35 34 33 32 31 30 29 28
GND 1 27 VIO
GND 2 26 GND
ANT 3 25 RESET_N
GND 4 24 NC/DBG_EN
AX−SIP−SFEU / AX−SIP−SFEU−API
NC 5 23 TXLED/DBG_CLK
GND 6 22 RXLED/DBG_DATA
NC 7 21 UARTRX
NC 8 20 UARTTX
9 10 11 12 13 14 15 16 17 18 19
GPIO10
GPIO11
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
CPULED
RADIOLED
GPIO9
NC
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SPECIFICATIONS
Pi Absolute maximum input power at receiver input ANT pin in RX mode 10 dBm
IO Output Current 40 mA
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DC Characteristics
Table 4. SUPPLIES
(Conditions for all current and charge values unless otherwise specified are for the DVK−SIP−SFEU−1−GEVK hardware configuration.)
VDDIO R1 I/O voltage ramp for reset activation Ramp starts at VDD IO ≤ 0.1 V 0.1 V/ms
(Note 2)
VDDIO R2 I/O voltage ramp for reset activation Ramp starts at 0.1 V < VDD IO < 0.7 V 3.3 V/ms
(Note 2)
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Figure 3. Typical Current Waveform for a Maximum Length Frame with Downlink Receive
at Nominal Transmitter Power
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Table 5. LOGIC
Symbol Description Condition Min Typ Max Units
DIGITAL INPUTS
VT+ Schmitt trigger low to high threshold point VDD_IO = 3.3 V 1.55 V
AC Characteristics
Table 6. TRANSMITTER
(Conditions for transmitter specifications unless otherwise specified are for DVK−SIP−SFEU−1−GVK hardware configuration and at
868.130 MHz frequency.)
Symbol Description Condition Min Typ Max Units
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Table 7. RECEIVER
(Conditions for receiver specifications unless otherwise specified are for DVK−SIP−SFEU−1−GEVK hardware configuration and at
869.525 MHz frequency.)
Symbol Description Condition Min Typ Max Units
ISBER868 Sensitivity Evaluated at BER > 10−3. AT command used: −125 dBm
AT$PN=4,5
BLK2M−868 Blocking level at Evaluated at BER > 10−3. Wanted signal is +3 dB above −53 dBm
±2 MHz offset the typical sensitivity, the blocker signal is CW.
AT command used: AT$PN=4,5.
BLK10M−868 Blocking level at Evaluated at BER > 10−3. Wanted signal is +3 dB above −32 dBm
±10 MHz offset the typical sensitivity, the blocker signal is CW.
AT command used: AT$PN=4,5.
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VFS_DIFF01 Full swing input for differential signals Gain ×1 −500 500 mV
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Table 9. COMMANDS
Command Name Description
AT Dummy Command Just returns ‘OK’ and does nothing else. Can be used to check
communication.
AT$SB=bit[,bit] Send Bit Send a bit status (0 or 1). Optional bit flag indicates if AX−SIP−SFEU
should receive a downlink frame.
AT$SF=frame[,bit] Send Frame Send payload data, 1 to 12 bytes. Optional bit flag indicates if
AX−SIP−SFEU should receive a downlink frame.
ATSuint? Get Register Query a specific configuration register’s value. See Table 10 “Registers”
for a list of registers.
ATSuint=int Set Register Change a configuration register.
ATSuint=? Get Register Range Returns the allowed range of the register values.
AT$IF=uint Set TX Frequency Set the output carrier macro channel for Sigfox frames.
AT$IF? Get TX Frequency Get the currently chosen TX frequency.
AT$DR=uint Set RX Frequency Set the reception carrier macro channel for Sigfox frames.
AT$DR? Get RX Frequency Get the currently chosen RX frequency.
AT$CW=uint,bit[,uint_opt] Continuous Wave To run emission tests for Sigfox certification it is necessary to send a
continuous wave, i.e. just the base frequency without any modulation.
Parameters:
AT$T? Get Temperature Measure internal temperature and return it in 1/10th of a degree Celsius.
AT$V? Get Voltages Return current voltage and voltage measured during the last
transmission in mV.
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AT:Pn=? Get GPIO Pin Range Print a list of possible modes for a pin. The table below lists the
response.
Pin Modes
P0 0, 1, Z, U, A, T
P1 0, 1, Z, U, A
P2 0, 1, Z, U, A
P3 0, 1, Z, U, A
P4 0, 1, Z, U, T
P5 0, 1, Z, U
P6 0, 1, Z, U
P7 0, 1, Z, U
P8 0, 1, Z, U
P9 0, 1, Z, U
P10 0, 1, Z, U
P11 0, 1, Z, U
P12 0, 1, Z, U, A
P13 0, 1, Z, U, A
P14 0, 1, Z, U
AT:Pn=mode Set GPIO Pin Set the GPIO pin mode.
For a list of the modes see the command AT:Pn?
AT:ADC Pn[−Pn[ (1V|10V)]]? Get GPIO Pin Analog Voltage Measure the voltage applied to a GPIO pin. The command also allows
measurement of the voltage difference across two GPIO pins. In
differential mode, the full scale range may also be specified as 1 V or
10 V. Note however that the pin input voltages must not exceed the
range 0…VDD_IO. The command returns the result as fraction of the
full scale range (1 V if none is specified). The GPIO pins referenced
should be initialized to analog mode before issuing this command.
AT:SPI[(A|B|C|D)]=bytes SPI Transaction This command clocks out bytes on the SPI port. The clock frequency is
312.5 kHz. The command returns the bytes read on MISO during output.
Optionally the clocking mode may be specified (default is A):
Mode Clock Inversion Clock Phase
A normal normal
B normal alternate
C inverted normal
D inverted alternate
SEL(GPIOx)
MOSI D7 D6 D5 D4 D3 D2 D1 D0
MISO D7 D6 D5 D4 D3 D2 D1 D0
A
B
SCK
C
D
Note that SEL, if needed, is not generated by this command, and must
instead be driven using standard GPIO commands (AT:Pn=0|1).
AT:CLK=freq,reffreq Set Clock Generator Output a square wave on the pin(s) set to T mode. The frequency of
the square wave is (freq / 216) × reffreq. Possible values for reffreq are
20000000, 10000000, 5000000, 2500000, 1250000, 625000, 312500,
156250. Possible values for freq are 0…65535.
AT:CLK=OFF Turn off Clock Generator Switch off the clock generator
AT:CLK? Get Clock Generator Return the settings of the clock generator. Two numbers are returned,
freq and reffreq.
AT:DAC=value Set SD DAC Output a SD DAC value on the pin(s) set to T mode. Parameter value
may be in the range −32768…32767. The average output voltage is
(1/2 + value / 217) × VDD.
An external low pass filter is needed to get smooth output voltages.
The modulation frequency is 20 MHz. A possible low pass filter choice
is a simple RC low pass filter with R = 10 kW and C = 1 mF.
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302 Power Level The output power of the radio. Note: this set- 14 0−14 0: −1dBm
ting is used for all TX modes except AT$CW. 14: 13 dBm
410 Encryption Key Set to zero for normal operation. 0 0−1 0: private key
Configuration Set to one for use with the Sigfox Network 1: public key
Emulator Kit (SNEK).
411 Specific ID and Key for Set to zero for use of regular device ID and 0 0−1 0: regular
certification key. sample
Set to one to use specific ID and key for test 1: test
sample devices for Sigfox certification. sample
500 RSSI Offset RSSI offset value can be applied to fine tune 0 −128…127 dB
the RSSI level that the device reports.
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F A B
Solder Mask A = Clearance from PCB thermal pad to solder mask opening, 0.0635 mm
minimum
PCB
B = Clearance from edge of PCB thermal pad to PCB land, 0.2 mm minimum
Thermal Pad
C = Clearance from PCB land edge to solder mask opening to be as tight as
PCB Land possible to ensure that some solder mask remains between PCB pads
Solder Mask D = PCB land length = SIP solder pad length + 0.1 mm
Opening E = PCB land width = SIP solder pad width + 0.1 mm
E F = Clearance from solder mask opening to the edge of the package,
0.1 mm minimum to avoid shorts to the package metal shielding
C D
Figure 6. PCB Land and Solder Mask Recommendations
Device Information
The following device information can be queried using
the AT−Commands AT$I=4, AT$I=5 for the firmware
version and AT$I=2, AT$I=3 for the hardware version.
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SIP38 9x7
CASE 127EU
ISSUE A
DATE 14 MAR 2018
GENERIC
MARKING DIAGRAM*
XXXXXXXXXXX
XXXXXXXXXXX
AWLWLYYWW
*This information is generic. Please refer to
A = Assembly Location device data sheet for actual part marking.
WL = Wafer Lot Pb−Free indicator, “G” or microdot “ G”,
YY = Year may or may not be present. Some products
WW = Work Week may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON77413G Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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