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Ax Sip Sfeu D

The document describes the AX-SIP-SFEU and AX-SIP-SFEU-API ultra-low power System-in-Package (SiP) solutions for Sigfox networks. The SiPs contain all necessary components for transmit and receive functionality on the Sigfox network in a small 7x9mm package. They operate with ultra-low power consumption and support AT commands or an API for control and configuration. The SiPs are Sigfox verified and CE certified.

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0% found this document useful (0 votes)
20 views

Ax Sip Sfeu D

The document describes the AX-SIP-SFEU and AX-SIP-SFEU-API ultra-low power System-in-Package (SiP) solutions for Sigfox networks. The SiPs contain all necessary components for transmit and receive functionality on the Sigfox network in a small 7x9mm package. They operate with ultra-low power consumption and support AT commands or an API for control and configuration. The SiPs are Sigfox verified and CE certified.

Uploaded by

Indraz Nil
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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AX-SIP-SFEU,

AX-SIP-SFEU-API
Sigfox) RF Transceiver
System in Package (SiP) for
Up-Link and Down-Link
Applications www.onsemi.com

Ultra−Low Power, Ultra−Miniature,


AT Command/API Controlled,
Sigfox Verified and CE Certified

OVERVIEW • Conformal shielding


Circuit Description • Supply range 2.1 V − 3.6 V
AX−SIP−SFEU and AX−SIP−SFEU−API are ultra−low • −30°C to 85°C
power, ultra−miniature System−in−Package (SiP) solutions • Temperature sensor
for a node on the Sigfox network with both up− and
• Supply voltage measurements
down−link functionality.
With a footprint of just 7 mm × 9 mm and conformal • 15 GPIO pins
♦ 6 GPIO pins with selectable voltage measure
shielding, the AX−SIP−SFEU SiP, contains all the necessary
components and firmware for transmit and receive functionality, differential (1 V or 10 V range) or
operation on the European (RC1) Sigfox network. No single ended (1 V range) with 10 bit resolution
additional passive components or reference frequency ♦ 2 GPIO pins with selectable sigma delta DAC
providing parts are required on the customer’s PCB. output functionality
A single−ended 50 W antenna port is provided. ♦ 2 GPIO pins with selectable output clock
The AX−SIP−SFEU connects to the customer product ♦ 3 GPIO pins selectable as SPI master interface
using a logic level RS232 UART. AT commands are used to ♦ Integrated RX/TX switching with single−ended
send frames and configure radio parameters. 50 W antenna pin
The AX−SIP−SFEU−API variant is intended for Power Consumption:
customers wishing to write their own application software • Ultra−low Power Consumption:
based on the AX−SIP−SF−LIB−1−GEVK library. ♦ Charge required to send a Sigfox OOB packet at
The SiP is fully Sigfox Verified and CE certified, vastly nominal transmitter power (13 dBm typical at
reducing risk and time to market delays. nominal temperature): 0.24 C
♦ Deep Sleep mode current: 180 nA
Features
♦ Sleep mode current: 1.2 mA
Functionality and Ecosystem: ♦ Standby mode current: 0.55 mA
• Single package, zero external components, full Sigfox ♦ Continuous radio RX−mode at 869.525 MHz:
up−link and down−link functionality controlled by AT 14 mA
commands or API ♦ Continuous radio TX−mode at 868.130 MHz:
• The AX−SIP−SFEU and AX−SIP−SFEU−API SiPs are 45 mA @ nominal transmitter power (13 dBm)
part of a whole development and product ecosystem High Performance Narrow−band Sigfox RF Transceiver
available from ON Semiconductor for any Sigfox • Receiver
requirement. Other parts of the ecosystem include
♦ Carrier frequency 869.525 MHz
♦ Ready to go development kit
♦ Data−rate 600 bps FSK
DVK−SIP−SFEU−[API]−X−GEVK including
♦ Sensitivity
a 2 year Sigfox subscription
−125 dBm @ 600 bps, 869.525 MHz, GFSK
• Sigfox Verified ♦ 0 dBm maximum input power
• CE Certified • Transmitter
General Features: ♦ Carrier frequency 868.13 MHz
• SIP38 9 mm × 7 mm package ♦ Data−rate 100 bps PSK

© Semiconductor Components Industries, LLC, 2017 1 Publication Order Number:


February, 2019 − Rev. 3 AX−SIP−SFEU/D

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AX−SIP−SFEU, AX−SIP−SFEU−API

♦ High efficiency, high linearity integrated power Applications


amplifier • Sigfox networks up−link and down−link
♦ Maximum output power 13 dBm
♦ Power level programmable in 1 dBm steps

BLOCK DIAGRAM

AX−SIP−SFEU / AX−SIP−SFEU−API

RF Synthesis

RX/TX Receive
Switch and Communication
ANT
Antenna Controller
Interface Transmit

UARTRX
UART
UARTTX

DAC
GPIO[14:0] GPIO
ADC CPU

RADIO_LED
CPU_LED
Dedicated
Status
TX_LED
Outputs
RX_LED

Program
Memory
Power Mode (FLASH)
RAM
Control Sigfox identity (ID, PAC)
Sigfox compliant
application
(AX−SFEU only)
VDD_IO
RESET_N
GND

Figure 1. Functional Block Diagram of the AX−SIP−SFEU / AX−SIP−SFEU−API

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 1. PIN FUNCTION DESCRIPTIONS


Symbol Pin(s) Type Description
GND 1 P Ground
GND 2 P Ground
ANT 3 A Single−ended 50 W antenna input/output
GND 4 P Ground
NC 5 N Do not connect
GND 6 P Ground
NC 7 N Do not connect
NC 8 N Do not connect
NC 9 N Do not connect
GPIO11 10 I/O/PU General purpose IO
GPIO10 11 I/O/PU General purpose IO
GPIO8 12 I/O/PU General purpose IO
GPIO7 13 I/O/PU General purpose IO, selectable SPI functionality (MISO)
GPIO6 14 I/O/PU General purpose IO, selectable SPI functionality (MOSI)
GPIO5 15 I/O/PU General purpose IO, selectable SPI functionality (SCK)

GPIO4 16 I/O/PU General purpose IO, selectable SD DAC functionality, selectable clock functionality
CPU_LED 17 O CPU activity indicator
RADIO_LED 18 O Radio activity indicator
GPIO9 19 I/O/PU General purpose IO, wakeup from deep sleep
UARTTX 20 O UART transmit
UARTRX 21 I/PU UART receive
RX_LED/ 22 O Receive activity indicator in AX−SIP−SFEU.
DBG_DATA I/O Debugger data line in AX−SIP−SFEU−API.
TX_LED/ 23 O Transmit activity indicator in AX−SIP−SFEU.
DBG_CLK I Debugger clock line in AX−SIP−SFEU−API.
NC/ 24 PD Do not connect in AX−SIP−SFEU.
DBG_EN PD Debugger enable line in AX−SIP−SFEU−API.
RESET_N 25 I/PU Optional reset pin. Internal pull−up resistor is permanently enabled, nevertheless
it is recommended to connect this pin to VDD_IO if it is not used.
GND 26 P Ground
VDD_IO 27 P Unregulated power supply
GPIO0 28 I/O/A/PU General purpose IO, selectable ADC functionality, selectable SD DAC functionality,
selectable clock functionality
GPIO1 29 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO2 30 I/O/A/PU General purpose IO, selectable ADC functionality
NC 31 N Do not connect
NC 32 N Do not connect
GPIO3 33 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO12 34 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO13 35 I/O/A/PU General purpose IO, selectable ADC functionality
GPIO14 36 I/O/PU General purpose IO
NC 37 N Do not connect
NC 38 N Do not connect
GND Center pads P Ground on 6 center pads of SIP38, must be connected

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AX−SIP−SFEU, AX−SIP−SFEU−API

A = analog input or input/output Table 2.


I = digital input signal
Pin Possible GPIO Modes
O = digital output signal
PU = pull−up GPIO0 0, 1, Z, U, A, T
I/O = digital input/output signal GPIO1 0, 1, Z, U, A
N = not to be connected
GPIO2 0, 1, Z, U, A
P = power or ground
PD = pull−down GPIO3 0, 1, Z, U, A
GPIO4 0, 1, Z, U, T
All digital inputs are Schmitt trigger inputs, digital input
GPIO5 0, 1, Z, U
and output levels are LVCMOS/LVTTL compatible. Pins
GPIO[3:0] and GPIO[13:12] must not be driven above GPIO6 0, 1, Z, U
VDD_IO, all other digital inputs are 5 V tolerant. All GPIO GPIO7 0, 1, Z, U
pins and UARTRX start up as input with pull−up. For
GPIO8 0, 1, Z, U
explanations on how to use the GPIO pins, see chapter “AT
Commands”. GPIO9 0, 1, Z, U
GPIO10 0, 1, Z, U
0 = pin drives low GPIO11 0, 1, Z, U
1 = pin drives high
Z = pin is high impedance input GPIO12 0, 1, Z, U, A
U = pin is input with pull−up GPIO13 0, 1, Z, U, A
A = pin is analog input GPIO14 0, 1, Z, U
T = pin is driven by clock or DAC

Pinout Drawing
GPIO14

GPIO13

GPIO12

Pins 22−24 have different functionalities in


GPIO3

GPIO2

GPIO1

GPIO0
AT command and API versions, so for these
NC

NC

NC

NC
pins AX−SIP−SFEU/AX−SIP−SFEU−API
explanations are shown respectively.
38 37 36 35 34 33 32 31 30 29 28

GND 1 27 VIO
GND 2 26 GND

ANT 3 25 RESET_N
GND 4 24 NC/DBG_EN
AX−SIP−SFEU / AX−SIP−SFEU−API
NC 5 23 TXLED/DBG_CLK
GND 6 22 RXLED/DBG_DATA
NC 7 21 UARTRX

NC 8 20 UARTTX

9 10 11 12 13 14 15 16 17 18 19
GPIO10
GPIO11

GPIO8

GPIO7

GPIO6

GPIO5

GPIO4

CPULED

RADIOLED

GPIO9
NC

Figure 2. Pinout Drawing (Top View)

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AX−SIP−SFEU, AX−SIP−SFEU−API

SPECIFICATIONS

Table 3. ABSOLUTE MAXIMUM RATINGS


Symbol Description Condition Min Max Units

VDD_IO Supply voltage −0.5 3.8 V

IDD Supply current 200 mA

Ptot Total power consumption 800 mW

Pi Absolute maximum input power at receiver input ANT pin in RX mode 10 dBm

II1 DC current into any pin except ANT −10 10 mA

II2 DC current into pin ANT −100 100 mA

IO Output Current 40 mA

Via Input voltage ANT pin −0.5 3.8 V

Input voltage digital pins −0.5 5.5 V

Ves Electrostatic handling HBM −2000 2000 V

Tamb Operating temperature −30 85 °C

Tstg Storage temperature −30 85 °C

Tj Junction Temperature 150 °C


Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

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AX−SIP−SFEU, AX−SIP−SFEU−API

DC Characteristics

Table 4. SUPPLIES
(Conditions for all current and charge values unless otherwise specified are for the DVK−SIP−SFEU−1−GEVK hardware configuration.)

Symbol Description Condition Min Typ Max Units

TAMB Operational ambient temperature −30 27 85 °C

VDDIO I/O and voltage regulator supply 2.1 3.0 3.6 V


voltage

VDDIO R1 I/O voltage ramp for reset activation Ramp starts at VDD IO ≤ 0.1 V 0.1 V/ms
(Note 2)

VDDIO R2 I/O voltage ramp for reset activation Ramp starts at 0.1 V < VDD IO < 0.7 V 3.3 V/ms
(Note 2)

IDS Deep sleep mode current AT$P = 2 180 nA

ISLP Sleep mode current AT$P = 1 1.2 mA

ISTDBY Standby mode current (Note 3) 0.55 mA

IRX_CONT Current consumption continuous RX AT$SE 14 mA

QSFX_OOB_14 Charge to send a Sigfox out of band AT$SO 0.24 C


message, nominal transmitter power
(Note 4)

QSFX_BIT_14 Charge to send a bit, nominal AT$SB = 0 0.16 C


transmitter power (Note 4)

QSFX_BITDL_14 Charge to send a bit with downlink AT$SB = 0,1 0.44 C


receive, nominal transmitter power
(Note 4)

QSFX_LFR_14 Charge to send the longest possible AT$SF = 00112233445566778899aabb 0.29 C


Sigfox frame (12 byte), nominal
transmitter power (Note 4)

QSFX_LFRDL_14 Charge to send the longest possible AT$SF = 00112233445566778899aabb,1 0.57 C


Sigfox frame (12 byte) with downlink
receive, nominal transmitter power
(Note 4)

ITXMOD14AVG Modulated Transmitter Current Pout = 13 dBm; average 45 mA


(Note 5)
2. If VDD_IO ramps cannot be guaranteed, an external reset circuit is recommended, see the AX8052 Application Note: Power On Reset.
3. 20 MHz Fast RC oscillator, voltage conditioning and supervisory circuit running.
4. Power setting 14, which gives 13 dBm typical power at nominal temperature.
5. Current consumption value is given for a matching network that is optimized for maximum power (setting 14, also nominal setting).

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AX−SIP−SFEU, AX−SIP−SFEU−API

Typical Current Waveform

Figure 3. Typical Current Waveform for a Maximum Length Frame with Downlink Receive
at Nominal Transmitter Power

Battery Life Example


• 2 AAA Alkaline batteries in series • Device in Sleep
• One OOB frame transmitter per day at nominal • Neglecting battery self−discharge
transmitter power (Pout = 13 dBm typical)
• Four maximum length frames with downlink receive
per day at nominal transmitter power
(Pout = 13 dBm typical)

2 AAA alkaline capacity 1500 mAh × 3600 s/h 5400 C

Sleep charge per day 1.2 mA × 86400 s 0.10 C/day

OOB frame transmission 0.24 C/day

Frame transmission with downlink 4 × 0.57 C/day 2.28 C/day

Total Charge consumption 2.62 C/day

Battery life 5.6 Years

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 5. LOGIC
Symbol Description Condition Min Typ Max Units
DIGITAL INPUTS

VT+ Schmitt trigger low to high threshold point VDD_IO = 3.3 V 1.55 V

VT− Schmitt trigger high to low threshold point 1.25 V

VIL Input voltage, low 0.8 V

VIH Input voltage, high 2.0 V

VIPA Input voltage range, GPIO[3:0] and GPIO[13:12] −0.5 VDD_IO V

VIPBC Input voltage range, GPIO[9:4], UARTRX −0.5 5.5 V

IL Input leakage current −10 10 mA

RPU Programmable Pull−Up Resistance 65 kW


DIGITAL OUTPUTS

IOH Output Current, high VOH = 2.4 V 8 mA


GPIO[14:0], UARTTX, TXLED, RXLED, TXLED,
CPULED

IOL Output Current, low VOL = 0.4 V 8 mA


GPIO[14:0], UARTTX, TXLED, RXLED, TXLED,
CPULED

IOZ Tri−state output leakage current −10 10 mA

AC Characteristics

Table 6. TRANSMITTER
(Conditions for transmitter specifications unless otherwise specified are for DVK−SIP−SFEU−1−GVK hardware configuration and at
868.130 MHz frequency.)
Symbol Description Condition Min Typ Max Units

SBR Signal bit rate 100 bps

PTXmin Lowest Transmitter output power (Note 6) AT$CW=868130000,1,0 −1 dBm

PTXmax Highest Transmitter output power (Note 6) AT$CW=868130000,1,14 13 dBm

PTXstep Programming step size output power 1 dB

dTXtemp Transmitter power variation vs. temperature −30°C to +85°C ±0.8 dB

dTXVdd Transmitter power variation vs. VDD_IO 2.1 to 3.6 V ±0.03 dB

PTXharm2 Emission @ 2nd harmonic −58 dBc

PTXharm3 Emission @ 3rd harmonic −80


6. The output power of the AX−SIP−SFEU / AX−SIP−SFEU−API can be programmed in 1 dB steps, by changing transmitter power setting from
0 − 14. The lowest power setting is 0, which gives −1 dBm typical power at nominal temperature. The highest power setting is 14, which gives
13 dBm typical power at nominal temperature and close to 14 dBm typical power at minimum temperature.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Figure 4. Typical Spectrum with Harmonics at Nominal Output Power

Table 7. RECEIVER
(Conditions for receiver specifications unless otherwise specified are for DVK−SIP−SFEU−1−GEVK hardware configuration and at
869.525 MHz frequency.)
Symbol Description Condition Min Typ Max Units

SBR Signal bit rate 600 bps

ISBER868 Sensitivity Evaluated at BER > 10−3. AT command used: −125 dBm
AT$PN=4,5

BLK2M−868 Blocking level at Evaluated at BER > 10−3. Wanted signal is +3 dB above −53 dBm
±2 MHz offset the typical sensitivity, the blocker signal is CW.
AT command used: AT$PN=4,5.

BLK10M−868 Blocking level at Evaluated at BER > 10−3. Wanted signal is +3 dB above −32 dBm
±10 MHz offset the typical sensitivity, the blocker signal is CW.
AT command used: AT$PN=4,5.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 8. ADC/TEMPERATURE SENSOR


Symbol Description Condition Min Typ Max Units

ADCRES ADC resolution 10 Bits

VADCREF ADC reference voltage 0.95 1 1.05 V

ZADC00 Input capacitance 2.5 pF

DNL Differential nonlinearity ±1 LSB

INL Integral nonlinearity ±1 LSB

OFF Offset 3 LSB

GAIN_ERR Gain error 0.8 %


ADC IN DIFFERENTIAL MODE

VABS_DIFF Absolute voltages & common mode voltage in 0 VDD_IO V


differential mode at each input

VFS_DIFF01 Full swing input for differential signals Gain ×1 −500 500 mV

VFS_DIFF10 Gain ×10 −50 50 mV


ADC IN SINGLE ENDED MODE

VMID_SE Mid code input voltage in single ended mode 0.5 V

VIN_SE00 Input voltage in single ended mode 0 VDD_IO V

VFS_SE01 Full swing input for single ended signals Gain ×1 0 1 V


TEMPERATURE SENSOR

TRNG Temperature range AT$T? −30 85 °C

TACC Typical temperature sensor accuracy (Note 7) AT$T? ±2 ±6 ±10 °C


7. Not guaranteed, value provided for information only and results may vary as this temperature sensor is not calibrated.

COMMAND INTERFACE Power Modes


General Information
The chapter “Command Interface” is a documentation of
the AT−Command set for devices which do not have an
API−interface. To see whether the device is capable of
receiving AT−Commands, please refer to the table “Device
Versions”. If the device has been shipped with the
API−Interface, please refer to the SW manual and
“apiexample” code delivered with
AX−SIP−SF−LIB−1−GEVK for an introduction on how to
setup a project and how to use the API−Interface.

Serial Parameters: 9600, 8, N, 1


The AX−SIP−SFEU uses the UART (pins UARTTX,
UARTRX) to communicate with a host and uses a bitrate of
9600 baud, no parity, 8 data bits and one stop bit.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Standby Command Syntax


After Power−Up and after finishing a Sigfox A command starts with ‘AT’ (everything is case
transmission, AX−SIP−SFEU enters Standby mode. In sensitive!), continues with the actual command followed by
Standby mode, AX−SIP−SFEU listens on the UART for parameters (if any) and ends with any kind of whitespace
commands from the host. Also, OOB frames are transmitted (space, tab, newline etc.)
whenever the OOB timer fires. To conserve power, the If incorrect syntax is detected (“parsing error”) all input
AX−SIP−SFEU can be put into Sleep or turned off (Deep is ignored up until the next whitespace character.
Sleep) completely. Also note that any number can be entered in any format
Sleep (Hexadecimal, Decimal, Octal and binary) by adding the
The command AT$P=1 is used to put the AX−SIP−SFEU corresponding prefix (‘0x’, ‘0’, ‘0b’). The only exception is
into Sleep mode. In this mode, only the wakeup timer for the ‘Send Frame’ command (AT$SF) which expects a list of
out−of−band messages is still running. To wake the hexadecimal digits without any prefix.
AX−SIP−SFEU up from Sleep mode toggle the serial Return Codes
UARTRX pin, e.g. by sending a break (break is an RS232 A successful command execution is indicated by sending
framing violation, i.e. at least 10 bit durations low). When ‘OK’. If a command returns a value (e.g. by querying
an Out of Band (OOB) message is due, AX−SIP−SFEU a register) only the value is returned.
automatically wakes up to transmit the message, and then Examples
returns to Sleep mode.
Bold text is sent to AX−SIP−SFEU.
Deep Sleep AT$I=0
In Deep Sleep mode, the AX−SIP−SFEU is completely AX−SF 1.1−RC1
turned off and only draws negligible leakage current.
Here, we execute command ‘I’ to query some general
Deep Sleep mode can be activated with AT$P=2. To
information.
wake−up from Deep Sleep mode, GPIO9 is pulled to GND.
AT$SF=aabb1234
When using Deep Sleep mode, keep two things in mind:
OK
Everything is turned off, timers are not running at all and all
settings will be lost (use AT$WR to save settings to flash This sends a Sigfox frame containing {0xAA : 0xBB : 0x12
before entering Deep Sleep mode). Out−of−band messages : 0x34} without waiting for a response telegram.
will therefore not be sent. The pins states are frozen in Deep AT$SF=0011223344,1
Sleep mode. The user must ensure that this will not result in OK
condition which would draw a lot of current. RX=AA BB CC DD
This sends a Sigfox frame containing {0x00 : 0x11 : 0x22 :
AT Commands 0x33 : 0x44}, then waits for a downlink response telegram,
Numerical Syntax which in this example contains {0xAA : 0xBB : 0xCC :
hexdigit ::= [0−9A−Fa−f] 0xDD}.
Hexnum ::= “0x” hexdigit+ AT$CB=0xAA,1
decnum ::= “0” | [1−9] [0−9]* OK
octnum ::= “0” [0−7]+ The ‘CB’ command sends out a continuous pattern of bits,
binnum ::= “0b” [01]+ in this case 0xAA = 0b10101010.
bit ::= [01] AT$P=1
optnum ::= “−1” OK
Frame ::= (hexdigit hexdigit)+ This transitions the device into sleep mode. Out−of−band
uint ::= hexnum | decnum | octnum | binnum transmissions will still be triggered. The UART is powered
uint_opt ::= uint | optnum down. The device can be woken up by a low level on the
UART signal, i.e. by sending break.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 9. COMMANDS
Command Name Description

AT Dummy Command Just returns ‘OK’ and does nothing else. Can be used to check
communication.

AT$SB=bit[,bit] Send Bit Send a bit status (0 or 1). Optional bit flag indicates if AX−SIP−SFEU
should receive a downlink frame.

AT$SF=frame[,bit] Send Frame Send payload data, 1 to 12 bytes. Optional bit flag indicates if
AX−SIP−SFEU should receive a downlink frame.

AT$SO Manually send out of band Send the out−of−band message.


message
AT$TR? Get the transmit repeat Returns the number of transmit repeats. Default: 2
AT$TR=? Get transmit repeat range Returns the allowed range of transmit repeats.
AT$TR=uint Set transmit repeat Sets the transmit repeat, sets only for transmit with downlink frame.

ATSuint? Get Register Query a specific configuration register’s value. See Table 10 “Registers”
for a list of registers.
ATSuint=int Set Register Change a configuration register.
ATSuint=? Get Register Range Returns the allowed range of the register values.
AT$IF=uint Set TX Frequency Set the output carrier macro channel for Sigfox frames.
AT$IF? Get TX Frequency Get the currently chosen TX frequency.
AT$DR=uint Set RX Frequency Set the reception carrier macro channel for Sigfox frames.
AT$DR? Get RX Frequency Get the currently chosen RX frequency.
AT$CW=uint,bit[,uint_opt] Continuous Wave To run emission tests for Sigfox certification it is necessary to send a
continuous wave, i.e. just the base frequency without any modulation.
Parameters:

Name Range Description

Frequency 800000000− Continuous wave frequency in Hz.


999999999, 0 Use 868130000 for Sigfox or 0 to
keep previous frequency.

Mode 0, 1 Enable or disable carrier wave.

Power 0−14 Signal power setting | Default: 14


AT$CB=uint_opt,bit Test Mode: TX constant byte For emission testing it is useful to send a specific bit pattern. The first
parameter specifies the byte to send. Use ‘−1’ for a (pseudo−)random
pattern. Parameters:

Name Range Description

Pattern 0−255, −1 Byte to send. Use ‘−1’ for a


(pseudo−)random pattern.

Mode 0, 1 Enable or disable pattern test


mode.

AT$T? Get Temperature Measure internal temperature and return it in 1/10th of a degree Celsius.

AT$V? Get Voltages Return current voltage and voltage measured during the last
transmission in mV.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 9. COMMANDS (continued)


Command Name Description

AT$I=uint Information Display various product information:


0: Software Name & Version
Example Response: AX−SF 1.1−RC1
1: Contact Details
Example Response: [email protected]
2: Silicon revision lower byte
Example Response: 90
3: Silicon revision upper byte
Example Response: 51
4: Major Firmware Version
Example Response: 1
5: Minor Firmware Version
Example Response: 1
7: Firmware Variant (Frequency Band etc. (EU/US))
Example Response: RC1
8: Firmware VCS Version
Example Response: 0
9: Sigfox Library Version
Example Response: UDL1−1.8.9
10: Device ID
Example Response: 00012345
11: PAC
Example Response: 0123456789ABCDEF
AT$P=uint Set Power Mode To conserve power, the AX−SIP−SFEU can be put to sleep manually.
Depending on power mode, you will be responsible for waking up the
AX−SIP−SFEU again!
0: software reset (settings will be reset to values in flash)
1: sleep (send a break to wake up)
2: deep sleep (toggle GPIO9 or RESET_N pin to wake up;
the AX−SIP−SFEU is not running and all settings will be reset!)
AT$WR Save Config Write all settings to flash (RX/TX frequencies, registers) so they survive
reset/deep sleep or loss of power.
Use AT$P=0 to reset the AX−SIP−SFEU and load settings from flash.
AT:Pn? Get GPIO Pin Return the setting of the GPIO Pin n; n can range from 0 to 14.
A character string is returned describing the mode of the pin, followed
by the actual value. If the pin is configured as analog pin, then the
voltage (range 0…1 V) is returned. The mode characters have the
following meaning:
Mode Description
0 Pin drives low
1 Pin drives high
Z Pin is high impedance input
U Pin is input with pull−up
A Pin is analog input (GPIO pin 0…3 and 12…13 only)
T Pin is driven by clock or DAC (GPIO pin 0 and 4 only)
The default mode after exiting reset is U on all GPIO pins.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 9. COMMANDS (continued)


Command Name Description

AT:Pn=? Get GPIO Pin Range Print a list of possible modes for a pin. The table below lists the
response.
Pin Modes
P0 0, 1, Z, U, A, T
P1 0, 1, Z, U, A
P2 0, 1, Z, U, A
P3 0, 1, Z, U, A
P4 0, 1, Z, U, T
P5 0, 1, Z, U
P6 0, 1, Z, U
P7 0, 1, Z, U
P8 0, 1, Z, U
P9 0, 1, Z, U
P10 0, 1, Z, U
P11 0, 1, Z, U
P12 0, 1, Z, U, A
P13 0, 1, Z, U, A
P14 0, 1, Z, U
AT:Pn=mode Set GPIO Pin Set the GPIO pin mode.
For a list of the modes see the command AT:Pn?

AT:ADC Pn[−Pn[ (1V|10V)]]? Get GPIO Pin Analog Voltage Measure the voltage applied to a GPIO pin. The command also allows
measurement of the voltage difference across two GPIO pins. In
differential mode, the full scale range may also be specified as 1 V or
10 V. Note however that the pin input voltages must not exceed the
range 0…VDD_IO. The command returns the result as fraction of the
full scale range (1 V if none is specified). The GPIO pins referenced
should be initialized to analog mode before issuing this command.
AT:SPI[(A|B|C|D)]=bytes SPI Transaction This command clocks out bytes on the SPI port. The clock frequency is
312.5 kHz. The command returns the bytes read on MISO during output.
Optionally the clocking mode may be specified (default is A):
Mode Clock Inversion Clock Phase
A normal normal
B normal alternate
C inverted normal
D inverted alternate

SEL(GPIOx)

MOSI D7 D6 D5 D4 D3 D2 D1 D0

MISO D7 D6 D5 D4 D3 D2 D1 D0
A
B
SCK
C
D
Note that SEL, if needed, is not generated by this command, and must
instead be driven using standard GPIO commands (AT:Pn=0|1).

AT:CLK=freq,reffreq Set Clock Generator Output a square wave on the pin(s) set to T mode. The frequency of
the square wave is (freq / 216) × reffreq. Possible values for reffreq are
20000000, 10000000, 5000000, 2500000, 1250000, 625000, 312500,
156250. Possible values for freq are 0…65535.
AT:CLK=OFF Turn off Clock Generator Switch off the clock generator
AT:CLK? Get Clock Generator Return the settings of the clock generator. Two numbers are returned,
freq and reffreq.

AT:DAC=value Set SD DAC Output a SD DAC value on the pin(s) set to T mode. Parameter value
may be in the range −32768…32767. The average output voltage is
(1/2 + value / 217) × VDD.
An external low pass filter is needed to get smooth output voltages.
The modulation frequency is 20 MHz. A possible low pass filter choice
is a simple RC low pass filter with R = 10 kW and C = 1 mF.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 9. COMMANDS (continued)


Command Name Description

AT:DAC=OFF Turn off SD DAC Switch off the DAC

AT:DAC? Get SD DAC Return the DAC value


AT$TM=mode,config Activates the Sigfox Testmode Available test modes:
0. TX BPSK
Send only BPSK with Synchro Bit + Synchro frame +
PN sequence: No hopping centered on the TX_frequency. Config
bits 0 to 6 define the number of repetitions. Bit 7 of config defines if
a delay is applied or not between the frames in the loop (1 means no
delay).
1. TX Protocol:
Tx mode with full protocol with Sigfox key: Send Sigfox protocol
frames with initiate downlink flag = True. Config defines the number
of repetitions.
2. RX Protocol:
This mode tests the complete downlink protocol in Downlink only.
Config defines the RX on time in seconds.
3. RX GFSK:
RX mode with known pattern with SB + SF + Pattern on
RX_frequency (internal comparison with received frame ⇔ known
pattern = AA AA B2 27 1F 20 41 84 32 68 C5 BA AE 79 E7 F6 DD
9B. Config defines the RX on time in seconds.
4. RX Sensitivity:
Does uplink + downlink frame with Sigfox key and specific timings.
This test is specific to Sigfox’s test equipment & software.
5. TX Synthesis:
Does one uplink frame on each Sigfox channel to measure
frequency synthesis step.

AT$SE Starts Convenience command for sensitivity tests


AT$TM=3,255 indefinitely
AT$SL[=frame] Send local loop Sends a local loop frame with optional payload of 1 to 12 bytes.
Default payload: 0x84, 0x32, 0x68, 0xC5, 0xBA, 0x53, 0xAE, 0x79,
0xE7, 0xF6, 0xDD, 0x9B.
AT$RL Receive local loop Starts listening for a local loop.
AT$TP=repetitions Transient power Used for transmitter transient power measurements. The command
measurements mode switches the transmitter ON and OFF. During ON state (pseudo)
random bit pattern is send. Repetitions is the number of performed
measurements, acceptable range is 1−255.
AT$PN=mode,repetitions Send & Receive PN9 Available modes:
bitstream for BER 0: send PN9 bit stream. Repetitions = 1 is required to start sending.
measurements Repetitions = 0 stops sending
3: receive PN9 bit stream, calculate BER with 3 digits precision
4: receive PN9 bit stream, calculate BER with 4 digits precision
5: receive PN9 bit stream, calculate BER with 5 digits precision
Mode = 3−5 receives the PN9 bitstream and decodes it into an actual
BER measurement. Reports the BER for each repetition.
Repetitions is the number of performed measurements, acceptable
range is 1−255. Higher precision result takes longer time to compute.
PN9 is 9−bit pseudo random binary sequence.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Table 10. REGISTERS


Number Name Description Default Range Units

300 Out Of Band AX−SIP−SFEU sends periodic static 24 0−24 hours


Period messages to indicate that it is alive.
Set to 0 to disable.

302 Power Level The output power of the radio. Note: this set- 14 0−14 0: −1dBm
ting is used for all TX modes except AT$CW. 14: 13 dBm

410 Encryption Key Set to zero for normal operation. 0 0−1 0: private key
Configuration Set to one for use with the Sigfox Network 1: public key
Emulator Kit (SNEK).

411 Specific ID and Key for Set to zero for use of regular device ID and 0 0−1 0: regular
certification key. sample
Set to one to use specific ID and key for test 1: test
sample devices for Sigfox certification. sample

500 RSSI Offset RSSI offset value can be applied to fine tune 0 −128…127 dB
the RSSI level that the device reports.

APPLICATION INFORMATION encouraged to plan for regulatory and Sigfox certification


early in the development process to avoid issues closer to
Certification their product release.
The AX−SIP−SFEU and AX−SIP−SFEU−API are Sigfox has extensive support online, visit
already Sigfox Verified and CE certified by https://build.sigfox.com for details about Sigfox Ready
ON Semiconductor. certification and many other topics.
Customers using this SiP, as with any product containing For local regulatory guidance, refer to the local
a radio, have the responsibility to ensure, at a product level, government’s websites. For the EU, visit
that their usage of this product complies with regulatory https://ec.europa.eu. In particular the Radio Equipment
requirements where it’s operated. Directive and CE marking rules apply.
And for Sigfox products, Sigfox requires a product level ON Semiconductor is not liable for customer’s failure to
certification called Sigfox Ready. The customer is comply with certification and regulatory obligations.

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AX−SIP−SFEU, AX−SIP−SFEU−API

Typical Application Diagrams


Typical AX−SIP−SFEU / AX−SIP−SFEU−API Application Diagram

Figure 5. Typical Application Diagram

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AX−SIP−SFEU, AX−SIP−SFEU−API

SIP38 RECOMMENDED PAD LAYOUT on the package thermal requirements, as


1. PCB footprint and DFM recommendations are determined by thermal simulation or actual testing.
shown in Figure 6. In particular be aware of the 3. Increasing the number of vias through the printed
spacing “F” to avoid shorting pads to the circuit board will improve the thermal
conductive conformal shield coating the SiP. conductivity to the reverse side ground plane and
2. Thermal vias should be used around the PCB external heat sink. In general, adding more metal
thermal pads (middle ground pads) to improve through the PC board under the SiP will improve
thermal conductivity from the device to a copper operational heat transfer, but will require careful
ground plane area on the reverse side of the attention to uniform heating of the board during
printed circuit board. The number of vias depends assembly.

F A B

Solder Mask A = Clearance from PCB thermal pad to solder mask opening, 0.0635 mm
minimum
PCB
B = Clearance from edge of PCB thermal pad to PCB land, 0.2 mm minimum
Thermal Pad
C = Clearance from PCB land edge to solder mask opening to be as tight as
PCB Land possible to ensure that some solder mask remains between PCB pads
Solder Mask D = PCB land length = SIP solder pad length + 0.1 mm
Opening E = PCB land width = SIP solder pad width + 0.1 mm
E F = Clearance from solder mask opening to the edge of the package,
0.1 mm minimum to avoid shorts to the package metal shielding

C D
Figure 6. PCB Land and Solder Mask Recommendations

Device Information
The following device information can be queried using
the AT−Commands AT$I=4, AT$I=5 for the firmware
version and AT$I=2, AT$I=3 for the hardware version.

Table 11. DEVICE VERSIONS


Firmware Version Hardware Version

Product Part Number [0] [1] [0] [1]

AX−SIP−SFEU AX−SIP−SFEU−1−01−TX30 0x01 0x01 0x90 0x51

AX−SIP−SFEU−API AX−SIP−SFEU−API−1−01−TX30 0x01 0x01 0x90 0x51

Sigfox is a registered trademark of Sigfox SARL.

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SIP38 9x7
CASE 127EU
ISSUE A
DATE 14 MAR 2018

GENERIC
MARKING DIAGRAM*

XXXXXXXXXXX
XXXXXXXXXXX
AWLWLYYWW
*This information is generic. Please refer to
A = Assembly Location device data sheet for actual part marking.
WL = Wafer Lot Pb−Free indicator, “G” or microdot “ G”,
YY = Year may or may not be present. Some products
WW = Work Week may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON77413G Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SIP38 9x7 PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
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