Microelectronics Chapter 05
Microelectronics Chapter 05
Frequency Response of
Single-stage Amplifiers
Winter Term 2022/23
Prof. Dr.-Ing. Matthias Kuhl
Overview
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RC Lowpass Filter – Time versus Frequency Domain
Kirchhoff loop 𝑣 = 𝑣 + 𝑅𝑖
𝑣 𝑣
𝜕𝑣
capacitor 𝑖=𝐶
𝜕𝑡
𝜕𝑣 𝜕 1
Kirchhoff loop 𝑣 = 𝑣 + 𝑅𝐶 → 𝑠, 𝜕𝑡 →
𝜕𝑡 𝜕𝑡 𝑠
Laplace domain 𝑣 = 𝑣 + 𝑠𝑅𝐶𝑣
𝑣 (𝑠) 1
transfer function 𝐻 𝑠 = = 𝑠 = 𝑗𝜔 = 𝑗2𝜋𝑓
𝑣 (𝑠) 1 + 𝑠𝑅𝐶
𝑣 (𝑗𝜔) 1
frequency response 𝐻(𝑗𝜔) = =
𝑣 (𝑗𝜔) 1 + 𝑗𝜔𝑅𝐶
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𝑣 1 1
transfer function = 𝑠 =𝜎 =− = −𝜔 = −2𝜋𝑓
𝑣 1 + 𝑠𝑅𝐶 𝑅𝐶
𝑥(𝑡)
xa(t)
𝑡
A single negative real pole yields an exponentially settling behavior.
The closer the pole to the origin and thus to the imaginary axis,
i.e., the larger the time-constant, the longer the settling!
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RC Lowpass Filter – Frequency Response & Bode Plot
Bode plot = graphical representation of the amplitude and phase of 𝐻 𝑗𝜔 for positive 𝜔
Im{𝐻 𝑗𝜔 }
𝜙 ( ) = arctan = arctan −𝜔𝑅𝐶
Re{𝐻 𝑗𝜔 }
= 0° / −45 ° / −90°
ω=0 ω = 1/RC ω ∞
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𝑠𝑅𝐶 𝑗𝜔𝑅𝐶
𝐻 𝑠 = → 𝐻 𝑗𝜔 =
1 + 𝑠𝑅𝐶 1 + 𝑗𝜔RC
𝜔𝑅𝐶
𝐻 𝑗𝜔 =
1 + 𝜔𝑅𝐶
=0 / 1/ 2 / 1
ω=0 ω = 1/RC ω ∞
𝐼𝑚 𝐻 𝑗𝜔
Φ 𝑗𝜔 = arctan = arctan +𝜔𝑅𝐶
𝑅𝑒 𝐻 𝑗𝜔
=0° / 45 ° / 90°
ω=0 ω = 1/RC ω ∞
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Bode Plot – Summary I
• Each negative pole 𝜔 (located on the negative real axis in the left half of the s-plane)
of the transfer function
- causes a -90° phase shift (rule of thumb: starts @ 𝜔 /10, completes @ 10𝜔 )
- decreases the magnitude by -20dB / decade
• @𝜔=𝜔
- phase shift: -45°
- magnitude: -3dB -3dB corner or cut-off frequency
• Each negative zero 𝜔 (located on the negative real axis in the left half of the s-plane)
of the transfer function
- causes a +90° phase shift (rule of thumb: starts @ 𝜔 /10, completes @ 10𝜔 )
- increases the magnitude by +20dB / decade
• @𝜔=𝜔
- phase shift: +45°
- magnitude: -3dB
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𝐼𝑚{𝐻 𝑠 }
𝑠 𝑠 Φ = arctan
1+ 1+ ⋅⋅⋅ 𝑅𝑒{𝐻 𝑠 }
𝑧 𝑧
𝐻(𝑠) = 𝑘
𝜔 𝜔
𝑠 𝑠 = arctan + arctan +⋯
1+ 1+ ⋅⋅⋅ 𝑧 𝑧
𝑝 𝑝
𝜔 𝜔
𝑠 𝑠 − arctan − arctan −⋯
20 ⋅ log 𝐻(𝑠) = 20 ⋅ log 𝑘 + 20 ⋅ log 1 + + 20 ⋅ log 1 + +⋯ 𝑝 𝑝
𝑧 𝑧
Independent of sign! Depending on sign!
pos./neg. zero → +20dB/decade
𝑠 𝑠
pos./neg. zero → -/+ 90°
−20 ⋅ log 1 + − 20 ⋅ log 1 + −⋯
pos./neg. pole → -20dB/decade 𝑝 𝑝 pos./neg. pole → +/- 90°
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Example – 2nd-order Low-pass Filter
𝐻(𝑗𝜔)
0dB − 3dB −3dB
𝜔 𝜔
1st-order low-pass 1st-order low-pass 𝜔
−20dB/decade
𝑣 𝑣
−20dB/decade
−40dB/decade
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• Positive zeroes (located on the positive real axis in in the right half of the s-plane) are
acceptable.
• Each positive zero 𝜔
• causes a -90° phase shift (rule of thumb: starts @ 𝜔 /10, completes @ 10𝜔 )
• increases the magnitude by +20dB/decade
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Stability of Feedback Systems
What is the closed-loop transfer function 𝑣 /𝑣 of this circuit?
1
𝑣 =𝑣 +𝑣 = +1 𝑣
𝐴(𝑠)
Frequency response of
𝑣 𝐴(𝑠) 1
𝑣 𝐴(𝑠) = = the loop transfer function
𝑣 1 + 𝐴(𝑠) 1 + 1 𝐻 𝑗𝜔 gives insight into
𝑣 𝑣 𝐴(𝑠)
open-loop the stability & small-
1 1 transfer function signal settling behavior
𝐴(𝑠) ≈ 𝐴 𝑠 𝑠
𝑣 = 𝐴(𝑠)𝑣 1+ 1+ of the CLOSED-LOOP
𝜔 𝜔 transfer function.
general case
𝐹(𝑠)
𝑣 𝐴(𝑠) closed-loop
= 𝑅
𝑣 1 + 𝐹(𝑠)𝐴(𝑠) transfer function 𝑣 𝑣
𝑣 𝑣
Σ 𝐴(𝑠) loop 𝑣 𝑅
𝐻 (𝑠) = 𝐴(𝑠)𝐹(𝑠)
transfer function
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𝑣 𝐴(𝑠)
𝑣 𝑣
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𝑣 𝐴(𝑠)
𝑣 𝑣
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Small-signal Settling Behavior – PM = 12°
Bode plot 𝐻 𝒋𝟐𝝅𝒇 transient step response
𝑣 𝐴(𝑠)
𝑣 𝑣
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• Based on the Bode plot of the loop transfer function, the stability of a
closed-loop feedback system is typically analyzed by deriving the phase
margin.
• The lower the phase margin, the more ringing in the small-signal settling
behavior.
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Literature
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Overview
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Recap – Two-port Parameters (Y-Parameters)
The “black box” is characterized by
𝑖 =𝑖 𝑖 =𝑖 the characteristics of the currents
unknown and voltages at the input & output
small-signal complex admittance parameters
𝑣 =𝑣 𝑣 =𝑣
model 𝑦 ,𝑦 ,𝑦 ,𝑦
(“black box”)
1
complex admittance 𝑌 =
𝑍 complex impedance
𝑖
(𝑔 = )𝑦 = 𝑖 =𝑦 𝑣 +𝑦 𝑣
𝑣
transconductance output admittance
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MOS-Transistor – Output Admittanz ( )
CGD iout
G D
𝑦 =
𝐶 gmvgs gds CDB vout
=𝑔 +𝑦 +𝑦
S=B
=𝑔 + 𝐶 +𝐶 𝑠
1 𝑟
𝑧 = =
CGD iout 𝑦 1+𝑟 𝐶 +𝐶 𝑠
G D
S=B
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MOS-Transistor – Transconductance ( )
CGD iout
G D
𝑦 =
vin 𝐶 gmvgs gds CDB
𝑔 𝑣 − 𝑠𝐶 𝑣
S=B =
𝑣
1
𝐺 = = 𝑔 − 𝑠𝐶
CGD iout 𝑦
G D
vin 𝐶 gmvgs 𝑣 =𝑣 =𝑣 =𝑣
S=B
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MOSFET – Frequency-dependent Small-signal Gain
iin CGD
G D
S=B
1 𝑟
𝐺 =𝑌 = 𝑔 − 𝑠𝐶 𝑟 = =
𝑌 1 + 𝑠(𝐶 + 𝐶 )𝑟
𝑟
𝐴 = −(𝑔 − 𝑠𝐶 )
1 + 𝑠(𝐶 +𝐶 )𝑟
𝜔 → 0 rad/s: 𝐴 = −𝑔 𝑟
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Overview
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CS Amplifier – Frequency-dependent Small-signal Gain
VDD
CGD
RL G D
CGD vout
CGS gmvgs gds RL CDB CL
vin CDB (large) load capacitor CL
(to be driven) S=B
CGS
𝐴 = −𝐺 𝑟
𝑟 ||𝑅
= −(𝑔 − 𝑠𝐶 )
1 + 𝑠(𝐶 + 𝐶 + 𝐶 )(𝑟 ||R )
𝜔 → 0 rad/s: 𝐴 = −𝑔 (𝑟 ||𝑅 )
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CS Amplifier – Bode Plot
negative pole positive zero
amplitude drops by -20 dB/decade amplitude increases by 20 dB/decade
20
(dB)
|Av| [dB]
0
20 lg A
20log
-25
-50
180°
shift
Phase shift
phase
90°
0°
10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz 10GHz 100GHz
𝑓 ≈ 1.6 MHz frequency
Frequency (log) 𝑓 ≈ 3 GHz
negative pole positive zero
phase decreases by -90° phase decreases by -90°
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Overview
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Miller-Theorem / Miller-Effect
An impedance Z connected between input and output of an amplifier can be
replaced by an input and output referred impedance 𝑍 and 𝑍 , respectively.
iZ Z
iZ iZ
v1 AV v2 = AVv1 v1 AV
Z1 Z2 v2 = AVv1
𝑣 −𝑣 𝑣 −𝐴 𝑣 𝑣 (1 − 𝐴 ) 𝑣
𝑖 = = = (1) 𝑖 = (2)
𝑍 𝑍 𝑍 𝑍
𝑍
(1) = (2) ⇒ 𝑍 =
1−𝐴
homework
Prove that 𝑍 = 𝑍 ≈ 𝑍!
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CS-Amplifier – Miller-Effect
VDD
RL
CGD
vout = -|Av|vin
vin
𝐶 = 0.1pF → 𝑍 = 1/𝑠𝐶
𝐴 = −100
CGS
𝑍
𝑍 = →𝐶 = 1−𝐴 𝐶 = 10.1 pF
1−𝐴
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CS Amplifier – “Pseudo” Input Impedance
VDD
RL
CGD 𝑖 𝑖 𝐶
vout = -|Av|vin G D
𝑖
vin
𝑣 CGS gmvgs gds RL CL 𝑣 = −|𝐴 |𝑣
CGS
S=B
𝑣 1 1
𝑧 = = = ≈
𝑠𝐶 𝑣 + 𝑠𝐶 v −𝑣 𝑠𝐶 +𝑠 1+ 𝐴 𝐶 𝑠 𝐶 + 𝐴 𝐶
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𝑖 =𝑦 𝑣 +𝑦 𝑣 𝑧
𝑖 =𝑦 𝑣 +𝑦 𝑣
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CS Cascode Amplifier – Miller-Effect
VDD 𝐶 =𝐶 + 1+ 𝐴 𝐶
CGS2 routN,up
ioutN 𝑟 +𝑅
N voutN 𝑟 , =
CGD1 1+ 𝑔 +𝑔 𝑟
routN,down
vin CDB1 = CSB2 exercise @ home
T1 𝑟 , =𝑟
CGS1
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VDD
𝑟 +𝑅 𝑟 +𝑟 2
𝑟 , = ≈ ≈
1 + (𝑔 + 𝑔 )𝑟 𝑔 𝑟 𝑔
VGG3 TR3 L 𝑟 , =𝑟
rout 2 𝑔
vout
𝑟 ≈ ⇒ 𝐴 ≈ −2
CGD2 𝑔 𝑔
CDB2
VGG2
T2
𝑔 low gain from input
𝐶 ≈ 1+2 𝐶 to node N
𝑔
CGS2 routN,up → minor Miller-effect
ioutN
N voutN
CGD1 gain of complete stage
routN,down
𝐴 = −𝑔 𝑟
vin CDB1 = CSB2
T1 𝑟 ≈ 𝑔 𝑟 𝑟 ||𝑟
CGS1 medium overall gain
𝐴 ≈ −𝑔 𝑟 from input to output
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Full Cascode CS Amplifier – Miller-Effect
VDD 𝑟 +𝑅 𝑟 +𝑔 𝑟 𝑟 1
𝑟 , = ≈ ≈
1 + (𝑔 + 𝑔 )𝑟 𝑔 𝑟 𝑟
VGG4 T4
RL 𝑟 , =𝑟
VGG3 T3 𝑟 ≈𝑟 ||𝑟 ⇒𝐴 ≈𝑔 (𝑟 ||𝑟 )
rout
vout
medium gain from input
CGD2 𝐶 ≈𝑔 (𝑟 ||𝑟 )𝐶 to node N
CDB2
T2 → medium Miller-effect
VGG2
gain of complete stage
CGS2 routN,up
ioutN 𝐴 = −𝑔 𝑟
N voutN
CGD1
routN,down 𝑟 ≈ 𝑔 𝑟 𝑟 || 𝑔 𝑟 𝑟
vin CDB1 = CSB2 1 high overall gain
T1 𝐴 ≈− 𝑔 𝑔 𝑟 𝑟
CGS1
2 from input to output
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Summary
CS amplifier single-side cascode
amplifier full cascode
(transistor load rds) (transistor load rds)
output resistance 𝑟 1
≈ ≈𝑟 ‖𝑟
@ node N 𝑔
“pseudo” input 𝑔
capacitance due to 1+ 𝐴 𝐶 ≈ 𝐶 ≈𝐶 ≈𝑔 (𝑟 ‖𝑟 )𝐶
𝑔
Miller-effect
1
overall gain 𝐴 −𝑔 𝑟 /2 ≈ −𝑔 𝑟 ≈ − (𝑔 𝑟 )
2
medium gain medium gain high gain
remarks Miller-effect high decoupling medium decoupling
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Literature
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