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Sap 1

This document describes the instruction set and operation of a simple computer called SAP-1. It contains 5 instructions - LDA, ADD, SUB, OUT, and HLT. The computer uses microprogramming to execute instructions through a sequence of timing states. Each instruction is broken down into its component timing states, with the control unit producing a unique control word for each state to direct the flow of data and execution.

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Shahariar Jubair
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0% found this document useful (0 votes)
8 views

Sap 1

This document describes the instruction set and operation of a simple computer called SAP-1. It contains 5 instructions - LDA, ADD, SUB, OUT, and HLT. The computer uses microprogramming to execute instructions through a sequence of timing states. Each instruction is broken down into its component timing states, with the control unit producing a unique control word for each state to direct the flow of data and execution.

Uploaded by

Shahariar Jubair
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Simple As Possible

Computer

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Instruction Set
1. LDA <memory address>
accumulator=content of memory address
2. ADD <memory address>
accumulator<=acc + content of memory.
3. SUB <memory address>
accumulator<=acc - content of memory.

1,2,3: Memory Reference Instruction


S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Instruction Set
4. OUT
out register = accumulator

5. HLT
-stops clock

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Example
25-9+10-18=?

-Load 25 in accumulator
-Subtract 9 from 25
-Add 10 with the result
-Subtract 18
-Show output

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Example
25-9+10-18=?
Source Machine F 00010010 7 XXXXXXXX
Code Code E 00001010 6 XXXXXXXX
LDA CH 00001100 D 00001001 5 1111XXXX
SUB DH 00101101 C 00011001 4 1110XXXX
ADD EH 00011110 B XXXXXXXX 3 00101111
SUB FH 00101111 A XXXXXXXX 2 00011110
OUT 1110XXXX 9 XXXXXXXX 1 00101101
HLT 1111XXXX 8 XXXXXXXX 0 00001100
S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Control Word
CON =

= 00 1 1 1 1 1 0 0011

= 3E3 H

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Timing (T) States
• Controller/Sequencer controls all the
operations. Each instruction is executed
through a series of step. Each such step
is called a Timing state (T state)
• The 6-bit Ring Counter produces 6 T
states for SAP-1
• Different CON words are produced in
different T states
S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
T states

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Fetch Cycle : T1

CON= 0101 1110 0011


=5E3 H

T1: Address State

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Fetch Cycle : T2

CON= 1011 1110 0011


=BE3 H

T2: Increment State

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Fetch Cycle : T3

CON= 0010 0110 0011


=263 H

T3: Memory State

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Execution Cycle : T4 <LDA>

CON= 0001 1010 0011


=1A3 H

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Execution Cycle : T5 <LDA>

CON= 0010 1100 0011


=2C3 H

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Execution Cycle : T6 <LDA>

CON= 0011 1110 0011


=3E3 H

NOP

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Microprogramming
• Each control word is called a microinstruction

• Microprogramming is an alternate way of


building controller-sequencer by storing
every microinstruction in a ROM sequentially.

-starting address of routine


-stepping through the routine addresses
-applying them to control ROM
S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
ADDRESS CONTENT ROUTINE
0 5E3 FETCH Control ROM
1 BE3
2 263
3 1A3 LDA
4 2C3
5 3E3
6 1A3 ADD
7 2E1
8 3C7
Address ROM
ADDRESS CONTENT
9 1A3 SUB
0000 3
A 2E1
0001 6
B 3CF
0010 9
C 3F2 OUT
……
D 3E3
1110 c
E 3E3
F X
S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET
Microprogramming

S. M. Raiyan Chowdhury
June 10, 2023 CSE 442: Microprocessor and Interfacing Lecturer, Dept of EEE, EWU
Grad Student, BUET

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