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Programming Model2

The programming model of 32-bit x86 microprocessors consists of three register groups. The first group contains eight general purpose registers that are used for data during computations. The second group contains segment registers that manage operations with external memory and address computations. The third set includes the instruction pointer and flag registers. The flag register contains status and control flags that indicate the results of arithmetic and logical operations. There are a total of nine flags, including flags for signs, zeros, carries, and overflows, as well as control flags for interrupts, direction, and debugging traps.

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12 views

Programming Model2

The programming model of 32-bit x86 microprocessors consists of three register groups. The first group contains eight general purpose registers that are used for data during computations. The second group contains segment registers that manage operations with external memory and address computations. The third set includes the instruction pointer and flag registers. The flag register contains status and control flags that indicate the results of arithmetic and logical operations. There are a total of nine flags, including flags for signs, zeros, carries, and overflows, as well as control flags for interrupts, direction, and debugging traps.

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Prince Vegeta
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© © All Rights Reserved
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Download as PDF, TXT or read online on Scribd
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PROGRAMMING MODEL OF X-86 FAMILY FOR 32 BIT VERSIONS MICROPROCESSOR

PROGRAMMING MODEL OF X-86 FAMILY FOR 32 BIT VERSIONS MICROPROCESSOR


The programming model of 32-bit versions of x-86 family consist of 3 registers groups.
The first groups contains eight general purpose registers called EAX,
EBX,ECX,EDX,ESI,EDI,ESP,EBP.
Where E tells that these are extended registers.each registers addressed 1,8, 16 or32 bits
models.
These registers used data during coputations.
The second groups of registers is segment groups. these groups consist of code segment
[CS],data segment[DS], stack segment[SS] ,extra segment[ES] ,AND GS AND FS.
These are 16-bits registers and manage operation with external memory.address compution
and data movement are performed by them.
The third set of registers consist of instruction pointer[IP] and flags registers.
Flag register of 8086 microprocessor
Flag register in 8085 microprocessor
The Flag register is a Special Purpose Register. Depending upon the value of result after
any arithmetic and logical operation the flag bits become set (1) or reset (0).
There are total 9 flags in 8086 and the flag register is divided into two types:
(a) Status Flags – There are 6 flag registers in 8086 microprocessor which
become set(1) or reset(0) depending upon condition after either 8-bit or 16-bit
operation. These flags are conditional/status flags. 5 of these flags are same
as in case of 8085 microprocessor and their working is also same as in 8085
microprocessor. The sixth one is the overflow flag.
The 6 status flags are:
1.Sign Flag (S)
2.Zero Flag (Z)
3.Auxiliary Cary Flag (AC)
4.Parity Flag (P)
5.Carry Flag (CY)
These first five flags are defined here
6.Overflow Flag (O) – This flag will be set (1) if the result of a signed
operation is too large to fit in the number of bits available to represent it,
otherwise reset (0). After any operation, if D[6] generates any carry and
passes to D[7] OR if D[6] does not generates carry but D[7] generates,
overflow flag becomes set, i.e., 1. If D[6] and D[7] both generate carry or both
do not generate any carry, then overflow flag becomes reset, i.e., 0.
(b) Control Flags – The control flags enable or disable certain operations of the
microprocessor. There are 3 control flags in 8086 microprocessor and these are:
1.Directional Flag (D) – This flag is specifically used in string instructions.
If directional flag is set (1), then access the string data from higher memory location towards
lower memory location.
If directional flag is reset (0), then access the string data from lower memory location towards
higher memory location.
2.Interrupt Flag (I) – This flag is for interrupts.
If interrupt flag is set (1), the microprocessor will recognize interrupt requests from the
peripherals.
If interrupt flag is reset (0), the microprocessor will not recognize any interrupt requests and will
ignore them.
3.Trap Flag (T) – This flag is used for on-chip debugging. Setting trap flag puts the
microprocessor into single step mode for debugging. In single stepping, the microprocessor
executes a instruction and enters into single step ISR.
If trap flag is set (1), the CPU automatically generates an internal interrupt after each instruction,
allowing a program to be inspected as it executes instruction by instruction.
If trap flag is reset (0), no function is performed.

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