Unit 2 - Microprocessor & Its Application - WWW - Rgpvnotes.in
Unit 2 - Microprocessor & Its Application - WWW - Rgpvnotes.in
Addressing Modes: The addressing modes are specifying the method of data access. It is indicating the flow
of instruction execution and also the size of machine code. Depending on the type device communication,
different addressing modes can be used.
(i) Immediate Addressing Mode: In this addressing mode the source operand is the data which can be
stored into the destination operand.
e.g., MOV AX , 0140H ; after execution of this instruction AX=0140H
(ii) Direct Addressing Mode: One of the operand in the instruction is the address of the memory location
from/to which the can read/write into the specified register.
e.g., MOV BH, [0100H] ; after execution of this instruction the content of the memory location
pointed by memory location whose offset address is 0100H is copied
into BH register.
(iii) Register Addressing Mode: Both the operand in this mode of address are the register of equal size.
e.g. MOV AL,CL ; after execution of this instruction the content of CL is copied into AL
(iv) Register Indirect Addressing Mode: The source or the destination operand register is holding the
address of the memory location from/to which the data can be read/written into destination or source
operand. The offset address is in either BX, SI or DI registers.
e.g., MOV [BX],DL ; after execution of this instruction the content of the memory location
pointer by the offset address which is stored in BX register is copied into
DL register.
(v) Indexed Addressing Mode: In this addressing mode the offset address is in the index register SI or DI. It
one of the special case of register indirect addressing mode.
e.g., MOV BX , [SI] ; MOV [DI] , AX
(vi) Register Relative Addressing Mode: In this mode the required data location address is formed by adding
an 8-bit or 16-bit displacement with the content of the register specified in the instruction. BX,BP,SI and
DI are used.
e.g., MOV AX, 30H[BX]
(vii) Based Indexed Addressing Mode: The effective address of the data is formed, by adding content of base
register to the content of an index register. The default segment register is DS.
e.g., MOV AX, [BX][SI]
(viii) Relative Based Indexed Addressing Mode: The effective address of the data is formed, by adding an 8-
bit or 16-bit displacement with the sum of contents of base register to the content of an index register in
a default segment register.
e.g., MOV AX, 30H [BX][SI]
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instruction. If it is 8-bit displacement, then called as short jump and if it 16-bit then called as long jump.
e.g., JMP Label ; were label is the 8-bit or 16-bit displacement
(x) Intrasegment Indirect Mode: The address to which the control is to be transferred lies in the same
segment in which the control transfer instruction lies. The value of the address is passed indirectly
through base registers.
e.g., JMP [BX] ; were BX is holding the displacement
(xi) Intersegment Direct Mode: The address to which the control is to be transferred is in a different
segment. It is branching from one code segment to another code segment. The destination address are
specified in the instruction directly.
e.g., JMP 5000H : 3000H ; were effective address 3000H in segment address 5000H.
(xii)Intersegment Direct Mode: The address to which the control is to be transferred is in a different
segment. It is branching from one code segment to another code segment and its address is passed
indirectly.
e.g., JMP [2000H] ; were four memory block contain the address as IP(LSB), IP(MSB), CS(LSB) and CS(MSB)
sequentially.
Instruction Set:
MOV: Copies a word or a byte of data from source to a destination. Direct loading of the segment
registers with immediate data is not permitted.
e.g., MOV AX,BX ; MOV AH,08H ; MOV AH,[SI] ; MOV [0300H],BX ; MOV DS,CX ;
PUSH: It pushes the content of the specified register/memory location on to the stack. The stack pointer
is decremented by 2, after each execution of this instruction.
e.g., PUSH AX ; PUSH DS ; PUSH [0400H], PUSHF
POP: It loads the specified register / memory location with the contents of the memory location pointed
by current stack segment and stack pointer. The stack pointer is incremented by 2.
e.g., POP AX; POP DS, POP [0400H], POPF
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XCHG: It exchanges the content of specified source and destination operands.
e.g., XCHG [0400H], AX; XCHG BX,AX
OUT: Copy a byte or word from accumulator (AL or AX) to a specified port
e.g., OUT 06H, AL; OUT DX, AX
ADD (Addition) : It is used add two 8-bit or 16-bit numbers. The source and destination operands may
be any register or memory location. Both operands should not be the memory location. The segment
registers cannot be used for addition operation. All the condition flag bits are affected.
e.g., ADD AX, 0140H ; ADD BX, CX ; ADD [2040H],AX ; ADD [0300H], 0100H
ADC (Add with Carry) : It is used add two 8-bit or 16-bit numbers along with carry bit. The rest of the
rules are as applicable to ADD instruction. All the condition flag bits are affected.
e.g., ADC AX, 0140H ; ADC BX, CX ; ADC [2040H],AX ; ADC [0300H], 0100H
SUB (Subtraction) : It is used subtract the 8-bit/16-bit source operand from destination operand. The
source and destination operands may be any register or memory location. Both operands should not be
the memory location. The segment registers cannot be used for subtraction operation. All the condition
flag bits are affected.
e.g., SUB AX, 0140H ; SUB BX, CX ; SUB [2040H],AX ; SUB [0300H], 0100H
SBB (Subtract with Borrow): It is used subtract the 8-bit/16-bit source operand and the borrow bit (CF)
from destination operand. Subtraction with borrow is subtraction of 1 from result obtained from SUB.
Both operands should not be the memory location. The segment registers cannot be used for
subtraction operation. All the condition flag bits are affected.
e.g., SBB AX, 0140H ; SBB BX, CX ; SBB [2040H],AX ; SBB [0300H], 0100H
INC (Increment): The content of the specified operand is incremented by 1. The conditional flag bits are
affected except CF.
e.g., INC AX ; INC [BX] ; INC [5000H]
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DEC (Decrement): This instruction decrements the content of the specified operand by 1. The
conditional flag bits are affected except CF.
e.g., DEC AX ; DEC [BX] ; DEC [5000H]
CMP (Compare) : It compares the two numbers. The source operand is compared with the destination
operand . The source operand is subtracted from the destination operand but the result is not stored.
The flag bits are affected depending on the result.
e.g., CMP AX, 0200H ; CMP [5000H], 0200H
MUL (Unsigned Multiplication): It multiplies an unsigned byte with the content of AL and the result is
stored in AX. The 16-bit number is multiplied with the content of AX and stored in DX and AX.
Immediate operand is not allowed in this instruction.
e.g., MUL BH ; (AX) ← (AL) x (BH)
MUL CX ; (DX) (AX) ← (AX) x (CX)
DIV (Unsigned Division): It performs the unsigned division operation. It divides an unsigned 32-bit
number by 16-bit or 8-bit operand. The dividend must be in AX for 16-bit operation and divisor may be
specified from any of the addressing mode except immediate addressing mode. The result is in
AL(quotient) and the remainder will be in AH. For 32-bit operation the higher word should be in DX and
lower in AX. The divisor may be specified from any of the addressing mode except immediate mode.
The quotient will be in AX and remainder will be in DX.
e.g., DIV BH ; (AL) ← (AX) / (BH) , AL – quotient , AH -- remainder
DIV CX ; (AX) ← (DX AX) / (CX) , AX – quotient , DX -- remainder
Logical Instructions
AND : Logical AND : It is performs the AND operation on every bit of the destination and source operand. The
source may any register or immediate data and destination may register or memory location. The result is
stored in the destination operand.
e.g., AND AX, 0008H ; AND AX, BX
OR : Logical OR : It is performs the OR operation on every bit of the destination and source operand. The
source may any register or immediate data and destination may register or memory location. The result is
stored in the destination operand.
e.g., OR AX, 0008H ; OR AX, BX
NOT : Logical Invert : This instruction complements the contents of an operand register or a memory
location, bit by bit.
e.g., NOT AX ; NOT [5000H]
XOR : Logical Exclusive OR: It is performs the XOR operation on every bit of the destination and source
operand. The source may any register or immediate data and destination may register or memory location.
The result is stored in the destination operand.
e.g., XOR AX, 0008H ; XOR AX, BX
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(iii) Branch Instructions:
These set of instructions are used to transfer the flow of execution of program to a new address
specified in the instruction. The new values of the CS & IP registers are updated with address to which
the control has to be transferred. The branch instructions are classified into two types
(a) Unconditional Branch Instructions (b) Conditional Branch Instructions
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The flag bits of 8086 can be modified to control the functioning of processor. Following are the
instructions used to modify.
CLC – Clear Carry Flag.
CMC – Complement Carry Flag.
STC – Set Carry Flag.
CLD – Clear Direction Flag.
STD – Set Direction Flag.
CLI – Clear Interrupt Flag.
STI – Set Interrupt Flag.
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e.g., RCR CX, 1 ; MOV CL, 04H ; RCR AL, CL
(i) Assembler : It is a program used to convert an assembly language program into the machine code. It
decides the address of each label and assigns the value to each of the variables, then forms the machine
code. It also find the syntax error and not the logical errors. There are two assemblers used, Microsoft Macro
Assembler (MASM) and Turbo Assembler (TSAM).
(ii) Linker : The DOS linking program LINK.EXE links the different object modules of a source program and
function library to generate an integrated source program. The input to the linker is the .OBJ file that contains
the object modules of the source program. It performs the three tasks
Searches the program to find library routines used by program
Determines the memory locations that code from each module will occupy and relocates its
instructions by adjusting absolute references
Resolves references among files
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(iii)Loader : The loader is a part of the operating system and places codes into the memory after reading the
‘.exe’ file. This step is necessary because the available memory addresses may not start from 0x0000, and
binary codes have to be loaded at the different addresses during the run. The loader finds the appropriate
start address.
1. Write an assemble language program (ALP) to add two 16-bit numbers
Solution:
DATA SEGMENT
var1 DW 2136H
var2 DW 4321H
res DW ?
DATA ENDS
ASSUME CS:CODE, DS:DATA
CODE SEGMENT
START : MOV AX, DATA
MOV DS, AX
MOV AX, var1
CLC
MOV BX, 0000H
ADD AX, var2
JNC below
INC BX
below: MOV res, AX
MOV res+2,BX
MOV AH, 4CH
INT 21H
CODE ENDS
END START
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