Computer Architecture

Lecture 0: Introduction

Nguyen Minh Son, Ph.D

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 Course Information
o Instructor
n Dr. Nguyen Minh Son ([email protected])
o Office: Faculty of CE, Building E6.5

o Prerequisite: Computer Architecture or the equivalent

o Meeting time: Tue 6-8 periods, E4.4

o Textbook Required
n David A. Patterson and John L. Hennessy, Computer
Organization and Design: The Hardware/Software Interface
(4th edition), Morgan Kaufmann, 2008.
o Other teaching materials
n Some reference books available in class meetings and course
web
n Slides & Lectures
n Coordinator: …

Reading references

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 Objectives – To Learn
Recent trends of architectural features in high-performance
computer systems
o Week 1: Computer Abstractions and Technology
o Week 2,3: Instructions - Language of the Computer
o Week 4,5: Arithmetic for Computers
o Week 6,7: Assessing and Understanding Performance
o Week 8: Mid-Term Exam
o Week 9,10,11: The processor – Datapath and Control
o Week 12,13,14: Pipelining - Datapath and Control
o Week 15: Presentation – Term-Projects
o Optional: Large and Fast Exploiting Memory Hierarchy
o Week 16: Final Exam

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Course evaluation
o Grading policy:
n Quizzes (attendance): 25%
n Midterm exam: 25% (Multiple choice and Essay)
n Final exam: 50% (Multiple choice and Essay)
o No cheating ?!

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Computer Architecture

Lecture 1: Computer Technology

Nguyen Minh Son, Ph.D

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In Your Course
o Mix of lecture vs. discussion
n Depends on how well reading is done before class
o Goal is to learn how to know a computer system
n Learn fundamental computer organization: machanism,
sequential and parallel computing.
n Learn how to evaluate and measure the performance of
computer system.

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 Course Focus
o Understanding machine structures, technology
factors, evaluation methods that will determine the
form of computers in 21st Century

Technology Parallelism Programming

Languages
Applications
Computer Architecture: Interface
• Organization
• Hardware/Software Boundary Design
(ISA)
Operating
Systems Compilers
Measurement &
Evaluation History
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Today outline
o Computer Revolution
n CPU technology
n Memory development
o Market generation
n Applications
n Overview of Computer System
n Layers
n Application and Technology trends
n Problem solver
n Manufacturing ICs
n Computer architecture

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 The Computer Revolution
Year Technology Relative performance/cost

o Progress in computer technology 1951 Vacuum tube 1

n Underpinned by Moore’s Law 1965 Transistor 35

n Reduced cost, 1975 Integrated circuit (IC) 900

n Increased performance and capacity 1995 Very large scale IC 2,400,000

(VLSI)

o Makes novel applications feasible 2005 Ultra large scale IC 6,200,000,000

n Computers in automobiles
n Cell phones
n WWW, Search Engines
o Computers are pervasive
n Internet of Things

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The Processor Market
o Number of distinct processors sold between 1998 and
2002

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Internet of Things

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Internet of Things

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Computer System: Layers
o Application software
n Written in high-level language
o System software
n Compiler: translates HLL code to
machine code
n Operating System: service code
o Handling input/output
o Managing memory and storage
o Scheduling tasks & sharing resources
o Hardware
n Processor, memory, I/O controllers
 Breakdown of a Computing Problem
Programming in Compiler/Assembler/
Problem Algorithms
High-Level Language Linker

Apps Trend
Instruction Set Architecture (ISA)

Target Machine
Micro-architecture
(one implementation)
System architecture
Functional units/
Data Path

Technology Trend
Gates Level
Design

Transistors Manufacturing

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Computer as Problem Solver
What is a problem?
• A problem requires some unprocessed facts (data) converted
into useful results (information)

• For every problem, there exists a step-by-step method

(algorithm) to do this conversion
Humans: A well known Problem Solver
What will the average score in “math exam” in a
class having 4 students, whose names & scores
are as follows:John,80 Katie,70 Jane,65
John 80 Bob,79

--------------

Katie 70
-----
--------------
---
------

Jane 65 Brain

Bob 79

Averaging
Technique

Average=73.5
Computer: A more efficient Problem Solver

Average=73.5

John 80

Katie 70

Jane 65

Bob 79

Averaging Technique
(Computer Software)
Manufacturing ICs

o Yield: proportion of working dies per wafer

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What Computer Architecture bring to Table

o Other fields often borrow ideas from architecture

o Quantitative Principles of Design

1. Take Advantage of Parallelism
2. Principle of Locality
3. Focus on the Common Case
4. Computer Performance: Amdahl’s Law
5. The Processor Performance Equation

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 1) Taking Advantage of Parallelism
o Increasing throughput of server computer via multiple processors
or multiple disks
o Detailed HW design
n Carry lookahead adders uses parallelism to speed up computing
sums from linear to logarithmic in number of bits per operand
n Multiple memory banks searched in parallel in set-associative caches
o Pipelining: overlap instruction execution to reduce the total time to
complete an instruction sequence
n Not every instruction depends on immediate predecessor Þ
executing instructions completely/partially in parallel possible
n Classic 5-stage pipeline:
1) Instruction Fetch (Ifetch),
2) Register Read (Reg),
3) Execute (ALU),
4) Data Memory Access (Dmem),
5) Register Write (Reg)

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Pipelined Instruction Execution
Time (clock cycles)

Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 Cycle 6 Cycle 7

I

ALU
n Ifetch Reg DMem Reg

s
t
r.

ALU
Ifetch Reg DMem Reg

O
r

ALU
Ifetch Reg DMem Reg
d
e
r

ALU
Ifetch Reg DMem Reg

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Limits to Pipelining
o Hazards prevent next instruction from executing during its
designated clock cycle
n Structural hazards: attempt to use the same hardware to do two
different things at once
n Data hazards: Instruction depends on result of prior instruction still
in the pipeline
n Control hazards: Caused by delay between the fetching of
instructions and decisions about changes in control flow (branches
and jumps). Time (clock cycles)

ALU
Ifetch Reg DMem Reg
n
s

ALU
Ifetch Reg DMem Reg
t
r.

ALU
Ifetch Reg DMem Reg
O

ALU
r Ifetch Reg DMem Reg
d
e
r

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 2) The Principle of Locality

o The Principle of Locality:

n Program access a relatively small portion of the address space
at any instant of time.
o Two Different Types of Locality:
n Temporal Locality (Locality in Time): If an item is referenced, it
will tend to be referenced again soon (e.g., loops, reuse)
n Spatial Locality (Locality in Space): If an item is referenced,
items whose addresses are close by tend to be referenced soon
(e.g., straight-line code, array access)
o Last 30 years, HW relied on locality for memory perf.

P $ MEM

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 Level of the Memory Hierarchy
Capacity
Access Time Staging
Cost Xfer Unit
CPU Registers
Registers Upper Level
100s Bytes
300 – 500 ps (0.3-0.5 ns) prog./compiler
Instr. Operands 1-8 bytes faster
L1 and L2 Cache L1 Cache
10s-100s K Bytes cache cntl
~1 ns - ~10 ns Blocks 32-64 bytes
$1000s/ GByte
L2 Cache
cache cntl
Main Memory Blocks 64-128 bytes
G Bytes
80ns- 200ns Memory
~ $100/ GByte
OS
Pages 4K-8K bytes
Disk
10s T Bytes, 10 ms Disk
(10,000,000 ns)
~ $1 / GByte user/operator
Files Mbytes
Larger
Tape
infinite Tape Lower Level
sec-min
~$1 / GByte
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3) Focus on the Common Case
o Common sense guides computer design
n Since its engineering, common sense is valuable

o In making a design trade-off, favor the frequent case over the

infrequent case
n E.g., Instruction fetch and decode unit used more frequently than
multiplier, so optimize it 1st
n E.g., If database server has 50 disks / processor, storage
dependability dominates system dependability, so optimize it 1st

o Frequent case is often simpler and can be done faster than

the infrequent case
n E.g., overflow is rare when adding 2 numbers, so improve
performance by optimizing more common case of no overflow
n May slow down overflow, but overall performance improved by
optimizing for the normal case

o What is frequent case and how much performance improved

by making case faster

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 4) Computer Performance: Amdahl’s Law
o Make the common case faster
o Speedup 1
= Perfnew / Perfold = Told / Tnew = f
(1 − f ) +
P
o Performance improvement from using faster mode is limited by the
fraction the faster mode can be applied.

Told
(1 - f) f
Tnew
(1 - f) f/P

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 CPI
5) Processor Performance Equation

inst count Cycle time

CPU time = Seconds = Instructions x Cycles x Seconds
Program Program Instruction Cycle

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Conclusion
o Computer Architecture =
Computer Organization + Design & Performance
Application
Operating
System
Compiler Firmware
Instruction Set
Architecture
Instars. Set Proc.I/O system
Datapath & Control

Digital Design
Circuit Design
Layout

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Enjoy !!!

Q&A

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